CN107015847A - Electronic device and working mode switching method thereof - Google Patents

Abstract

An electronic device and a method for switching working modes thereof are provided. The method comprises the following steps: respectively operating a first operating system and a second operating system on a first hardware core and a second hardware core of the electronic device; under a normal working mode, a first hardware core detects a standby signal indicating entering a standby mode; the first hardware core sends an interrupt signal and saves first recovery data corresponding to a first running state of the first operating system in a volatile memory of the electronic device so as to respond to the standby signal; the second hardware core stores second reply data of a second running state of a second operating system in the volatile memory so as to respond to the interrupt signal; and entering a standby mode and suspending power supply to the first hardware core and the second hardware core in the standby mode. Therefore, the awakening speed of the electronic device can be improved.

Description

Electronic device and working mode switching method thereof

technical field

The present invention relates to a working mode switching technology, and in particular to an electronic device and a working mode switching method thereof.

Background technique

Generally speaking, in order to increase the computing speed of the electronic device, the electronic device may be installed with a SoC having multiple hardware cores. Under the architecture with multiple hardware cores, each hardware core will run a dedicated operating system, and the operating systems can operate independently or coordinate with each other. Generally speaking, the computing power of the main (Master) hardware core will be higher than that of the slave (Slave) hardware core. Therefore, the main hardware core is often used to run the main operating system, while the slave hardware core is used to run the secondary hardware core. operating system. For example, the main operating system is responsible for maintaining the overall operation of the electronic device or the system chip, while the secondary operating system focuses on enhancing specific functions of the system chip (eg, graphics rendering or specific hardware drivers).

Under the current heterogeneous multi-hardware core architecture, every time the electronic device is woken up, the slave hardware core needs to be reloaded into the volatile memory and the initialization procedure needs to be performed again. In particular, as the design of the SoC becomes increasingly complex, the initialization program from the hardware core becomes increasingly large, which will inevitably seriously slow down the speed of waking up the electronic device.

Contents of the invention

In view of this, the present invention provides an electronic device and a working mode switching method thereof, which can effectively improve the wake-up efficiency of a multi-hardware core electronic device.

An embodiment of the present invention provides a working mode switching method, which is suitable for an electronic device with a volatile memory and multiple hardware cores. The method includes: the first hardware core among the hardware cores runs the first operating system, and the second hardware core in the hardware core runs the second operating system; in the normal working mode, the first hardware core detects a standby signal indicating to enter the standby mode; the first hardware core sends interrupting a signal and storing first response data corresponding to a first operating state of the first operating system in the volatile memory in response to the standby signal; the second hardware core storing the second operation second reply data of a second operating state of the system in the volatile memory in response to the interrupt signal; and entering the standby mode and suspending power supply to the first hardware core and all the hardware cores in the standby mode Describe the second hardware core.

Another embodiment of the present invention provides an electronic device, which includes a volatile memory, a first hardware core, a second hardware core, and a power management unit. The first hardware core is used to run a first operating system and is coupled to the volatile memory. The second hardware core is used to run a second operating system and is coupled to the volatile memory and the first hardware core. The power management unit is coupled to the volatile memory, the first hardware core and the second hardware core. Wherein, in the normal working mode, the first hardware core detects a standby signal indicating to enter the standby mode. Wherein, the first hardware core sends an interrupt signal to the second hardware core, and saves the first reply data corresponding to the first operating state of the first operating system in the volatile memory, in response to the Standby signal. Wherein, after receiving the interrupt signal, the second hardware core stores the second response data corresponding to the second operating state of the second operating system in the volatile memory, in response to the interrupt signal. Wherein, after entering the standby mode, the power management unit suspends power supply to the first hardware core and the second hardware core, so far only the power management unit with low power consumption is in the low power consumption listening working state, The volatile memory is also in a low power consumption state.

Based on the above, after the power management unit detects the standby signal, it will first start the power supply of the first hardware core and the second hardware core, and the first hardware core of the electronic device will use the power corresponding to the first running state of its operating system. The first recovery data is restored in the volatile memory and resets the second hardware core. And the second hardware core of the electronic device stores the second response data corresponding to the second operating state of the operating system in the volatile memory to respond to the interrupt signal. After entering the standby mode, the first hardware core and the second hardware core will be suspended from power supply. In this way, the data stored in the volatile memory can be used when the electronic device is woken up later. After the first hardware core is powered back on. The second hardware core will judge whether to recover from the standby mode. If the judgment is found to be yes, the second hardware core only needs to restore the state data previously stored in the volatile memory to complete the startup, thereby effectively improving the heterogeneous multi-hardware core electronics. Device wake-up efficiency.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.

Description of drawings

FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the present invention.

FIG. 2 is a flowchart of a working mode switching method according to an embodiment of the present invention.

FIG. 3 is a flowchart of a working mode switching method according to another embodiment of the present invention.

Explanation of reference signs

10: Electronic device

11, 12: Hardware core

13: Volatile memory

14: Power management unit

S201～S206, S301～S305: steps

detailed description

FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the present invention. Hereinafter, the term coupled includes direct or indirect electrical connection.

Referring to FIG. 1 , the electronic device 10 at least includes a hardware core 11 , a hardware core 12 , a volatile memory 13 and a power management unit 14 . The hardware core 11 is coupled to the hardware core 12 . The hardware core 11 and the hardware core 12 respectively include at least one processor.

In this embodiment, the hardware architectures of the hardware core 11 and the hardware core 12 are different. The hardware core 11 is the main hardware core of the electronic device 10 , and the hardware core 12 is the secondary hardware core of the electronic device 10 . For example, the hardware computing capability of the hardware core 11 is higher than that of the hardware core 12 . Alternatively, in another embodiment, the hardware core 11 and the hardware core 12 may also have the same or similar hardware architecture and may have the same hardware computing capability. In addition, the hardware core 11 and the hardware core 12 can operate independently or coordinately.

The volatile memory 13 is coupled to the hardware core 11 and the hardware core 12 and used for temporarily storing data. For example, the volatile memory 13 may include various types of random access memory (Random Access Memory, RAM). In this embodiment, the volatile memory 13 is independent from the hardware core 11 and the hardware core 12 . However, in another embodiment, the volatile memory 13 can also be configured in the hardware core 11 and/or the hardware core 12 . In addition, in an embodiment, the volatile memory 13 can also be used in combination with a non-volatile memory (eg, flash memory, etc.).

The power management unit 14 is coupled to the hardware core 11 , the hardware core 12 and the volatile memory 13 . The power management unit 14 is used to manage power supplied to the hardware core 11 , the hardware core 12 and the volatile memory 13 . For example, the power management unit 14 can control the battery module (not shown) of the electronic device 11 . Wherein, the battery module may include a power supply such as a battery. In this embodiment, the power management unit 14 is independent from the hardware core 11 and the hardware core 12 . However, the present invention is not limited thereto, and in other applications, the power management unit 14 can also be included in the hardware core 11 .

In this embodiment, the hardware core 11 and the hardware core 12 belong to a single-chip multi-processor (Chip Multi-Processor, CMP) under a heterogeneous multi-core (Heterogeneous Multi-Core) architecture. For example, the single-chip multiprocessor can be configured on the same processing chip or circuit board as the volatile memory 13 and the power management unit 14 . Alternatively, the volatile memory 13 and/or the power management unit 14 may also be included in the single-chip multi-processor. In this embodiment, the electronic device 10 may refer to the single-chip multi-processor or a processing chip including the single-chip multi-processor. In another embodiment, the electronic device 10 can also be a mobile device, a tablet computer, a notebook computer, a desktop computer, a digital set-top box, a multimedia player or a smart TV, etc. device, and its type is not limited to the above.

In this embodiment, the hardware core 11 runs at least one operating system (hereinafter also referred to as the first operating system), and the hardware core 12 runs at least one other operating system (hereinafter also referred to as the second operating system). Wherein, the first operating system is different from the second operating system. For the convenience of description, here it is taken as an example that the hardware core 11 and the hardware core 12 each run a dedicated operating system. For example, the first operating system run by the hardware core 11 is a Linux operating system, and the second operating system run by the hardware core 12 is a real-time operating system (Real-Time Operating system, RTOS). However, in another embodiment, the number of the hardware cores 11 and the hardware cores 12 may be greater and may be used to run more operating systems. In addition, in another embodiment, the first operating system and the second operating system may also be other types of operating systems, such as Microsoft Windows (Windows) or iOS operating systems, and so on.

In operation, the electronic device 10 can operate in a normal working mode or a standby mode after being turned on. In this embodiment, the standby mode may refer to working modes with low power consumption such as power saving, sleep, and hibernation, and the normal working mode is a working mode with higher power consumption than the above-mentioned working modes. Taking the Advanced Configuration and Power Interface as an example, the standby mode can refer to any one of the S1 to S3 modes, and the normal working mode refers to the S0 mode. For example, in the normal working mode, most of the electronic components in the hardware core 11, the hardware core 12 and the electronic device 10 can operate normally and be powered normally; while in the standby mode, only the volatile memory 13 and power management Unit 14 is powered normally or at the lowest operating voltage.

In this embodiment, the electronic device 10 is in the normal working mode first after being turned on. In the normal working mode, the hardware core 11 detects a standby signal indicating to enter the standby mode. For example, after the electronic device 10 is idle for more than a preset time (for example, 5 minutes) or after receiving a trigger operation of the power button on the electronic device 10 by the user, the Basic Input/Output System (BIS) of the electronic device 10 ,BIOS) will output this standby signal. After detecting the standby signal, the hardware core 11 sends an interrupt signal to the hardware core 12 and stores a first response data in the volatile memory 13 in response to the standby signal. Wherein, the first reply data corresponds to the current running state (hereinafter referred to as the first running state) of the operating system (ie, the first operating system) run by the hardware core 11 . After receiving the interrupt signal, the hardware core 12 will store a second response data in the volatile memory 13 in response to the interrupt signal. Wherein, the second reply data corresponds to the current running state (hereinafter referred to as the second running state) of the operating system (ie, the second operating system) run by the hardware core 12 . After the first reply data and the second reply data are stored in the volatile memory 13, the electronic device 10 enters the standby mode. Therefore, the power management unit 14 suspends power supply to the hardware core 11 and the hardware core 12 .

It is worth mentioning that the first reply data is used to allow the hardware core 11 to quickly restore its operating system (i.e., the first operating system) to the operating state before entering the standby mode (i.e., the first operating state), and the second The recovery data is used to allow the hardware core 12 to quickly restore its operating system (ie, the second operating system) to the running state before entering the standby mode (ie, the second running state). Therefore, in the standby mode, the power management unit 14 will continue to supply power to the volatile memory 13 to save the first reply data and the second reply data.

In the standby mode, the power management unit 14 detects a wake-up signal for waking up the electronic device 10 from the standby mode. For example, when the BIOS of the electronic device 10 detects an input signal from a preset input device (for example, a touch screen, a mouse, a keyboard, a touchpad or a power switch), the BIOS of the electronic device 10 will output this wake up signal. After detecting the wake-up signal, the power management unit 14 restores power to the hardware core 11 and the hardware core 12 in response to the wake-up signal. After the hardware core 11 is powered back on, the hardware core 11 sends a reset signal to the hardware core 12 and reads the first response data from the volatile memory 13 in response to the wake-up signal. After obtaining the first reply data, the hardware core 11 restores its operating system (ie, the first operating system) to the running state before entering the standby mode (ie, the first running state) according to the first reply data. In addition, after the hardware core 12 is powered back on, the hardware core 12 receives the reset signal and reads the second reply data from the volatile memory 13 in response to the reset signal. After obtaining the second reply data, the hardware core 12 restores its operating system (ie, the second operating system) to the running state before entering the standby mode (ie, the second running state) according to the second reply data. For example, the returned operating status of the operating system may include system programs and/or application programs opened before the operating system enters the standby mode, execution status of the opened system programs and/or application programs, and the like.

In an embodiment, after receiving the reset signal, the hardware core 12 may further determine whether the second reply data is stored in the volatile memory 13 . If the second reply data is stored in the volatile memory 13, the hardware core 12 will restore the second running state of the second operating system according to the second reply data. On the contrary, if the hardware core 12 determines that the required second recovery data is not stored in the volatile memory 13, the hardware core 12 will execute the initialization program of the second operating system. In the initialization procedure of the second operating system, the second operating system will be returned to the initialization state. For example, the initialization state is equal to the default state of the second operating system after the electronic device 10 is turned on. In particular, the total time spent on executing the initialization program by the hardware core 12 is greater than the total time spent on the hardware core 12 restoring the second operating system to the second running state according to the second reply data.

In other words, in one embodiment, if in the process of switching the electronic device 10 from the normal working mode to the standby mode, the above-mentioned second reply data is definitely stored in the volatile memory 13 and properly preserved, then the subsequent In the program of switching the electronic device 10 back to the normal working mode from the standby mode, the hardware core 12 can quickly return to the previous operating state according to the second reply data stored in the volatile memory 13; 10 In the program of switching from the normal working mode to the standby mode, the above-mentioned second reply data is not stored in the volatile memory 13, or in the standby mode, the second reply data is not properly saved (for example, In the standby state, the electronic device 10 is suddenly powered off or shut down and the second reply data is lost), then in the subsequent program of switching the electronic device 10 from the standby mode to the normal working mode, the hardware core 12 will not be able to recover from the volatile The second reply data is read back from the memory 13 . In this situation, the hardware core 12 executes the initialization program of the second operating system to restore the second operating system to the initialization state, so as to ensure that the electronic device 10 can still operate normally.

In one embodiment, the first reply data and the second reply data stored in the volatile memory 13 respectively have a data tag. The hardware core 11 and the hardware core 12 can respectively search the corresponding data tags in the volatile memory 13 to obtain the required first reply data and the second reply data.

In one embodiment, if the electronic device 10 has more hardware cores, before the electronic device 10 enters the standby mode, the reply data used to restore the operation status of the operating system run by each hardware core can be stored in the easy In the volatile memory 13. When the electronic device 10 intends to leave the standby mode and enter the normal working mode, these hardware cores can respectively use the recovery data stored in the volatile memory 13 to quickly restore the previous working state.

FIG. 2 is a flowchart of a working mode switching method according to an embodiment of the present invention.

Referring to FIG. 2 , in step S201 , a first operating system is run on a first hardware core of the electronic device, and a second operating system is run on a second hardware core of the electronic device. In step S202, in the normal working mode, a standby signal indicating to enter the standby mode is detected. In step S203, it is determined whether a standby signal is detected. If not, continue to detect the standby signal. If the standby signal is detected, then in step S204, the first hardware core sends an interrupt signal and stores the first response data corresponding to the first operating state of the first operating system in the volatile memory to respond to the standby Signal. In step S205, the second hardware core stores the second response data corresponding to the second operating state of the second operating system in the volatile memory to respond to the interrupt signal. In step S206 , the electronic device is put into a standby mode, and power supply to the first hardware core and the second hardware core is suspended in the standby mode.

FIG. 3 is a flowchart of a working mode switching method according to another embodiment of the present invention.

Please refer to FIG. 3 , in step S301 , in the standby mode, continuously detect the wake-up signal. In step S302, it is determined whether a wake-up signal is detected. If not, continuously detect the wake-up signal. If a wake-up signal is detected, in step S303, power supply to the first hardware core and the second hardware core is restored. In step S304, the first hardware core sends a reset signal and restores the first running state of the first operating system according to the first reply data stored in the volatile memory, in response to the wake-up signal. In step S305, the second hardware core restores the second running state of the second operating system according to the second reply data stored in the volatile memory, in response to the reset signal.

In addition, in another embodiment of FIG. 3, after detecting the reset signal, if the second hardware core determines that the second reply data is not stored in the preset volatile memory, the second hardware core also The initialization program of the second operating system can be directly executed. However, it should be noted that compared with using the second recovery data to restore the previous operating state of the second operating system, the second hardware core may need more time to execute the initialization program of the second operating system.

However, each step in FIG. 2 and FIG. 3 has been described in detail above, and will not be repeated here. It should be noted that each step in FIG. 2 and FIG. 3 can be implemented as a plurality of program codes or circuits, which is not limited in the present invention. For example, in an embodiment of FIG. 1 , . The hardware core 11 , the hardware core 12 and the power management unit 14 may individually include functional modules required to complete corresponding functions. In addition, the methods shown in FIG. 2 and FIG. 3 can be used in combination with the above embodiments, or can be used alone, which is not limited by the present invention.

To sum up, after the standby signal is detected, the reply data related to the running status of the operating systems individually run by the multiple hardware cores will be temporarily stored in the volatile memory. In this way, even if the first hardware core and the second hardware core are suspended from power supply after entering the standby mode, when the electronic device is to be woken up, the first hardware core and the second hardware core can respond according to the corresponding reply data in the volatile memory Quickly return to the working state before it entered standby mode. Especially, for the single-chip multi-processor under the heterogeneous multi-core architecture, the present invention can effectively reduce the time required for the secondary hardware core to return to the normal working state.

Although the present invention has been disclosed as above with the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the appended claims.

Claims (14)

1. A working mode switching method, suitable for electronic devices with volatile memory and multiple hardware cores, the method comprising: A first hardware core among the hardware cores runs a first operating system, and a second hardware core among the hardware cores runs a second operating system; In a normal working mode, the first hardware core detects a standby signal indicating to enter a standby mode; The first hardware core sends an interrupt signal and saves the first response data corresponding to the first operating state of the first operating system in the volatile memory in response to the standby signal; The second hardware core stores second reply data of a second operating state of the second operating system in the volatile memory in response to the interrupt signal; and Entering the standby mode and suspending power supply to the first hardware core and the second hardware core in the standby mode. 2. The working mode switching method according to claim 1, further comprising: In the standby mode, the power management unit of the electronic device detects a wake-up signal; The power management unit restores power to the first hardware core and the second hardware core in response to the wake-up signal; The first hardware core sends a reset signal and restores the first operating state of the first operating system according to the first reply data stored in the volatile memory in response to the wake-up signal; and The second hardware core restores the second operating state of the second operating system according to the second reply data stored in the volatile memory, so as to respond to the reset signal. 3. The working mode switching method according to claim 2, further comprising: The second hardware core determines whether the second reply data is stored in the volatile memory; and If it is determined that the second reply data is not stored in the volatile memory, the second hardware core executes an initialization program of the second operating system. 4. The working mode switching method according to claim 3, wherein the total time spent on executing the initialization program by the second hardware core is longer than the second hardware core recovering the second operating system according to the second reply data The total elapsed time of this second running state. 5. The working mode switching method according to claim 1, further comprising: In the standby mode, continuously supply power to the volatile memory to save the first reply data and the second reply data. 6. The working mode switching method according to claim 1, wherein the first hardware core and the second hardware core belong to single-chip multi-processors under a heterogeneous multi-core architecture. 7. The working mode switching method according to claim 6, wherein the first operating system is a Linux system, and the second operating system is a real-time operating system. 8. An electronic device comprising: volatile memory; a first hardware core, configured to run a first operating system and coupled to the volatile memory; a second hardware core, configured to run a second operating system and couple the volatile memory to the first hardware core; and a power management unit coupled to the volatile memory, the first hardware core and the second hardware core, Wherein, in the normal working mode, the first hardware core detects a standby signal indicating to enter the standby mode, Wherein, the first hardware core sends an interrupt signal and saves the first response data corresponding to the first operating state of the first operating system in the volatile memory, in response to the standby signal, Wherein, the second hardware core stores the second response data corresponding to the second operating state of the second operating system in the volatile memory in response to the interrupt signal, Wherein, after entering the standby mode, the power management unit suspends power supply to the first hardware core and the second hardware core. 9. The electronic device according to claim 8, wherein in the standby mode, the power management unit detects a wake-up signal, Wherein, the power management unit resumes power supply to the first hardware core and the second hardware core in response to the wake-up signal, Wherein, the first hardware core sends a reset signal and restores the first operating state of the first operating system according to the first response data stored in the volatile memory, in response to the wake-up signal, Wherein, the second hardware core restores the second operating state of the second operating system according to the second reply data stored in the volatile memory, so as to respond to the reset signal. 10. The electronic device according to claim 9, wherein the second hardware core further determines whether the second reply data is stored in the volatile memory, Wherein, if it is determined that the second reply data is not stored in the volatile memory, the second hardware core further executes an initialization program of the second operating system. 11. The electronic device according to claim 10, wherein the total time spent on executing the initialization program by the second hardware core is longer than the second hardware core restoring the second operating system according to the second reply data. The total elapsed time in the second operating state. 12. The electronic device according to claim 8, wherein in the standby mode, the power management unit continues to supply power to the volatile memory to save the first reply data and the second reply data. 13. The electronic device according to claim 8, wherein the first hardware core and the second hardware core belong to a single-chip multi-processor under a heterogeneous multi-core architecture. 14. The electronic device according to claim 13, wherein the first operating system is a Linux system, and the second operating system is a real-time operating system.