CN106992235A - A kind of light-emitting diode chip for backlight unit - Google Patents

Abstract

The invention discloses a light emitting diode chip, comprising: a semiconductor stack structure, the semiconductor stack structure sequentially includes a substrate, a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer and a current spreading layer, the first semiconductor layer and the second The conductivity type of the semiconductor layer is opposite, the semiconductor stack structure has a groove from the current spreading layer to the substrate, and the bottom of the groove exposes the first semiconductor layer; the first electrode layer located in the groove and formed on the first semiconductor layer ; The second electrode layer formed on the side of the current spreading layer away from the substrate, the second electrode layer includes a second electrode pin, and a plurality of second extensions arranged in the same extending direction and perpendicular to the extending direction, the second extending body One end is connected to the second electrode pin. The technical solution provided by the invention ensures that the current distribution in the multi-quantum well layer is more uniform, and the blocked photons can exit through the gap between two adjacent second extensions, thereby improving the luminance of the light-emitting diode chip.

Description

A light emitting diode chip

technical field

The present invention relates to the technical field of light-emitting diodes, and more specifically, to a light-emitting diode chip.

Background technique

Light Emitting Diode (LED), as a new generation of environmentally friendly light source replacing incandescent lamps and fluorescent lamps, is widely used in lighting, display and backlighting and other fields. Compared with traditional lighting sources, LEDs have many advantages such as high efficiency, low energy consumption, long life, no pollution, small size, and rich colors. Generally, a light-emitting diode chip mainly includes a semiconductor stack structure, and a P-type electrode and an N-type electrode in contact with the semiconductor stack structure. The semiconductor stack structure sequentially includes a substrate, an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer and the current spreading layer, steps are formed on the semiconductor stack structure to expose the N-type semiconductor layer. Wherein, the P-type electrode is formed on the surface of the current spreading layer away from the P-type semiconductor layer, and the N-type electrode is formed on the exposed surface of the N-type semiconductor layer in the step region. When the existing light-emitting diode chip is working, the current injected between the P-type electrode and the N-type electrode is relatively concentrated in the multi-quantum well layer, resulting in a decrease in the luminous brightness of the light-emitting diode chip; and, due to the large area of the P-type electrode The light emitted by the light emitting diode chip is blocked to further reduce the light emitting brightness of the light emitting diode chip.

Contents of the invention

In view of this, the present invention provides a light-emitting diode chip, the second electrode layer includes a second electrode pin and a plurality of second extensions, through which the second electrode pin and a plurality of second extensions are connected to the first electrode layer Multiple injection current paths are formed between them, so that currents pass through different regions of the multi-quantum well layer, ensuring that the current distribution in the multi-quantum well layer is more uniform, and improving the luminous brightness of the light-emitting diode chip; and, by optimizing the second extension body The width of the light-emitting diode chip can make the photons emitted by the light-emitting diode chip exit through the gap between two adjacent second extensions, thereby further improving the luminous brightness of the light-emitting diode chip.

In order to achieve the above object, the technical scheme provided by the invention is as follows:

A light emitting diode chip, comprising:

A semiconductor stack structure, the semiconductor stack structure sequentially includes a substrate, a first semiconductor layer, a multiple quantum well layer, a second semiconductor layer and a current spreading layer, the conductivity types of the first semiconductor layer and the second semiconductor layer are opposite, wherein , the semiconductor stack structure has a groove from the current spreading layer to the substrate direction, and the bottom of the groove exposes the first semiconductor layer;

a first electrode layer located in the groove and formed on the first semiconductor layer;

And, the second electrode layer formed on the side of the current spreading layer away from the substrate, wherein the second electrode layer includes second electrode pins, and pins extending in the same direction and arranged perpendicular to the extending direction. A plurality of second extension bodies, one end of the second extension body is connected to the second electrode pin.

Optionally, the slot is arranged opposite to the second electrode pin;

Wherein, the plurality of second extensions are distributed on both sides of the slot.

Optionally, for all the second extensions on either side of the slot, the distance between two adjacent second extensions is from the slot to the second extension on the side. There is a decreasing trend in the direction of the body;

Alternatively, for all the second extensions on any side of the slot, the distance between any two adjacent second extensions is the same.

Optionally, for all the second extensions on either side of the slot, the distance between two adjacent second extensions is from the slot to the second extension on the side. There is a decreasing trend in the direction of the body, and the difference between two adjacent distances is the same.

Optionally, for all the second extensions on any side of the slot, the distance between two adjacent second extensions ranges from 10 μm to 50 μm, endpoint values included.

Optionally, for all the second extensions on any side of the slot, the width of the second extensions along the direction perpendicular to the extension is from the slot to the first extension on the side. There is an increasing trend in the direction of the two extensions;

Alternatively, for all the second extensions on any side of the slot, the widths of the second extensions along the direction perpendicular to the extension are the same.

Optionally, for all the second extensions on any side of the slot, the width of the second extensions along the direction perpendicular to the extension is from the slot to the first extension on the side. The direction of the two extensions tends to increase, and the difference between the widths of two adjacent ones is the same.

Optionally, for all the second extensions on any side of the groove, the width of the second extensions along the direction perpendicular to the extension ranges from 10 nm to 500 nm, endpoint values included.

Optionally, the number of the second extensions located on both sides of the slot is the same.

Optionally, the first electrode layer includes a first electrode pin, and a A first extension body extending in a direction, wherein the first extension body is connected to the first electrode pin.

Compared with the prior art, the technical solution provided by the present invention has at least the following advantages:

The invention provides a light emitting diode chip, comprising: a semiconductor stack structure, the semiconductor stack structure sequentially includes a substrate, a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer and a current spreading layer, the first semiconductor layer and the second semiconductor layer have opposite conductivity types, wherein the semiconductor stack structure has a groove from the current spreading layer to the substrate, and the bottom of the groove exposes the first semiconductor layer; a first electrode layer formed in the groove and on the first semiconductor layer; and a second electrode layer formed on the side of the current spreading layer facing away from the substrate, wherein the second electrode layer includes A second electrode pin, and a plurality of second extension bodies arranged in the same extending direction and perpendicular to the extending direction, one end of the second extension body is connected to the second electrode pin.

It can be seen from the above that in the technical solution provided by the present invention, the second electrode layer includes a second electrode pin and a plurality of second extensions, and passes between the second electrode pin and the plurality of second extensions and the first electrode layer. Form multiple injection current paths, so that currents can pass through different regions of the multi-quantum well layer, ensure a more uniform current distribution in the multi-quantum well layer, and improve the luminous brightness of the light-emitting diode chip; and, by optimizing the width of the second extension , the photons emitted by the light emitting diode chip can be emitted through the gap between two adjacent second extensions, so as to further improve the luminous brightness of the light emitting diode chip.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only It is an embodiment of the present invention, and those skilled in the art can also obtain other drawings according to the provided drawings without creative work.

FIG. 1 is a schematic structural diagram of a light-emitting diode chip provided in an embodiment of the present application;

Fig. 2 is the sectional view along AA ' direction in Fig. 1;

FIG. 3 is a schematic structural diagram of another light-emitting diode chip provided in the embodiment of the present application;

Fig. 4 is the sectional view along AA ' direction in Fig. 3;

FIG. 5 is a schematic structural diagram of another light-emitting diode chip provided by the embodiment of the present application;

Fig. 6 is a sectional view along AA' direction in Fig. 5 .

detailed description

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

As mentioned in the background technology, the light-emitting diode chip mainly includes a semiconductor stack structure, and a P-type electrode and an N-type electrode in contact with the semiconductor stack structure. The semiconductor stack structure sequentially includes a substrate, an N-type semiconductor layer, a multi-quantum well layer, For the P-type semiconductor layer and the current spreading layer, steps are formed on the semiconductor stack structure to expose the N-type semiconductor layer. Wherein, the P-type electrode is formed on the surface of the current spreading layer away from the P-type semiconductor layer, and the N-type electrode is formed on the exposed surface of the N-type semiconductor layer in the step region. When the existing light-emitting diode chip is working, the current injected between the P-type electrode and the N-type electrode is relatively concentrated in the multi-quantum well layer, resulting in a decrease in the luminous brightness of the light-emitting diode chip; and, due to the large area of the P-type electrode The light emitted by the light emitting diode chip is blocked to further reduce the light emitting brightness of the light emitting diode chip.

Based on this, an embodiment of the present application provides a light emitting diode chip. The second electrode layer includes a second electrode pin and a plurality of second extensions. Multiple injection current paths are formed between the layers, so that current flows through different regions of the multi-quantum well layer, ensuring that the current distribution in the multi-quantum well layer is more uniform, and improving the luminous brightness of the light-emitting diode chip; and, by optimizing the second extension The width of the body can make the photons emitted by the light-emitting diode chip exit through the gap between two adjacent second extension bodies, thereby further improving the luminous brightness of the light-emitting diode chip. In order to achieve the above purpose, the technical solutions provided by the embodiments of the present application are as follows. Specifically, referring to FIG. 1 to FIG. 6 , the technical solutions provided by the embodiments of the present application are described in detail.

Referring to FIG. 1 , it is a schematic structural diagram of a light emitting diode chip provided in the embodiment of the present application, wherein the light emitting diode chip provided in the embodiment of the present application is a flip chip, that is, the direction of light output is the direction from the substrate to the current spreading layer , LED chips include:

A semiconductor stack structure, the semiconductor stack structure sequentially includes a substrate 110, a first semiconductor layer 120, a multi-quantum well layer 130, a second semiconductor layer 140 and a current spreading layer 150, the first semiconductor layer 120 and the second semiconductor layer The conductivity type of 140 is opposite, wherein the semiconductor stack structure has a slot 160 from the current spreading layer 150 to the substrate 110, and the bottom of the slot 160 exposes the first semiconductor layer 120;

a first electrode layer 200 located in the groove 160 and formed on the first semiconductor layer 120;

And, the second electrode layer 300 formed on the side of the current spreading layer 150 away from the substrate 110, wherein the second electrode layer 300 includes a second electrode pin 310, and the extension direction is the same and perpendicular to the A plurality of second extensions 320 arranged in the extension direction (the extension direction is the first direction X, and the vertical extension direction is the second direction Y), one end of the second extensions 320 is connected to the second electrode pin 310 .

In an embodiment of the present application, the slot 160 is disposed opposite to the second electrode pin 310 ; wherein, the plurality of second extensions 320 are distributed on both sides of the slot 160 . And, the first electrode layer 200 includes a first electrode pin 210, and is located between the first electrode pin 210 and the second electrode pin 310, and along the first electrode pin 210 to the second The first extension body 220 extending in the direction of the electrode pin 310 , wherein the first extension body 220 is connected to the first electrode pin 210 .

In an embodiment of the present application, the material of the substrate 110 includes but not limited to one of sapphire, silicon carbide, and silicon.

In addition, the first semiconductor layer 120 may be an N-type semiconductor layer, specifically an N-type GaN layer, and the second semiconductor layer 140 may be a P-type semiconductor layer, specifically a P-type GaN layer, and this application will not describe in detail. limit; the first electrode layer 200 is an N-type electrode layer, and the second electrode layer is a P-type electrode layer. Among them, the first electrode layer 200 and the second electrode layer 300 provided in the embodiment of the present application may be metal or alloy layers, specifically including but not limited to Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, A metal or an alloy of several combinations in W, with a thickness in the range of approx. Include endpoint values.

In addition, the material of the current spreading layer 150 includes but is not limited to one or more of indium tin oxide, Au, aluminum-doped ZnO, and metal nanometers, and the thickness ranges from about Include endpoint values.

It can be seen from the above that in the technical solution provided by the embodiment of the present application, the second electrode layer includes a second electrode pin and a plurality of second extensions, and the second electrode pin and a plurality of second extensions are connected to the first electrode layer. Multiple injection current paths are formed between them, so that currents pass through different regions of the multi-quantum well layer, ensuring that the current distribution in the multi-quantum well layer is more uniform, and improving the luminous brightness of the light-emitting diode chip; and, by optimizing the second extension body (preferably setting the width of the second extension body in the second direction Y to be on the order of nanometers), the photons emitted by the photodiode chip can be emitted through the gap between two adjacent second extension bodies, further improving the luminescence Luminous brightness of a diode chip.

In an embodiment of the present application, all the second extensions 320 on any side of the slot 160 and the distance between any two adjacent second extensions 320 may be set to be the same. Alternatively, the spacing can be optimally designed, and for all the second extensions 320 on any side of the slot 160, the spacing between two adjacent second extensions 320 will be extended from the slot 160 to the second extensions on this side. 320 shows a decreasing trend; wherein, due to the small distance between adjacent second extensions 320 away from the first electrode layer 200, it is equivalent to a higher density of the second extensions 320 away from the first electrode layer 200, so that the injection The current of the multi-quantum well layer is more likely to flow to the area of the second extension 320 away from the first electrode layer 200, so as to prevent the current injected into the multi-quantum well layer from concentrating on the area of the second extension 320 close to the first electrode layer 200, The high uniformity of the current injected into the multi-quantum well layer is guaranteed, and the luminous brightness of the light-emitting diode chip is improved.

Specifically shown in FIG. 3 and FIG. 4 , FIG. 3 is a schematic structural diagram of another light-emitting diode chip provided by the embodiment of the present application, and FIG. 4 is a sectional view along the AA' direction in FIG. 3 . Wherein, for all the second extensions 320 on any side of the slot 160, the distance between two adjacent second extensions 320 is from the slot 160 to the first extension on the side. The direction of the two extensions 320 shows a decreasing trend.

Further, for all the second extensions 320 on any side of the slot 160, the distance between two adjacent second extensions 320 is gradually changing in the direction from the slot 160 to the second extensions 320 on this side. The decreasing trend; that is, for all the second extensions 320 on any side of the slot 160, the distance between two adjacent second extensions 320 is from the slot 160 to the The direction of the second extension body 320 on the side has a decreasing trend, and the difference between two adjacent distances is the same.

It should be noted that the optimization scheme for the pitch in the above embodiments is only one of many embodiments in the present application, and the present application does not make specific limitations on this, and needs to be specifically designed according to actual applications. Wherein, in the embodiment of the present application, optionally, for all the second extensions 320 on any side of the slot 160, the distance between two adjacent second extensions 320 ranges from 10 μm to 50 μm, The endpoint values are included, wherein the spacing may specifically be 15 μm, 20 μm, 30 μm, 45 μm, etc., and the application does not limit the specific numerical value. And, the decreasing pitch provided by the embodiment of the present application can be specifically reduced from a pitch of 30 μm between two adjacent second extensions 320 close to the first electrode layer 200 to a phase far away from the first electrode layer 200 . The distance between two adjacent second extensions 320 is 10 μm.

And, in addition to optimizing the distance between two adjacent second extensions 320 as described in the above embodiments, the width of the second extensions 320 in the second direction Y can also be optimized. In an embodiment of the present application, for all the second extensions 320 on either side of the slot 160 , the widths of the second extensions 320 along the vertical extension direction (the second direction Y) may be the same. Alternatively, the width can be optimally designed. For all second extensions 320 on any side of the slot 160, the width of the second extension 320 along the vertical extension direction (second direction Y) is from the slot 160 to the side. The direction of the second extension body 320 tends to increase; wherein, because the width of the second extension body 320 away from the first electrode layer 200 is large, the width of the second extension body 320 close to the first electrode layer 200 is small , making it easier for the current injected into the multi-quantum well layer to flow to the region of the second extension 320 away from the first electrode layer 200, so as to prevent the current injected into the multi-quantum well layer from concentrating on the side of the second extension 320 close to the first electrode layer 200 The area ensures high uniformity of the current injected into the multi-quantum well layer, and improves the luminous brightness of the light-emitting diode chip.

Specifically shown in FIG. 5 and FIG. 6 , FIG. 5 is a schematic structural diagram of another light-emitting diode chip provided by the embodiment of the present application, and FIG. 6 is a sectional view along the AA' direction in FIG. 5 . Wherein, for all the second extensions 320 on any side of the slot 160, the width of the second extensions 320 along the direction perpendicular to the extension is from the slot 160 to all sides of the side. The direction of the second extension body 320 shows an increasing trend.

Further, for all the second extensions 320 on any side of the slot 160, the width of the second extensions 320 along the vertical extension direction gradually changes from the slot 160 to the second extension 320 on this side. That is, all the second extensions 320 on either side of the slot 160, the width of the second extension 320 along the direction perpendicular to the extension, from the slot 160 The direction toward the second extension body 320 on this side tends to increase, and the difference between two adjacent widths is the same.

It should be noted that the width optimization solution of the above embodiment is only one of many embodiments of the present application, and this application does not make specific limitations on it, and needs to be specifically designed according to actual applications. Optionally in this embodiment of the present application, for all the second extensions 320 on any side of the slot 160, the width of the second extensions 320 along the direction perpendicular to the extension is in the range of 10 nm to 500 nm, Including the endpoint value, the width may specifically be 20nm, 30nm, 100nm, 200nm, 350nm, 450nm, etc., and the application does not limit the specific numerical value. And, the width of the increasing trend provided by the embodiment of the present application can be specifically increased from the width of the second extension 320 close to the first electrode layer 200 of 50 nm to the second extension 320 away from the first electrode layer 200 The width is 500nm. Wherein, the width of the second extension 320 in the second direction Y is preferably set within a preset range (may be equal) to the light emitting wavelength difference of the light-emitting diode chip, and then the photons blocked by the second extension 320 can be blocked by the diffraction effect. Bypassing the second extension body 320 and emitting light, the luminous brightness of the light-emitting diode chip is improved.

And, it should be noted that, in the light-emitting diode chip provided in the embodiment of the present application, the distance between two adjacent second extensions 320 in all the second extensions 320 on any side of the slot 160 can also be adjusted The optimization is performed simultaneously with the width of the second extension body 320 in the second direction Y, which is not specifically limited in this application.

In any of the above embodiments, the number of the second extensions 320 located on both sides of the slot 160 provided in the present application is the same. In addition, in other embodiments of the present application, the number of the second extensions 320 on both sides of the slot 160 may also be set to be different, which is not specifically limited in the present application, and needs to be specifically designed according to actual applications.

For the light-emitting diode chip provided in any one of the above embodiments, its manufacturing method may include:

S1. First, a substrate is provided.

S2. Form a stack on the surface of the substrate, wherein the stack includes a first semiconductor layer, a multi-quantum well layer located on the side of the first semiconductor layer away from the substrate, and a first multi-quantum well layer located on the side of the multi-quantum well layer away from the substrate Two semiconductor layers.

S3. Etching a step on the stack by an etching process, wherein the etched step not only includes a groove, but also includes a step region surrounding the stack. Among them, the etching process includes but is not limited to one or more of the inductively coupled plasma etching process, chemical corrosion, electrochemical corrosion, etc., which is not specifically limited in this application; and the height range of the etched steps about Include the endpoint value, which can be Ensure that the first semiconductor layer is exposed.

S4, forming a current spreading layer on the surface of the second semiconductor layer facing away from the substrate. Among them, the specific A thin film of indium tin oxide is sputtered on the surface of the second semiconductor layer facing away from the substrate, and then combined with photolithography and indium tin oxide etching solution to remove the excess part to form a preset pattern to obtain a current spreading layer to finally obtain a semiconductor stack structure.

S5. Form the second electrode layer and the first electrode layer on the side of the current spreading layer facing away from the substrate by means of electron beam evaporation coating or nanoimprinting, and then perform follow-up processes such as packaging to obtain a light-emitting diode chip.

An embodiment of the present application provides a light-emitting diode chip, including: a semiconductor stack structure, the semiconductor stack structure sequentially includes a substrate, a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer, and a current spreading layer, and the first semiconductor layer A semiconductor layer and a second semiconductor layer have opposite conductivity types, wherein the semiconductor stack structure has a groove from the current spreading layer to the substrate, and the bottom of the groove exposes the first semiconductor layer; a first electrode layer formed in the groove and on the first semiconductor layer; and a second electrode layer formed on the side of the current spreading layer away from the substrate, wherein the second electrode The layer includes a second electrode pin, and a plurality of second extensions arranged in the same extending direction and perpendicular to the extending direction, one end of the second extending body is connected to the second electrode pin.

It can be seen from the above that in the technical solution provided by the embodiment of the present application, the second electrode layer includes a second electrode pin and a plurality of second extensions, and the second electrode pin and a plurality of second extensions are connected to the first electrode layer. Multiple injection current paths are formed between them, so that currents pass through different regions of the multi-quantum well layer, ensuring that the current distribution in the multi-quantum well layer is more uniform, and improving the luminous brightness of the light-emitting diode chip; and, by optimizing the second extension body The width of the light-emitting diode chip can make the photons emitted by the light-emitting diode chip exit through the gap between two adjacent second extensions, thereby further improving the luminous brightness of the light-emitting diode chip.

The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention will not be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A light-emitting diode chip, characterized in that, comprising: A semiconductor stack structure, the semiconductor stack structure sequentially includes a substrate, a first semiconductor layer, a multiple quantum well layer, a second semiconductor layer and a current spreading layer, the conductivity types of the first semiconductor layer and the second semiconductor layer are opposite, wherein , the semiconductor stack structure has a groove from the current spreading layer to the substrate direction, and the bottom of the groove exposes the first semiconductor layer; a first electrode layer located in the groove and formed on the first semiconductor layer; And, the second electrode layer formed on the side of the current spreading layer away from the substrate, wherein the second electrode layer includes second electrode pins, and pins extending in the same direction and arranged perpendicular to the extending direction. A plurality of second extension bodies, one end of the second extension body is connected to the second electrode pin. 2. The light emitting diode chip according to claim 1, characterized in that, the slot is arranged opposite to the second electrode pin; Wherein, the plurality of second extensions are distributed on both sides of the slot. 3. The LED chip according to claim 2, characterized in that, for all the second extensions on any side of the slot, the distance between two adjacent second extensions is from The groove shows a decreasing trend toward the second extension body on this side; Alternatively, for all the second extensions on any side of the slot, the distance between any two adjacent second extensions is the same. 4. The LED chip according to claim 3, characterized in that, for all the second extensions on any side of the slot, the distance between two adjacent second extensions is from The grooves tend to decrease toward the second extension body on this side, and the difference between two adjacent distances is the same. 5. The LED chip according to claim 3, characterized in that, for all the second extensions on any side of the slot, the distance between two adjacent second extensions ranges from 10 μm to 50 μm, including endpoint values. 6. The light emitting diode chip according to claim 2, characterized in that, for all the second extensions on any side of the slot, the width of the second extensions along the direction perpendicular to the extension is , there is an increasing trend from the slot to the second extension on this side; Alternatively, for all the second extensions on any side of the slot, the widths of the second extensions along the direction perpendicular to the extension are the same. 7. The LED chip according to claim 6, characterized in that, for all the second extensions on any side of the slot, the width of the second extensions along the direction perpendicular to the extension is , the direction from the slot to the second extension body on this side tends to increase, and the difference between two adjacent widths is the same. 8. The LED chip according to claim 6, characterized in that, for all the second extensions on any side of the slot, the width of the second extensions along the direction perpendicular to the extension is The range is from 10nm to 500nm, inclusive. 9. The light emitting diode chip according to claim 2, wherein the number of the second extensions located on both sides of the slot is the same. 10. The LED chip according to claim 2, wherein the first electrode layer comprises a first electrode pin, and is located between the first electrode pin and the second electrode pin along the A first extension body extending from the first electrode pin to the second electrode pin, wherein the first extension body is connected to the first electrode pin.