CN106992150A - The processing method of chip - Google Patents
The processing method of chip Download PDFInfo
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- CN106992150A CN106992150A CN201610893990.5A CN201610893990A CN106992150A CN 106992150 A CN106992150 A CN 106992150A CN 201610893990 A CN201610893990 A CN 201610893990A CN 106992150 A CN106992150 A CN 106992150A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
- B24B7/20—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
- B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
- B24B7/228—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/0005—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing
- B28D5/0011—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing with preliminary treatment, e.g. weakening by scoring
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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Abstract
提供晶片的加工方法,该晶片在由交叉形成的多条分割预定线划分的正面的各区域内形成有器件,该各器件具有在正面上突出的多个凸点,该晶片的加工方法具有如下的步骤:槽形成步骤,从晶片的正面沿着该分割预定线形成深度比该规定的厚度深且未将晶片完全切断的槽;树脂覆盖步骤,利用具有该凸点的高度的1.5倍~5倍的厚度的液状树脂来覆盖形成有该槽的晶片的该正面;树脂硬化步骤,在实施了该树脂覆盖步骤之后,使该液状树脂硬化;以及磨削步骤,在实施了该树脂硬化步骤之后,对晶片的背面进行磨削而使晶片薄化至该规定的厚度,并且使该槽露出于该背面,由此沿着该分割预定线对晶片进行分割而形成规定的厚度的多个器件芯片。
Provided is a method of processing a wafer having devices formed in each region of the front side divided by a plurality of crossing predetermined dividing lines, each device having a plurality of bumps protruding from the front side, the method of processing the wafer having the following Steps: a groove forming step, forming a groove from the front surface of the wafer along the planned dividing line with a depth deeper than the specified thickness and not completely cutting the wafer; a resin covering step, using 1.5 to 5 times the height of the bump. times the thickness of the liquid resin to cover the front surface of the wafer where the groove is formed; a resin hardening step, after performing the resin covering step, hardening the liquid resin; and a grinding step, after implementing the resin hardening step Grinding the back surface of the wafer to thin the wafer to the predetermined thickness, and exposing the groove on the back surface, thereby dividing the wafer along the planned dividing line to form a plurality of device chips of a predetermined thickness .
Description
技术领域technical field
本发明涉及晶片的加工方法,在该晶片中,在由交叉形成的多条分割预定线划分的正面的各区域内形成有器件,该各器件具有多个在正面上突出的凸点。The present invention relates to a method of processing a wafer in which devices are formed in each region of the front side divided by a plurality of crossing planned dividing lines, and each device has a plurality of bumps protruding from the front side.
背景技术Background technique
在半导体器件芯片的制造工艺中,在由硅或化合物半导体构成的晶片正面上呈格子状形成有多条被称为间隔道的分割预定线,在由分割预定线划分的各区域内形成有LSI等器件。在对这些晶片的背面进行磨削而将其薄化至规定的厚度之后,通过切削装置等沿着间隔道进行分割,由此,制造出各个半导体器件芯片。In the manufacturing process of semiconductor device chips, a plurality of dividing lines called streets are formed in a grid on the front surface of a wafer made of silicon or compound semiconductors, and LSIs are formed in each area divided by the dividing lines. and other devices. After the back surface of these wafers is ground and thinned to a predetermined thickness, they are divided along the streets by a cutting device or the like to manufacture individual semiconductor device chips.
近年来,作为用于实现半导体器件模块的轻薄短小化的技术,实用化了一种被称为倒装芯片键合的安装技术,在器件正面上形成有多个被称为凸点的金属突起物,使这些凸点与形成在配线基板上的电极直接接合(例如,参照日本特开2001-237278号公报)。In recent years, a mounting technique called flip-chip bonding has been put into practical use as a technology for reducing the weight, weight and size of semiconductor device modules, in which a large number of metal protrusions called bumps are formed on the front surface of the device. These bumps are directly bonded to electrodes formed on a wiring board (for example, refer to Japanese Patent Application Laid-Open No. 2001-237278).
并且,作为将晶片分割成更薄的器件芯片的技术,开发并实用化了被称为所谓的先划片法(Dicing Before Grinding)的分割技术(例如,参照日本特开平11-40520号公报)。Also, as a technique for dividing a wafer into thinner device chips, a dividing technique called a so-called dicing method (Dicing Before Grinding) has been developed and put into practical use (for example, refer to Japanese Patent Application Laid-Open No. 11-40520). .
该先划片法是以如下的方式来实施的技术,能够将器件芯片的厚度加工至50μm以下,该方式为:从半导体晶片或光器件晶片的正面沿着分割预定线形成规定的深度(相当于器件芯片的完工厚度的深度以上的深度)的分割槽,之后,对正面上形成有分割槽的晶片的背面进行磨削而使分割槽露出于该背面从而将晶片分割成各个器件芯片。This dicing-in-first method is a technique that can process the device chip to a thickness of 50 μm or less by forming a predetermined depth (equivalent to After that, the back surface of the wafer with the division grooves formed on the front surface is ground to expose the division grooves to the back surface to divide the wafer into individual device chips.
近年来,在正面上形成有凸点的晶片中还存在安装有被称为高凸点的高度较高的凸点的晶片。在对这样的晶片进行背面磨削时,将具有相当厚度的保护带粘接在晶片正面上而进行背面磨削。然而,由于凸点的高度较高,所以即使利用保护带来吸收凸点的凹凸而使其平坦化,也很难完全地平坦化。In recent years, among wafers on which bumps are formed on the front surface, there are also wafers mounted with high bumps called high bumps. When performing back grinding on such a wafer, a protective tape having a considerable thickness is bonded to the front surface of the wafer and the back grinding is performed. However, since the height of the bumps is high, even if the bumps are planarized by absorbing the unevenness of the bumps with the protective tape, it is difficult to completely planarize them.
其结果是,当在具有凸点的晶片的正面上粘接保护带而对晶片的背面进行磨削时,存在凸点的凹凸会转印到磨削面、或者磨削后的晶片的厚度偏差变大的问题。并且,在隔着保护带利用卡盘工作台对晶片进行吸引保持时,还存在因保护带无法完全跟随而使负压泄露从而导致晶片的吸引保持变得不完全的问题。As a result, when the back surface of the wafer is ground by attaching a protective tape to the front surface of the wafer with bumps, the unevenness of the bumps will be transferred to the grinding surface, or the thickness of the wafer after grinding will vary. Bigger problem. In addition, when the wafer is sucked and held by the chuck table through the protective tape, there is a problem that the suction and holding of the wafer becomes incomplete due to negative pressure leakage due to the inability of the protective tape to completely follow.
专利文献1:日本特开2001-237278号公报Patent Document 1: Japanese Patent Laid-Open No. 2001-237278
专利文献2:日本特开平11-40520号公报Patent Document 2: Japanese Patent Application Laid-Open No. 11-40520
专利文献3:日本特开2012-160515号公报Patent Document 3: Japanese Patent Laid-Open No. 2012-160515
专利文献4:日本特开2012-119594号公报Patent Document 4: Japanese Patent Laid-Open No. 2012-119594
然而,关于具有吸收凸点的凹凸的厚度的保护带,除了费用较高的问题之外,还产生了如下问题:由于保护带的粘合层比较柔软,所以在磨削中芯片会在保护带上晃动,芯片彼此碰撞而导致芯片的外周缺陷或者晶片破裂。However, in addition to the problem of high cost, the protection tape having a thickness that absorbs bumps also has the following problem: since the adhesive layer of the protection tape is relatively soft, the chip will be stuck on the protection tape during grinding. When the chips are shaken, the chips collide with each other to cause peripheral defects of the chips or cracks of the wafers.
发明内容Contents of the invention
本发明是鉴于这样的点而完成的,其目的在于提供一种晶片的加工方法,在抑制费用的同时,即使凸点的高度较高也不会使凸点的凹凸转印到磨削面上,磨削后的晶片的厚度偏差也被控制得很小,防止了在磨削中芯片彼此碰撞,当将晶片保持在卡盘工作台上时不会产生负压的泄露。The present invention has been made in view of such points, and an object of the present invention is to provide a method of processing a wafer that does not transfer unevenness of the bumps to the grinding surface even if the height of the bumps is high while suppressing costs. , The thickness deviation of the wafer after grinding is also controlled very small, preventing the chips from colliding with each other during grinding, and no leakage of negative pressure will occur when the wafer is held on the chuck table.
根据本发明,提供晶片的加工方法,该晶片在由交叉形成的多条分割预定线划分的正面的各区域内形成有器件,该各器件具有在正面上突出的多个凸点,该晶片的加工方法沿着该分割预定线对该晶片进行分割而形成规定的厚度的多个器件芯片,该晶片的加工方法的特征在于,具有如下的步骤:槽形成步骤,从晶片的正面沿着该分割预定线形成深度比该规定的厚度深且没有将晶片完全切断的槽;树脂覆盖步骤,利用具有该凸点的高度的1.5倍~5倍的厚度的液状树脂来覆盖形成有该槽的晶片的该正面;树脂硬化步骤,在实施了该树脂覆盖步骤之后,使该液状树脂硬化;以及磨削步骤,在实施了该树脂硬化步骤之后,对晶片的背面进行磨削而将晶片薄化至该规定的厚度并且使该槽露出于该背面,由此沿着该分割预定线对晶片分割而形成规定的厚度的多个器件芯片。According to the present invention, there is provided a method of processing a wafer having devices formed in each area of the front side divided by a plurality of crossing planned dividing lines, each device having a plurality of bumps protruding from the front side, the wafer having The processing method is to divide the wafer along the dividing line to form a plurality of device chips having a predetermined thickness. The predetermined line forming depth is deeper than the prescribed thickness and does not completely cut off the groove of the wafer; the resin covering step uses a liquid resin having a thickness of 1.5 times to 5 times the height of the bump to cover the wafer where the groove is formed the front side; a resin hardening step of hardening the liquid resin after the resin coating step; and a grinding step of grinding the backside of the wafer to thin the wafer to the backside of the wafer after the resin hardening step. A predetermined thickness is obtained and the groove is exposed on the back surface, thereby dividing the wafer along the planned dividing line to form a plurality of device chips having a predetermined thickness.
优选晶片的加工方法还具有如下的保护片配设步骤:与该树脂覆盖步骤同时或在实施了该树脂覆盖步骤之后,将保护片配设在该树脂上。Preferably, the wafer processing method further includes a step of arranging a protective sheet on the resin simultaneously with the resin covering step or after the resin covering step.
在本发明的加工方法中,由于在实施了树脂覆盖步骤之后,通过紫外线的照射或加热等外界刺激来使液状树脂硬化而将具有凸点的高度的1.5倍~5倍的厚度的树脂粘接在晶片的正面上从而进行晶片的背面磨削,所以能够防止芯片在磨削中晃动,通过硬化后的树脂来消除凸点的凹凸并防止针对磨削面的凸点的转印和晶片的厚度偏差,进而能够防止吸引保持时的负压的泄露。In the processing method of the present invention, since the liquid resin is cured by external stimuli such as ultraviolet irradiation or heating after the resin covering step is carried out, the resin with a thickness of 1.5 times to 5 times the height of the bump is bonded. The backside grinding of the wafer is carried out on the front side of the wafer, so the chip can be prevented from shaking during grinding, and the unevenness of the bumps can be eliminated by the hardened resin, and the transfer of the bumps to the grinding surface and the thickness of the wafer can be prevented. Deviation can prevent leakage of negative pressure during suction and holding.
附图说明Description of drawings
图1是各器件具有多个凸点的半导体晶片的立体图。FIG. 1 is a perspective view of a semiconductor wafer having a plurality of bumps for each device.
图2的(A)是示出槽形成步骤的剖视图,图2的(B)是槽形成步骤结束后的晶片的剖视图。2(A) is a cross-sectional view showing a groove forming step, and FIG. 2(B) is a cross-sectional view of a wafer after the groove forming step is completed.
图3的(A)、(B)是对树脂覆盖步骤进行说明的剖视图。(A) and (B) of FIG. 3 are sectional views explaining the resin covering step.
图4的(A)、(B)是对树脂覆盖步骤进行说明的剖视图。(A) and (B) of FIG. 4 are sectional views explaining the resin covering step.
图5是示出树脂硬化步骤的剖视图。Fig. 5 is a sectional view showing a resin hardening step.
图6的(A)是示出磨削步骤的局部剖视侧视图,图6的(B)是磨削步骤结束后的剖视图。(A) of FIG. 6 is a partial cross-sectional side view showing a grinding step, and FIG. 6(B) is a cross-sectional view after the grinding step is completed.
图7是示出转移步骤的剖视图。Fig. 7 is a sectional view showing a transferring step.
图8是剥离步骤实施后的剖视图。Fig. 8 is a cross-sectional view after the peeling step is performed.
图9是示出拾取步骤的剖视图。Fig. 9 is a cross-sectional view illustrating a pick-up step.
标号说明Label description
11:半导体晶片;12:切削单元;13:分割预定线;14:主轴;15:器件;16:切削刀具;17:凸点;18:支承工作台;20:保护片;22:提供喷嘴;23:槽;24:树脂提供源;25:器件芯片;26:液状树脂;28:保持工作台;37:按压机构;40:紫外线灯;42:卡盘工作台;44:磨削单元;40:磨削磨轮。11: semiconductor wafer; 12: cutting unit; 13: dividing line; 14: spindle; 15: device; 16: cutting tool; 17: bump; 18: supporting table; 20: protective sheet; 22: providing nozzle; 23: tank; 24: resin supply source; 25: device chip; 26: liquid resin; 28: holding table; 37: pressing mechanism; 40: ultraviolet lamp; 42: chuck table; 44: grinding unit; 40 : grinding wheel.
具体实施方式detailed description
以下,参照附图对本发明的实施方式进行详细地说明。参照图1,示出了正面上所形成的各器件具有多个凸点的半导体晶片(以下,有时简称为晶片)11的立体图。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to FIG. 1 , there is shown a perspective view of a semiconductor wafer (hereinafter, sometimes simply referred to as a wafer) 11 having a plurality of bumps for each device formed on the front surface.
半导体晶片11由硅或化合物半导体形成,具有正面11a和背面11b,在正面11a上垂直地形成有多条分割预定线(间隔道)13,在由分割预定线13划分出的各区域内分别形成有LSI等器件15。The semiconductor wafer 11 is formed of silicon or a compound semiconductor, has a front surface 11a and a back surface 11b, and on the front surface 11a, a plurality of dividing lines (separation lanes) 13 are vertically formed, and are formed in respective regions divided by the dividing lines 13. There are devices 15 such as LSI.
如图1的放大图所示,在各器件15的4个边上形成有多个突起状的凸点17。由于在各器件15的4个边上形成有凸点17,所以半导体晶片11具有形成有凸点17的器件区域(凸点形成区域)19和围绕器件区域19的外周剩余区域(凸点未形成区域)21。As shown in the enlarged view of FIG. 1 , a plurality of protruding bumps 17 are formed on four sides of each device 15 . Since bumps 17 are formed on four sides of each device 15, the semiconductor wafer 11 has a device region (bump forming region) 19 in which bumps 17 are formed and a peripheral remaining region around device region 19 (bump not formed). area) 21.
本发明的晶片的加工方法是基于先划片法(Dicing Before Grinding)的加工方法,所以首先实施槽形成步骤,在晶片11的正面11a上沿着分割预定线13形成规定的深度(芯片的完工厚度以上的深度)的槽。The processing method of the wafer of the present invention is based on the processing method of dicing before Grinding (Dicing Before Grinding), so at first implement the groove forming step, on the front surface 11a of the wafer 11, form the predetermined depth along the planned dividing line 13 (completion of the chip) depth above the thickness) of the groove.
在本发明实施方式中,如图2的(A)所示,通过切削装置的切削单元12来实施该槽形成步骤。切削单元12包含:主轴14,其被高速地旋转驱动;以及切削刀具16,其固定在主轴14的前端。In the embodiment of the present invention, as shown in FIG. 2(A) , the groove forming step is performed by the cutting unit 12 of the cutting device. The cutting unit 12 includes: a main shaft 14 that is rotationally driven at high speed; and a cutting tool 16 that is fixed to the front end of the main shaft 14 .
在槽形成步骤中,使高速旋转的切削刀具16从晶片11的正面11a沿着分割预定线13切入规定的深度(芯片完工厚度以上的深度),并对晶片11进行加工进给,由此,形成规定的深度的槽23。该规定的深度需要为没有完全切断晶片11的深度。In the groove forming step, the cutting tool 16 rotating at high speed is cut into a predetermined depth (a depth equal to or greater than the finished chip thickness) from the front surface 11a of the wafer 11 along the planned dividing line 13, and the wafer 11 is processed and fed, thereby, Grooves 23 having a predetermined depth are formed. The predetermined depth needs to be a depth at which the wafer 11 is not completely cut.
通过对切削刀具16进行分度进给,沿着在第1方向上伸长的分割预定线13形成规定的深度的槽23。接着,在将保持了晶片11的卡盘工作台旋转90°之后,沿着在与第1方向垂直的第2方向上伸长的分割预定线23形成规定的深度的槽23。图2的(B)示出了槽形成步骤结束后的晶片11的剖视图。By index-feeding the cutting blade 16 , grooves 23 of a predetermined depth are formed along the planned dividing lines 13 extending in the first direction. Next, after the chuck table holding the wafer 11 is rotated by 90°, grooves 23 of a predetermined depth are formed along planned dividing lines 23 extending in a second direction perpendicular to the first direction. (B) of FIG. 2 shows a cross-sectional view of the wafer 11 after the groove forming step is completed.
在本实施方式中,虽然通过切削装置实施了槽形成步骤,但也可以沿着分割预定线13对晶片11的正面11a照射对于晶片11具有吸收性的波长(例如为355nm)的激光束,通过激光束的烧蚀加工来形成规定的深度的槽23。In this embodiment, although the groove forming step is performed by a cutting device, it is also possible to irradiate the front surface 11a of the wafer 11 along the planned division line 13 with a laser beam having an absorbing wavelength (for example, 355 nm) to the wafer 11, and pass Grooves 23 of a predetermined depth are formed by ablation processing with a laser beam.
在槽形成步骤结束之后,实施树脂覆盖步骤,利用具有凸点17的高度的1.5倍~5倍的厚度的树脂来覆盖形成有槽23的晶片11的正面11a。参照图3的(A)~图4的(B)对该树脂覆盖步骤进行说明。After the groove forming step is completed, a resin coating step is performed to cover the front surface 11 a of the wafer 11 on which the groove 23 is formed with a resin having a thickness of 1.5 times to 5 times the height of the bump 17 . This resin covering step will be described with reference to FIG. 3(A) to FIG. 4(B) .
首先,如图3的(A)所示,在支承工作台18上配设保护片20,从与树脂提供源24连接的提供喷嘴22向保护片20上提供液状树脂26。树脂26是通过施加外界刺激而硬化的树脂,例如,可以采用通过紫外线的照射而硬化的紫外线硬化树脂或者通过加热而硬化的热硬化树脂。在本实施方式中,采用了紫外线硬化树脂来作为液状树脂26。First, as shown in FIG. 3(A) , a protective sheet 20 is disposed on a support table 18 , and a liquid resin 26 is supplied onto the protective sheet 20 from a supply nozzle 22 connected to a resin supply source 24 . The resin 26 is a resin that is cured by application of external stimuli. For example, an ultraviolet curable resin that is cured by irradiation of ultraviolet rays or a thermosetting resin that is cured by heating can be used. In this embodiment, ultraviolet curable resin is used as the liquid resin 26 .
在向支承在支承工作台18上的保护片20上提供了液状树脂26之后,如图3的(B)所示,实施按压步骤,利用保持工作台28对晶片11的背面11b侧进行吸引保持,并将晶片11的正面11a侧推抵于液状树脂26上。After the liquid resin 26 is supplied to the protective sheet 20 supported on the supporting table 18, as shown in FIG. , and push the front 11 a side of the wafer 11 against the liquid resin 26 .
在图3的(B)中,保持工作台28由形成有圆形凹部30a的壳体30和吸引保持部32构成,其中,该吸引保持部32由嵌合在壳体30的圆形凹部30a中的多孔性陶瓷等形成。In (B) of FIG. 3 , the holding table 28 is composed of a housing 30 formed with a circular concave portion 30 a and a suction holding portion 32 , wherein the suction holding portion 32 is formed by fitting the circular concave portion 30 a of the housing 30 . Porous ceramics in the formation.
吸引保持部32经由吸引路34而与吸引源36选择性地连接。保持工作台28构成为与按压机构37的支承部件38连结,能够通过按压机构37在上下方向上移动。The suction holding unit 32 is selectively connected to a suction source 36 via a suction path 34 . The holding table 28 is connected to the supporting member 38 of the pressing mechanism 37 and is configured to be movable in the vertical direction by the pressing mechanism 37 .
在按压步骤中,如图3的(B)和图4的(A)所示,通过按压机构37来使对晶片11进行吸引保持的保持工作台28朝向箭头A方向移动,从而将晶片11的正面11a推抵于被提供到保护片20上的液状树脂26上。In the pressing step, as shown in (B) of FIG. 3 and (A) of FIG. The front surface 11 a is pushed against the liquid resin 26 supplied onto the protective sheet 20 .
通过该推抵,液状树脂26在保护片20与晶片11之间扩展,如图4的(B)所示,晶片11的正面11a以凸点17被埋设的状态被液状树脂26覆盖。优选液状树脂26具有凸点17的高度的1.5倍~5倍的厚度。By this pushing, the liquid resin 26 spreads between the protective sheet 20 and the wafer 11, and as shown in FIG. The liquid resin 26 preferably has a thickness of 1.5 times to 5 times the height of the bump 17 .
利用具有这样的厚度的液状树脂来覆盖晶片11的正面11a,由此,凸点17的凹凸在保护片20上完全消除。另外,上述的按压步骤构成了树脂覆盖步骤的一部分。By covering the front surface 11 a of the wafer 11 with the liquid resin having such a thickness, the unevenness of the bumps 17 is completely eliminated on the protection sheet 20 . In addition, the above-mentioned pressing step constitutes a part of the resin covering step.
另外,在上述的实施方式中,虽然在支承工作台18上配设保护片20,并在该保护片20上滴下液状树脂26而利用树脂26来覆盖晶片11的正面11a,但保护片26并不是必须的,也可以省略保护片20而向支承工作台18上直接提供液状树脂26,利用树脂26来覆盖晶片11的正面11a。在该情况下,需要支承工作台18的上表面十分平坦,并且硬化后的树脂26具有能够简单地从支承工作台18的上表面剥离的性质。In addition, in the above-mentioned embodiment, although the protective sheet 20 is arranged on the support table 18, and the liquid resin 26 is dropped on the protective sheet 20 to cover the front surface 11a of the wafer 11 with the resin 26, the protective sheet 26 does not It is not essential, and the protective sheet 20 may be omitted, and the liquid resin 26 may be directly supplied on the support table 18 to cover the front surface 11 a of the wafer 11 with the resin 26 . In this case, the upper surface of the support table 18 needs to be sufficiently flat, and the cured resin 26 needs to be easily peelable from the upper surface of the support table 18 .
在实施了树脂覆盖步骤之后,实施使液状树脂26硬化的树脂硬化步骤。由于在本实施方式中采用紫外线硬化树脂来作为树脂26,所以如图5所示,从配置在支承工作台18的下方的紫外线灯40向液状树脂26照射紫外线而使树脂26硬化。After performing the resin coating step, a resin hardening step of hardening the liquid resin 26 is carried out. Since ultraviolet curable resin is used as resin 26 in this embodiment, as shown in FIG.
另外,支承工作台18和保护片20需要具有使从紫外线灯40照射的紫外线透过的性质。作为液状树脂26,在采用了热硬化性树脂的情况下,通过对液状树脂26进行加热而使其硬化。In addition, the supporting table 18 and the protective sheet 20 need to have a property of transmitting ultraviolet rays irradiated from the ultraviolet lamp 40 . When a thermosetting resin is used as the liquid resin 26 , the liquid resin 26 is heated to be cured.
在实施了树脂硬化步骤之后,实施磨削步骤,对晶片11的背面11b进行磨削而将晶片11薄化至规定的厚度,并且通过使槽23露出于背面11b而沿着分割预定线13对晶片11进行分割从而形成规定的厚度的多个器件芯片25。After the resin hardening step has been performed, a grinding step is performed to thin the wafer 11 to a predetermined thickness by grinding the back surface 11b of the wafer 11, and the grooves 23 are exposed along the back surface 11b to form a pair of wafers along the planned dividing line 13. The wafer 11 is divided to form a plurality of device chips 25 having a predetermined thickness.
在磨削步骤中,在实施了图5所示的树脂硬化步骤之后,如图6的(A)所示,将从支承工作台18上剥离的保护片20载置到磨削装置的卡盘工作台42上而利用卡盘工作台42隔着保护片20对晶片11进行吸引保持,并使晶片11的背面11b露出。In the grinding step, after the resin hardening step shown in FIG. 5 is performed, as shown in FIG. 6(A), the protective sheet 20 peeled off from the support table 18 is placed on the chuck of the grinding device. On the stage 42, the wafer 11 is sucked and held by the chuck stage 42 through the protective sheet 20, and the back surface 11b of the wafer 11 is exposed.
在图6的(A)中,磨削单元44包含:主轴16;轮安装座48,其固定在主轴16的前端;以及磨削磨轮50,其通过未图示的螺钉以能够装拆的方式安装在轮安装座48上。磨削磨轮50由环状的磨轮基台52和固定安装在磨轮基台52的下端部外周的多个磨削磨具54构成。In FIG. 6(A), the grinding unit 44 includes: the main shaft 16; the wheel mount 48, which is fixed on the front end of the main shaft 16; Installed on the wheel mount 48. The grinding wheel 50 is composed of an annular grinding wheel base 52 and a plurality of grinding stones 54 fixedly attached to the outer periphery of the lower end portion of the grinding wheel base 52 .
在磨削步骤中,一边使卡盘工作台42按照箭头a方向例如以300rpm旋转,一边使磨削磨轮50按照箭头b方向例如以6000rpm旋转,并且驱动未图示的磨削进给机构而使磨削磨具54按压到晶片11的背面11b从而对晶片11的背面11b进行磨削。In the grinding step, while the chuck table 42 is rotated in the direction of the arrow a at, for example, 300 rpm, the grinding wheel 50 is rotated in the direction of the arrow b at, for example, 6000 rpm, and a grinding feed mechanism (not shown) is driven. The grinding stone 54 is pressed against the back surface 11 b of the wafer 11 to grind the back surface 11 b of the wafer 11 .
当对晶片11的背面11b进行磨削而使晶片11薄化至规定的厚度时,如图6的(B)所示,槽23露出于晶片11的背面11b而将晶片11分割成多个器件芯片25。在图6的(B)中示出了磨削步骤实施后的晶片11的剖视图。When the back surface 11b of the wafer 11 is ground and the wafer 11 is thinned to a predetermined thickness, the grooves 23 are exposed on the back surface 11b of the wafer 11 as shown in FIG. Chip 25. A cross-sectional view of the wafer 11 after the grinding step is shown in (B) of FIG. 6 .
在本实施方式的磨削步骤中,由于形成在晶片11的正面11a的多个凸点17被埋设在树脂26中而凸点17的凹凸被树脂26完全吸收,所以能够对晶片11的背面11b进行磨削而将晶片11加工成均匀的厚度。In the grinding step of the present embodiment, since the plurality of bumps 17 formed on the front surface 11a of the wafer 11 are embedded in the resin 26 and the irregularities of the bumps 17 are completely absorbed by the resin 26, the back surface 11b of the wafer 11 can be processed. Grinding is performed to process the wafer 11 to a uniform thickness.
在实施了磨削步骤之后,如图7所示,实施转移步骤,将晶片11的背面11b粘接在粘合带T上,该粘合带T的外周部被安装在环状框架F上。接着,如图8所示,实施剥离步骤,将树脂26和保护片20从晶片11的正面11a剥离。由于树脂26因紫外线的照射而硬化,所以能够简单地将树脂26和保护片20从晶片11的正面11a剥离。After the grinding step is performed, as shown in FIG. 7 , a transfer step is performed to bond the rear surface 11b of the wafer 11 to the adhesive tape T whose outer peripheral portion is attached to the ring frame F. Next, as shown in FIG. 8 , a peeling step is performed to peel the resin 26 and the protective sheet 20 from the front surface 11 a of the wafer 11 . Since the resin 26 is hardened by irradiation of ultraviolet rays, the resin 26 and the protective sheet 20 can be easily peeled off from the front surface 11 a of the wafer 11 .
在剥离步骤实施之后,如图9所示,实施拾取步骤,通过未图示的拾取装置从粘合带T拾取器件芯片25,并将拾取的器件芯片25收纳到托盘等中。After the peeling step is performed, as shown in FIG. 9 , a pick-up step is performed to pick up the device chip 25 from the adhesive tape T by a pick-up device not shown, and store the picked-up device chip 25 in a tray or the like.
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JP6906843B2 (en) * | 2017-04-28 | 2021-07-21 | 株式会社ディスコ | Wafer processing method |
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