CN106990936A - A kind of addition and subtraction universal circuit of tape symbol control end - Google Patents

Abstract

A general-purpose circuit for addition and subtraction with a signed control terminal, including m-bit cascaded full subtractor unit FM, the input signal of each full subtractor unit FM includes the signal A as the minuend or the addend and the subtrahend Or the signal B of the addend, the signal B and the sign bit control signal Cr carry out the XOR operation, and are connected to the subtrahend or the addend input end of the full subtractor unit FM; the output signal of each full subtractor unit FM includes The operation result signal S and the sign bit control signal Cr are connected to the low-order borrow input terminal of the first-stage full subtractor unit FM, and the highest-level borrow output signal is the signal Cout; when the sign bit control signal Cr is 0 , the entire circuit performs subtraction; when the sign bit control signal Cr is 1, the entire circuit performs addition. Said m is a positive integer. The invention can simultaneously control and realize m-bit addition and subtraction operations, thereby reducing the number of logic gates and circuit area.

Description

A General Circuit for Addition and Subtraction with Signed Control Terminal

technical field

The invention belongs to the field of circuit design, in particular to a general-purpose circuit for addition and subtraction with a signed control terminal.

Background technique

At present, the adder and the subtractor have their own specific operation circuits, and the addition circuit and the subtraction circuit usually exist at the same time in actual circuit design. Therefore, it is necessary to design a general-purpose circuit for addition and subtraction, so that it can complete two operations with one circuit structure, thereby reducing the number of logic gates required for a certain operation and reducing the circuit area.

Contents of the invention

The purpose of the present invention is to solve the problems in the above-mentioned prior art, provide a kind of general circuit of addition and subtraction with sign control end, realize addition and subtraction operation in the same circuit by adding sign bit control end and XOR logic, simplify Circuit configuration.

In order to achieve the above-mentioned purpose, the technical solution adopted by the present invention is as follows: comprise m-bit cascaded full subtractor unit FM, the input signal of each full subtractor unit FM includes the signal A as the minuend or the summand and the signal A as the subtraction Number or addend signal B, said signal B and sign bit control signal Cr carry out XOR operation, and be connected to the subtrahend or addend input end of full subtractor unit FM; Said each full subtractor unit FM The output signal includes the operation result signal S, the sign bit control signal Cr is connected to the low-order borrow input terminal of the first-stage full subtractor unit FM, and the highest-stage borrow output signal is the signal Cout; when the When the sign bit control signal Cr is 0, the whole circuit performs subtraction operation; when the sign bit control signal Cr takes 1, the whole circuit performs addition operation. Said m is a positive integer.

Among the m-bit cascaded full subtractor unit FM, the low-order borrow signal Cin of the first-stage full subtractor unit FM is connected to the sign bit control signal Cr as the lowest-order borrow input, and the first-stage full subtractor unit FM outputs the first-stage operation result signal S0 and the first-stage high-order borrow output signal Cout0, and the first-stage high-order borrow output signal Cout0 is connected to the low-order borrow input end of the second-stage full subtractor unit FM, thereby By analogy, the full subtractor unit FM from the second stage to the m-1th stage is cascaded, and between stages, the borrow output of the lower full subtractor unit is directly connected to the borrow input terminal of the higher stage unit.

The signal B of the full subtractor unit FM and the low-order borrow signal Cin are respectively connected to the input terminals of the first NOR gate, and the output signal and signal B of the first NOR gate are connected to the input terminals of the second NOR gate. The output signal of the NOR gate and the low-bit borrow signal Cin are connected to the input of the third NOR gate; the output terminals of the second NOR gate and the third NOR gate are connected to the two input terminals of the fourth NOR gate; The output signal of the fourth NOR gate is connected to the two input terminals of the fifth NOR gate with signal A; the output signal of the fifth NOR gate is connected to the two input terminals of the seventh NOR gate with the output signal of the fourth NOR gate The output signal of the fifth NOR gate and the signal A are connected to the two input terminals of the sixth NOR gate; the output signal of the sixth NOR gate and the output signal of the seventh NOR gate are connected to the eighth or On the two input terminals of the NOR gate, the output signal of the eighth NOR gate is the operation result signal S; the output signal of the seventh NOR gate and the output signal of the first NOR gate are connected to the input terminal of the ninth NOR gate , the output of the ninth NOR gate is the signal Cout.

The signal A and the signal B are respectively set with m bits, and the sign bit control signal Cr is set with 1 bit and are respectively connected to different full subtractor units FM.

When the sign bit control signal Cr is 0, the entire circuit performs m-bit subtraction, and outputs a total of m+1 bits. The operation result Sm-1 to operation result S0 indicates a difference, and the borrow output signal Cout of the circuit indicates a difference. Sign bit; when the sign bit control signal Cr is 1, the entire circuit performs m-bit addition operation, and outputs a total of m+1 bits, and the borrow output signal Cout of the circuit represents the highest bit of the sum, and the operation result Sm-1 to The operation result S0 represents the other bits of the sum.

The XOR operation makes the signal B and the sign bit control signal Cr perform a NOR operation through the first-stage NOR gate, and the output signal of the first NOR gate passes through the second-stage NOR gate and the signal B and the sign bit respectively The control signal Cr performs a NOR operation, and the two obtained NOR operation results are ORed through an OR gate and then output.

Compared with the prior art, the present invention has the following beneficial effects: based on the full subtractor unit, the cascaded m-bit full subtractor unit becomes an m-bit subtractor, and by increasing the sign bit control signal and the XOR operation logic, it can At the same time, it controls the addition and subtraction operations of m bits. The invention can be applied to addition and subtraction at the same time, thereby reducing the number of logic gates and circuit area.

Description of drawings

The XOR circuit represented by the NOR gate in Fig. 1;

The schematic diagram of the circuit structure of the full subtractor unit of Fig. 2;

The overall structure schematic diagram of Fig. 3 circuit of the present invention;

detailed description

The present invention will be described in further detail below in conjunction with the accompanying drawings.

Referring to Fig. 1-3, the Boolean expression of the full subtractor unit of the present invention is as follows:

The XOR operation in Boolean expressions can be realized with two stages of three NOR gates and one OR gate.

The one-bit full subtractor unit as the basic unit of the subtractor cascade is composed of six-level NOR gates. The six-level NOR gates have a symmetrical structure and are connected in series from input to output. The first NOR gate in the six-level NOR gates, The input terminals of the second NOR gate, the third NOR gate, the fifth NOR gate and the sixth NOR gate are connected to the input signal, and the output terminals of the eighth NOR gate and the ninth NOR gate are connected to the output signal. The input signal includes the signal A as the subtrahend, the signal B as the subtrahend, and the low-order borrow signal Cin, and the output signal includes the operation result signal S and the high-order borrow signal Cout. The signal A as the subtrahend is connected to one input terminal of the fifth and sixth NOR gates, and the signal B as the subtrahend and the low-bit borrow signal Cin are connected to the input terminals of the first and second NOR gates respectively superior. The output terminal of the first NOR gate is connected with the signal B to the input terminal of the second NOR gate, and the output terminal of the first NOR gate is connected with the input terminal of the third NOR gate with the low bit borrow signal Cin. The output terminals of the second NOR gate and the third NOR gate are connected to the two input terminals of the fourth NOR gate, and the output of the fourth NOR gate and signal A are connected to the two input terminals of the fifth NOR gate . The output of the fifth NOR gate and the output of the fourth NOR gate are connected to the two inputs of the seventh NOR gate, and the output of the fifth NOR gate and signal A are connected to the two inputs of the sixth NOR gate . The output of the sixth NOR gate and the output of the seventh NOR gate are connected to the two input ends of the eighth NOR gate, and the output of the eighth NOR gate is the operation result signal S. The output of the seventh NOR gate and the output of the first NOR gate are connected to the input terminal of the ninth NOR gate, and the output of the ninth NOR gate is Cout.

Referring to FIG. 3 , the full subtractor units FM in the present invention are cascaded to form an m-bit addition and subtraction circuit. The m-level circuit structure is the same, and the circuit structure of the first level is used to illustrate the signal connection relationship of each level. m is the input signal of the addition and subtraction circuit, A and B, and the sign bit control signal Cr. Both A and B are m bits, and Cr is 1 bit. Input A as a minuend or an addend, and the lowest bit A0 of A is connected to the minuend input terminal of the one-bit full subtractor unit FM of the first stage. Input B as the subtrahend or addend, and the lowest bit B0 of B is connected to an XOR circuit. Referring to Figure 1, the input of the XOR circuit is B0 and the signal Cr, which are connected to the two input terminals of the first NOR gate in the XOR circuit, and the output of the first NOR gate and B0 are connected to the input of the second NOR gate Terminal, the output of the first NOR gate and Cr are connected to the input terminal of the third NOR gate. The output of the second NOR gate and the output of the third NOR gate are connected to the input terminal of the fourth OR gate, and the output of the fourth OR gate is connected to the subtrahend input terminal of the one-bit full subtracter unit FM.

The output of the first-stage full subtractor unit FM is connected to the output signal S0, and its output signal to the high-order borrow is connected to the low-order borrow input terminal of the next-stage full subtractor unit. The connection relationship between the second to the mth stage circuits is the same as that of the first stage, and the sign bit control signal Cr and the signals B1, B2, ... Bm-1 are respectively connected to the first NOR of the XOR circuit in each stage circuit. gate input. The sign bit control signal Cr is connected to the low-order borrow input terminal of the first-stage full subtractor circuit, and the highest-stage borrow output is Cout.

When the sign bit control signal Cr is 0, the entire circuit performs m-bit subtraction, and outputs a total of m+1 bits. Sm-1 to S0 represent the difference, and the borrow output Cout of the circuit represents the sign bit of the difference.

When the sign bit control signal Cr is 1, the entire circuit performs m-bit addition operation, and outputs a total of m+1 bits. Cout represents the highest bit of the sum, and Sm-1 to S0 represent the other bits of the sum.

The circuit in Fig. 2 is represented by an abstract unit FM, and the structure of the m-bit addition and subtraction circuit of the present invention is shown in Fig. 3 .

The borrow input terminal of the first-stage full subtractor unit is connected to the sign bit control signal Cr as the lowest bit borrow input, the output terminal is S0 and the high bit borrow output is Cout0. The highest-order borrow output Cout0 is directly connected to the low-order borrow input of the second-stage full subtractor unit. According to this connection scheme, the full subtractor units from the second stage to the m-1th stage are cascaded, and between the stages, the borrow output of the lower full subtractor unit is directly connected to the borrow of the higher stage unit input. The last stage is the full subtractor unit of the m-1th stage. One of the input terminals is connected to the highest bit Am-1 of the input signal A, and the other is connected to the XOR result of the sign bit control signal Cr and the highest bit Bm-1 of the input signal B. , the output terminal is Sm-1 and the borrow output Cout to the high bit, and the borrow output Cout of the last stage is reserved as the borrow output of the whole subtraction circuit.

The operating principle of the m-bit addition and subtraction circuit of the present invention is as follows:

When the sign bit control signal Cr is 0, after each bit of the input signal B is XORed with the sign bit control signal Cr, the value sent to the input terminal of the full subtractor unit FM is still the input signal B itself, and the whole circuit proceeds as The subtraction operation calculates the difference between the minuend A and the subtrahend B, and the output includes the m-bit difference S and the borrow output Cout, a total of m+1 bits. When this circuit performs subtraction, Cout is reserved as the highest bit, which is used to represent the sign bit of the result S. Boolean expressions are:

S=A-B

When the sign bit control signal Cr is 1, after each bit of the input signal B is XORed with the sign bit control signal Cr, what is sent to the input terminal of the full subtractor unit FM is the inversion of the B value, and the first stage full subtractor unit FM The borrow signal Cin input is set to 1, and the whole circuit performs addition operation, calculating the sum of the summand A and the addend B, and the output includes m-bit sum S and carry output Cout, a total of m+1 bits, for addition operation When , Cout is used as the highest bit of the sum, and the sum has m+1 bits in total. Boolean expressions are:

Claims (6)

1. a kind of addition and subtraction universal circuit of tape symbol control end, it is characterised in that：Include the full subtracter unit F M of m cascades, Each full subtracter unit F M input signal includes the signal A as minuend or summand and is used as subtrahend or the letter of addend Number B, described signal B and sign bit control signal Cr carry out XOR, and are connected to full subtracter unit F M subtrahend or add Number input；The output signal of each full subtracter unit F M includes operation result signal S, described sign bit control signal The low level that Cr is connected to first order full subtracter unit F M borrows input, and the highest level output signal that borrows is signal Cout； When described sign bit control signal Cr takes 0, what whole circuit was carried out is subtraction；When described sign bit control signal When Cr takes 1, what whole circuit was carried out is add operation；Described m is positive integer.

2. the addition and subtraction universal circuit of tape symbol control end according to claim 1, it is characterised in that：M cascade it is complete Subtract among device unit F M, first order full subtracter unit F M low level borrows signal Cin bound symbols position control signal Cr as most Low level borrows input, and described first order full subtracter unit F M output first order operation result signal S0 and the first order are to height Position borrows output signal Cout0, and the first order borrows output signal Cout0 to a high position and is connected to the low of second level full subtracter unit F M Position borrows input, and by that analogy, the second level is cascaded to m-1 grades of full subtracter unit F M, between at different levels, low one-level Full subtracter unit borrow that output is directly connected to paramount primary unit borrow input.

3. the addition and subtraction universal circuit of tape symbol control end according to claim 1, it is characterised in that：Full subtracter unit F M Signal B and low level borrow the input that signal Cin is connected to the first nor gate, the output signal and letter of the first nor gate Number B is connected to the input of the second nor gate, output signal and the low level of the first nor gate borrow signal Cin be connected to the 3rd or The input of NOT gate；The output end of second nor gate and the 3rd nor gate is connected to two inputs of four nor gate；4th The output signal of nor gate is connected to two inputs of the 5th nor gate with signal A；The output signal of 5th nor gate and the The output signal of four nor gate is connected to two inputs of the 7th nor gate, and the output signal and signal A of the 5th nor gate connect It is connected on two inputs of the 6th nor gate；The output signal of 6th nor gate and the output signal of the 7th nor gate are connected to On two inputs of eight nor gates, the output signal of the 8th nor gate is operation result signal S；The output letter of 7th nor gate Number and the output signal of the first nor gate be connected on the input of the 9th nor gate, the 9th nor gate is output as signal Cout。

4. the addition and subtraction universal circuit of tape symbol control end according to claim 1, it is characterised in that：The signal A with Signal B is respectively arranged with m, and sign bit control signal Cr is provided with 1 and is respectively connecting to different full subtracter unit F M.

5. the addition and subtraction universal circuit of tape symbol control end according to claim 1, it is characterised in that：When described symbol When position control signal Cr takes 0, whole circuit carries out m subtractions, exports common m+1, operation result Sm-1 to operation result S0 represents poor, circuit borrow output signal Cout represent difference sign bit；When described sign bit control signal Cr takes 1, Whole circuit carries out m add operations, common m+1 of output, and circuit borrows the highest order that output signal Cout represents sum, computing As a result Sm-1 to operation result S0 represents other positions of sum.

6. the addition and subtraction universal circuit of tape symbol control end according to claim 1, it is characterised in that：Described XOR fortune Calculate makes signal B and sign bit control signal Cr carry out NOR-operation, the output signal of the first nor gate by first order nor gate NOR-operation is carried out with signal B and sign bit control signal Cr by second level nor gate respectively again, by obtain two or Inverse result after OR gate progress or computing by exporting.