CN106933773B - A kind of method of frame assembling in JESD204B agreement - Google Patents
A kind of method of frame assembling in JESD204B agreement Download PDFInfo
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- CN106933773B CN106933773B CN201710141903.5A CN201710141903A CN106933773B CN 106933773 B CN106933773 B CN 106933773B CN 201710141903 A CN201710141903 A CN 201710141903A CN 106933773 B CN106933773 B CN 106933773B
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- 238000000034 method Methods 0.000 title claims abstract description 24
- 239000000945 filler Substances 0.000 claims abstract description 15
- 238000013507 mapping Methods 0.000 claims description 9
- 241001269238 Data Species 0.000 claims description 8
- 238000005192 partition Methods 0.000 claims description 8
- 102100035593 POU domain, class 2, transcription factor 1 Human genes 0.000 claims description 6
- 101710084414 POU domain, class 2, transcription factor 1 Proteins 0.000 claims description 6
- 101100500679 Neurospora crassa (strain ATCC 24698 / 74-OR23-1A / CBS 708.71 / DSM 1257 / FGSC 987) cot-3 gene Proteins 0.000 claims description 4
- 102100035591 POU domain, class 2, transcription factor 2 Human genes 0.000 claims description 4
- 101710084411 POU domain, class 2, transcription factor 2 Proteins 0.000 claims description 4
- 238000005070 sampling Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 3
- 238000009432 framing Methods 0.000 description 3
- 230000000737 periodic effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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Abstract
The present invention relates to the methods that frame in a kind of JESD204B agreement assembles, which comprises predefines the data bit width of input transmitting terminal transport layer；The data bit width is sampled using converter, obtains S sample；Control bit and filler are added, into each sample to form complete word；Wherein, the control bit and filler are located at the end of the word；According to the byte number in each frame, judge whether to decouple the word；Processing is ranked up to the corresponding word of each sample or byte according to judging result, and the result of sequence processing is mapped in corresponding channel, forms the frame in each channel.The method that frame assembles in JESD204B agreement provided by the invention, can assemble the frame for meeting JESD204B protocol requirement.
Description
Technical field
The invention belongs to HSSI High-Speed Serial Interface chip technology field, it is related to a kind of side of frame assembling in JESD204B agreement
Method.
Background technique
JESD204B is a kind of interface for high-speed data acquisition, which provides a kind of by one or more data turn
The method of parallel operation and digital signal processing device interface, the connection being used primarily between ADC and FPGA at present.Compared to common
Parallel data transmission, this is a kind of serial line interface of higher speed.Its speed reaches as high as the channel 12.5Gbps/, uses frame string
Row data link and embedded clock and alignment characters reduce the cabling quantity between device, reduce away lines matching requirement,
And eliminate foundation and keep temporal constraint problem, to simplify the implementation of high-speed converters data-interface.
One JESD204B system specifically includes that data sending part point (TX), high speed serialization part (PHY), data receiver
Partially (RX).It include transport layer and link layer in the data sending terminal of JESD204B.Wherein link layer includes scrambling module, right
Neat module, 8B10B coding module etc..Due to being the frame data link transmission used in JESD204B system, it is transmitting
It needs externally input data carrying out frame assembling in layer.Mapping mode in framing process is matched with as defined in JESD204B agreement
Set relating to parameters.It include: converter number M, port number L, the word that sample number S, the every frame of every frame transmission include in each converter
Joint number (octets) F.At this stage, there are no unified standards at home for JESD204B frame assembled part, therefore can not effectively exist
Frame assembling is carried out in JESD204B agreement.
Summary of the invention
In view of this, can be assembled the purpose of the present invention is to provide the method that frame in a kind of JESD204B agreement assembles
Meet the frame of JESD204B protocol requirement out.
In order to achieve the above objectives, the invention provides the following technical scheme:
A kind of method of frame assembling in JESD204B agreement, which comprises
Predefine the data bit width of input transmitting terminal transport layer；
The data bit width is sampled using converter, obtains S sample；
Control bit and filler are added, into each sample to form complete word；Wherein, the control bit
It is located at the end of the word with filler；
According to the byte number in each frame, judges whether the word being divided into byte and adjust byte order；
Processing is ranked up to the corresponding word of each sample or byte according to judging result, and sequence is handled
As a result it maps in corresponding channel, forms the frame in each channel；
Wherein, when byte number is 1 in each frame, the port number of each converter must be even number.
Further, the data bit width of input transmitting terminal transport layer is determined according to the following equation:
Wherein, DW indicates that the data bit width, F indicate that the byte number in each frame, L indicate the channel in each converter
Number, N indicate the resolution ratio of each converter, and N' indicates the digit of each sample delivery.
Further, according to the byte number in each frame, judge whether that the word is carried out to partition includes:
When the byte number in each frame is 1, the word is divided into identical two bytes of length.
Further, being ranked up processing to the corresponding word of each sample or byte according to judging result includes:
Using the byte data oct0 of digital data word0 as the first byte of data in the last one channel (L-1)；
Using the byte data oct1 of digital data word0 as the first byte of data in penultimate channel (L-2)；
Using the byte data oct2 of digital data word1 as second byte data in the last one channel (L-1)；
Using the byte data cot3 of digital data word1 as second byte data in penultimate channel (L-2)；
And so on, there are four byte datas altogether in each channel, to complete the mapping of byte data to channel data.
Further, according to the byte number in each frame, judge whether that the word is carried out to partition includes:
When the byte number in each frame is 2 or 4 or 8, do not need to decouple the word.
Further, being ranked up processing to the corresponding word of each sample according to judging result includes:
Digital data is sent into corresponding channel according to inverted order arrangement；
Wherein, digital data is sent into corresponding channel according to inverted order arrangement and goes to include: using digital data word0 as last
The last one digital data of one channel (L-1), using digital data word1 as the penultimate in the last one channel (L-1)
Digital data, and so on, there are two digital datas altogether in each channel, to complete the mapping of digital data to channel data.
The invention has the benefit that
The present invention is when carrying out frame assembling, it may be predetermined that the data bit width of input, according to different data bit widths,
When carrying out converter sampling, the sample of available different number.In the present invention, control can be added into sample
Position processed and filler, to form complete word.For the byte number in each frame, it can be determined that whether need to the word into
Row partition.For different judging results, the frame in each channel can be formed using different sortords.It can from above
See, the frame assemble method that the application proposes, for the domestic autonomous high-speed serial interface circuit for realizing JESD204B protocol specification
With certain reference role.
Detailed description of the invention
In order to keep the purpose of the present invention, technical scheme and beneficial effects clearer, the present invention provides following attached drawing and carries out
Illustrate:
Fig. 1 is the method flow diagram of the progress frame assembling in the present invention；
Fig. 2 is frame assembling flow path figure when F is 1 in the present invention；
Fig. 3 is frame assembling flow path figure when F is 2 or 4 or 8 in the present invention；
Fig. 4 is that F is 1 in the present invention and L is 2 time frame assembling process figures；
Fig. 5 is frame assembling process figure when F is 4 in the present invention and L is 1.
Specific embodiment
Below in conjunction with attached drawing, a preferred embodiment of the present invention will be described in detail.
Referring to Fig. 1, the application embodiment provides a kind of method of frame assembling in JESD204B agreement, the method packet
It includes:
S1: the data bit width of input transmitting terminal transport layer is predefined；
S2: the data bit width is sampled using converter, obtains S sample；
S3: control bit and filler are added, into each sample to form complete word；Wherein, the control
Position processed and filler are located at the end of the word；
S4: according to the byte number in each frame, judge whether the word being divided into byte and adjust byte order；
S5: processing is ranked up to the corresponding word of each sample or byte according to judging result, and will be at sequence
The result of reason maps in corresponding channel, forms the frame in each channel.Wherein, when byte number is 1 in each frame, each
The port number of converter must be even number.
In the present embodiment, the data bit width of input transmitting terminal transport layer can be determined according to the following equation:
Wherein, DW indicates that the data bit width, F indicate that the byte number in each frame, L indicate the channel in each converter
Number, N indicate the resolution ratio of each converter, and N' indicates the digit of each sample delivery.
In the present embodiment, according to the byte number in each frame, judge whether that the word is carried out to partition includes:
When the byte number in each frame is 1, the word is divided into identical two bytes of length.
In the present embodiment, processing is ranked up to the corresponding word of each sample or byte according to judging result
Include:
Using the byte data oct0 of digital data word0 as the first byte of data in the last one channel (L-1)；
Using the byte data oct1 of digital data word0 as the first byte of data in penultimate channel (L-2)；
Using the byte data oct2 of digital data word1 as second byte data in the last one channel (L-1)；
Using the byte data cot3 of digital data word1 as second byte data in penultimate channel (L-2)；
And so on, there are four byte datas altogether in each channel, to complete the mapping of byte data to channel data.
In the present embodiment, according to the byte number in each frame, judge whether that the word is carried out to partition includes:
When the byte number in each frame is 2 or 4 or 8, do not need to decouple the word.
In the present embodiment, being ranked up processing to the corresponding word of each sample according to judging result includes:
Digital data is sent into corresponding channel according to inverted order arrangement；
Wherein, digital data is sent into corresponding channel according to inverted order arrangement and goes to include: using digital data word0 as last
The last one digital data of one channel (L-1), using digital data word1 as the penultimate in the last one channel (L-1)
Digital data, and so on, there are two digital datas altogether in each channel, to complete the mapping of digital data to channel data.
Specifically, the input data bit wide supported in transmitting terminal transport layer is DW=M*S*N, and wherein M is an equipment
The number of middle converter, S are each converter each cycle number of samples, and N is converter resolution.And because F=(M*S*N ')/
(8L).ToF=1,4,8；F=2.Wherein, each sample in format of user data
Total bit is N '=16；The value range of port number L is 1≤L≤8, the resolution, N of converter can value (12,13,14,
15,16).And the byte number (octets) of each frame is that F can value (1,2,4,8).Addible control digit in each sample
CS value is 0 or 1.Control word is CF=0 in each frame, i.e., control word is free of in frame.Filler T is added after control bit.Root
According to the difference of F value, corresponding framing mode also slightly has difference, and the main distinction is whether want after sample forms a word
Two bytes are split as, and processing is ranked up to byte.
As F=1, system transmitting terminal framing process (sets N=14, control bit C and filler T to be located at as shown in Figure 2
Word [1:0], if N=13, word [15:3, T, C, C]).One equipment can have M converter, each converter resolution
For N, each frame period each converter can sample S sample.After converter sampling sample S, sample is added first
Control bit C and filler T, and a complete Word [15:0] is formed, wherein control bit C and filler T is located at each word
End.If F=1 at this time, using the byte data oct0 of digital data word0 as the first byte in the last one channel (L-1)
Data；Using the byte data oct1 of digital data word0 as the first byte of data in penultimate channel (L-2)；By number of words
According to the byte data oct2 of word1 as second byte data in the last one channel (L-1)；By digital data word1's
Byte data cot3 is as second byte data in penultimate channel (L-2)；And so on, each channel shares four
A byte data, to complete the mapping of byte data to channel data.
Digital data is then sent into corresponding channel by the case where for F=(2,4,8) according to inverted order arrangement；
Wherein, digital data is sent into corresponding channel according to inverted order arrangement and goes to include: using digital data word0 as last
The last one digital data of one channel (L-1), using digital data word1 as the penultimate in the last one channel (L-1)
Digital data, and so on, there are two digital datas altogether in each channel, to complete the mapping of digital data to channel data.Such as Fig. 3 institute
Show.
For example, the case where Fig. 4 is F=1, L=2, N=14, N '=16, CS=1, CF=0.DW then can be obtained by formula
=14bits.Need a converter, one sample data S0 of each frame periodic sampling.Data word is converted the samples into, i.e.,
Add control bit C and filler T.Data word0 is split as two byte datas oct0 and oct1, data oct0 feeding channel
First byte of data in 1 as channel 1, data oct1 are sent into the first byte of data in channel 0 as channel 0.
Fig. 5 is F=4, L=1, N=14, N '=16, CS=1, CF=0 the case where.DW=28bits then can be obtained by formula.
Need a converter, each frame periodic sampling 2 samples S0, S1.Each sample is plus control bit C and filler T composition one
A complete word, word0 and word1 are finally exchanged and be mapped in the lane of channel.
It can be seen that in this application, the data of bit wide can be corresponded to according to the setting of relevant parameter, converter sampling,
Then by adding control bit and filler and adjustment data sequence to complete frame assembling, last output data to link layer.
If should be noted that N=16, because of N '=16, then at this time without adding control bit in normal direction sample without filling out
Fill position.
The invention has the benefit that
The present invention is when carrying out frame assembling, it may be predetermined that the data bit width of input, according to different data bit widths,
When carrying out converter sampling, the sample of available different number.In the present invention, control can be added into sample
Position processed and filler, to form complete word.For the byte number in each frame, it can be determined that whether need to the word into
Row partition.For different judging results, the frame in each channel can be formed using different sortords.It can from above
See, the frame assemble method that the application proposes, for the domestic autonomous high-speed serial interface circuit for realizing JESD204B protocol specification
With certain reference role.
Finally, it is stated that preferred embodiment above is only used to illustrate the technical scheme of the present invention and not to limit it, although logical
It crosses above preferred embodiment the present invention is described in detail, however, those skilled in the art should understand that, can be
Various changes are made to it in form and in details, without departing from claims of the present invention limited range.
Claims (5)
1. a kind of method that frame assembles in JESD204B agreement, which is characterized in that the described method includes:
Predefine the data bit width of input transmitting terminal transport layer；
The data bit width is sampled using converter, obtains S sample；
Control bit and filler are added, into each sample to form complete word；Wherein, it the control bit and fills out
Fill the end that position is located at the word；
According to the byte number in each frame, judges whether the word being divided into byte and adjust byte order；
Processing, and the result that sequence is handled are ranked up to the corresponding word of each sample or byte according to judging result
It maps in corresponding channel, forms the frame in each channel；
Wherein, when byte number is 1 in each frame, the port number of each converter must be even number；
The data bit width of input transmitting terminal transport layer is determined according to the following equation:
Wherein, DW indicates that the data bit width, F indicate that the byte number in each frame, L indicate the port number in each converter, N
Indicate the resolution ratio of each converter, N' indicates the digit of each sample delivery.
2. the method according to claim 1, wherein judging whether will be described according to the byte number in each frame
Word carries out partition
When the byte number in each frame is 1, the word is divided into identical two bytes of length.
3. according to the method described in claim 2, it is characterized in that, according to judging result to the corresponding word of each sample or
Person's byte is ranked up processing
Using the byte data oct0 of digital data word0 as the first byte of data in the last one channel (L-1)；
Using the byte data oct1 of digital data word0 as the first byte of data in penultimate channel (L-2)；
Using the byte data oct2 of digital data word1 as second byte data in the last one channel (L-1)；
Using the byte data cot3 of digital data word1 as second byte data in penultimate channel (L-2)；
And so on, there are four byte datas altogether in each channel, to complete the mapping of byte data to channel data.
4. the method according to claim 1, wherein judging whether will be described according to the byte number in each frame
Word carries out partition
When the byte number in each frame is 2 or 4 or 8, do not need to decouple the word.
5. according to the method described in claim 4, it is characterized in that, according to judging result to the corresponding word of each sample into
Row sequence is handled
Digital data is sent into corresponding channel according to inverted order arrangement；
Wherein, digital data is sent into corresponding channel according to inverted order arrangement and goes to include: using digital data word0 as the last one
The last one digital data in channel (L-1), using digital data word1 as the penultimate number of words in the last one channel (L-1)
According to, and so on, there are two digital datas altogether in each channel, to complete the mapping of digital data to channel data.
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| CN116257484A (en) * | 2021-12-10 | 2023-06-13 | 华为技术有限公司 | Data transmission chip and electronic equipment |
| CN115714638B (en) * | 2022-11-14 | 2023-04-04 | 成都博宇利华科技有限公司 | Time system information transmission method based on JESD204B |
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| CN103678729A (en) * | 2013-12-12 | 2014-03-26 | 中国电子科技集团公司第四十一研究所 | High-speed A/D sampling data real-time storage method achieved based on FPGA |
| CN104243083A (en) * | 2013-06-07 | 2014-12-24 | 中兴通讯股份有限公司 | Data mapping method, device and electronic equipment thereof |
| CN105681348A (en) * | 2016-03-16 | 2016-06-15 | 苏州云芯微电子科技有限公司 | Four-byte framing method suitable for JESD204B protocol |
| CN106160912A (en) * | 2016-07-19 | 2016-11-23 | 华为技术有限公司 | A kind of coded method, relevant device and system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US7642939B2 (en) * | 2008-05-15 | 2010-01-05 | Samplify Systems, Inc. | Configurations for data ports at digital interface for multiple data converters |
| US9785592B2 (en) * | 2014-01-22 | 2017-10-10 | Avago Technologies General Ip (Singapore) Pte. Ltd. | High density mapping for multiple converter samples in multiple lane interface |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104243083A (en) * | 2013-06-07 | 2014-12-24 | 中兴通讯股份有限公司 | Data mapping method, device and electronic equipment thereof |
| CN103678729A (en) * | 2013-12-12 | 2014-03-26 | 中国电子科技集团公司第四十一研究所 | High-speed A/D sampling data real-time storage method achieved based on FPGA |
| CN105681348A (en) * | 2016-03-16 | 2016-06-15 | 苏州云芯微电子科技有限公司 | Four-byte framing method suitable for JESD204B protocol |
| CN106160912A (en) * | 2016-07-19 | 2016-11-23 | 华为技术有限公司 | A kind of coded method, relevant device and system |
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