CN106877959B - A method, device and system for clock synchronization - Google Patents

Abstract

The embodiment of the invention discloses a kind of synchronous method, apparatus and system of clock, this method comprises: main equipment encapsulates the first time value of generation and the first residence time obtained to the first message, and first message are sent to from equipment；The main equipment is received by second message sent from equipment；Wherein, second message includes third residence time；The main equipment obtains the 4th residence time and the 4th time value when receiving second message；Third residence time in 4th time value, the 4th residence time and second message is encapsulated into third message by the main equipment, and the third message is sent to from equipment.

Description

A method, device and system for clock synchronization

technical field

The present invention relates to network communication technology, and in particular, to a method, device and system for clock synchronization.

Background technique

In the existing communication equipment, most of the solutions for time synchronization among the equipment are based on the network measurement and control system proposed by the Institute of Electrical and Electronics Engineers (IEEE, Institute of Electrical and Electronics Engineers) in 2002 and modified in 2007 It is implemented by the precision clock synchronization protocol standard, which is also known as the IEEE 1588 protocol.

At present, in the application of the IEEE 1588 protocol, the IEEE 1588 protocol is usually processed in a distributed architecture networking mode, that is, each network service node runs a set of the IEEE 1588 protocol system, which has the advantage of being able to expand the network nodes. However, because each network node has to find the best clock of each interface in the network node by running the best master clock algorithm (BMC, Best MasterClock algorithm), and the clock of each interface in the local node comes from the previous one The clock of the master device, which results in strong coupling between network nodes. Therefore, maintenance in the event of a failure is more difficult and implementation is more complex.

In addition, the IEEE 1588 protocol has strict requirements on the transmission residency of the transport network, that is, the delay between the devices participating in time synchronization must be a relatively fixed value, and the two-way dwell time of the devices must be equal, otherwise the time Synchronization produces large errors. In the Optical Transport Network (OTN, Optical Transport Network) network, due to the phenomenon of link asymmetry and OTN frame processing delay, it may cause a certain error in the two-way residence time of the devices involved in time synchronization. The precision of time synchronization between devices participating in time synchronization.

SUMMARY OF THE INVENTION

In view of this, embodiments of the present invention are expected to provide a clock synchronization method, device, and system, which reduces the coupling between network nodes during time synchronization and improves the accuracy of time synchronization between devices participating in time synchronization.

In order to achieve the above object, the technical scheme of the present invention is achieved in this way:

In a first aspect, an embodiment of the present invention provides a method for time synchronization. The method is applied to a master device, and the method includes: the master device encapsulates the generated first time value and the obtained first dwell time into a first message, and send the first message to the slave device; the master device receives the second message sent by the slave device; wherein, the second message includes a third dwell time; the When receiving the second packet, the master device obtains the fourth dwell time and the fourth time value; the master device obtains the fourth time value, the fourth dwell time and the value in the second packet The third dwell time is encapsulated into a third packet, and the third packet is sent to the slave device.

In the above solution, the main device includes a first main control board and at least one first service board; the first message is a sync message; the second message is a delay-req message; the The third packet is a delay-resp packet.

In the above solution, the master device encapsulates the generated first time value and the obtained first dwell time into a first packet, and sends the first packet to the slave device, specifically including: the first packet A main control board records the first time value T ₁ for generating the sync message when generating the sync message, and encapsulates the first time value T ₁ in the reserved field of the sync message; The first main control board sends the sync message to the first service board, and records the time Tout ₁ when the first main control board sends the sync message; the first service board parses the sync message, obtain the time Tout ₁ when the first main control board sends the sync message; the first service board records the first service when sending the sync message to the slave device the time tout ₁ when the board sends the sync message, and obtains the data according to the time Tout ₁ when the first main control board sends the sync message and the time tout ₁ when the first service board sends the sync message The first dwell time Δt ₁ and the correction field ΔT ₁ encapsulating the first dwell time Δt ₁ in the sync message are sent to the slave device.

In the above solution, the master device obtains the fourth dwell time and the fourth time value when receiving the second message, which specifically includes: when the first service board receives the delay-req message , record the time tin ₄ when the first service board receives the delay-req message; the first service board sends the delay-req message to the first main control board; the first main control board The control board records the time Tin ₄ when the delay-req message is received, and parses the delay-req message to obtain the time tin ₄ when the encapsulated first service board receives the delay-req message, and obtains the Fourth dwell time Δt ₄ ; the first main control board records and parses the fourth time value T ₄ of the delay-req message.

In the above solution, the master device encapsulates the fourth time value, the fourth dwell time, and the third dwell time in the second packet into a third packet, and encapsulates the third packet in the third packet. The message is sent to the slave device, which specifically includes: the first main control board generates the delay-resp message, and sends the fourth time value T ₄ , the fourth dwell time Δt ₄ and the delay-req The _third dwell time Δt3 in the message correction field is encapsulated into the delay-resp message, and the delay-resp message is sent to the first service board; the first service board receives the the delay-resp message sent by the first main control board, and send the delay-resp message to the slave device.

In a second aspect, an embodiment of the present invention provides a method for time synchronization. The method is applied to a slave device. The method includes: when the slave device receives a first packet, acquiring a first dwell time, a second dwell time, and a second dwell time. time, the first time value, and the second time value; the slave device records the third time value, encapsulates the obtained third dwell time into a second packet, and sends the second packet to the master device; the slave device When receiving the third packet, obtain the fourth time value, the fourth dwell time included in the third packet, and the third dwell time in the second packet, two time values, the third time value and the fourth time value, and the first dwell time, the second dwell time, the third dwell time and the fourth dwell time, the calculated time offset and delay between the master device and the slave device.

In the above solution, the slave device includes a second main control board and at least one second service board; the first message is a sync message; the second message is a delay-req message; the The third packet is a delay-resp packet.

In the above solution, the slave device acquires the first dwell time, the second dwell time, the first time value and the second time value when receiving the first packet, which specifically includes: the second service board is in When receiving the sync message, record the time tin ₂ when the second service board receives the sync message; the second service board sends the sync message to the second main control board; The second main control board records the time Tin ₂ when the sync message is received; and parses the sync message to obtain the time tin ₂ when the second service board that is encapsulated receives the sync message, and obtains the first Two dwell time Δt ₂ ; the second main control board records the second time value T ₂ for parsing the sync message; the second main control board records the first dwell time in the correction field ΔT ₁ of the sync message The reservation time Δt ₁ and the first time value T ₁ in the reservation field.

In the above solution, the slave device records the third time value, encapsulates the acquired third dwell time into a second packet, and sends the second packet to the master device, specifically including: the first The second main control board records the third time value T ₃ for generating the delay-req message when generating the delay-req message; the second main control board sends the delay-req message to the the second service board, and records the time Tout ₃ when the second main control board sends the delay-req message; the second service board parses the delay-req message to obtain the second main control board Time Tout ₃ for sending the delay-req message; when the second service board sends the delay-req message to the master device, it records that the second service board sends the delay-req message time _{tout 3 of} the message, and obtain the first Three dwell times Δt ₃ , and the third dwell time Δt ₃ is encapsulated in the correction field ΔT ₂ of the delay-req message and sent to the master device.

In the above solution, when receiving the third packet, the slave device obtains the fourth time value included in the third packet, the fourth dwell time, and the third dwell time in the second packet, and According to the first time value, the second time value, the third time value and the fourth time value, and the first dwell time, the second dwell time, the third dwell time and the The fourth residence time is to calculate the time deviation and delay between the master device and the slave device, which specifically includes: the slave device uses the synchronization mechanism of the Precision Time Protocol PTP, according to the first time value, Timestamps T ₁ , T ₂ , T ₃ , and T ₄ corresponding to the second time value, the third time value, and the fourth time value, respectively, as well as the first dwell time Δt ₁ , the second dwell time The time Δt ₂ , the third dwell time Δt ₃ and the fourth dwell time Δt ₄ are used to calculate the time deviation and delay between the master device and the slave device; wherein, the first dwell time Δt ₁ is stored in all The correction field ΔT ₁ =Δt ₁ of the first packet, and the third dwell time Δt ₃ is stored in the correction field ΔT ₂ =Δt ₃ of the second packet.

In a third aspect, an embodiment of the present invention provides a main device, the main device includes: a first main control board and a first service board; wherein the first main control board is used to generate a first time value encapsulating a first packet with the acquired first dwell time; the first service board is configured to send the first packet to a slave device; and receive a second packet sent by the slave device ; the second message includes a third dwell time; the first main control board is further configured to obtain the fourth dwell time and the fourth dwell time when the first service board receives the second message time value; and encapsulating the fourth time value, the fourth dwell time, and the third dwell time in the second packet into a third packet; the service board is further configured to encapsulate the The third message is sent to the slave device.

In the above solution, the first message is a sync message; the second message is a delay-req message; and the third message is a delay-resp message.

In the above solution, the first main control board is specifically configured to record the first time value T ₁ for generating the sync message when generating the sync message, and encapsulate the first time value T ₁ In the reserved field of the sync message; And, the sync message is sent to the first service board, and the time Tout ₁ for sending the sync message is recorded; the first service board, specifically using In parsing the sync message, obtain the time Tout ₁ for sending the sync message; And, when sending the sync message to the slave device, record the time Tout ₁ for sending the sync message , and obtain the first dwell time Δt ₁ according to the time Tout ₁ when the first main control board sends the sync message and the time tout ₁ when the first service board sends the sync message, and the The first dwell time Δt ₁ is encapsulated in the correction field ΔT ₁ in the sync message and sent to the slave device.

In the above solution, the first service board is specifically configured to, when receiving the delay-req message, record the time tin ₄ when the first service board receives the delay-req message; The delay-req message is sent to the first main control board; the first main control board is specifically configured to record the time Tin ₄ when the delay-req message is received, and parse the delay-req message obtain the time tin ₄ at which the encapsulated first service board receives the delay-req message, obtain the fourth dwell time Δt ₄ ; and record the fourth time for parsing the delay-req message value T ₄ .

In the above solution, the first main control board is specifically configured to generate the delay-resp message, and combine the fourth time value T ₄ in the delay-req message with the delay-req The third dwell time Δt ₃ in the message correction field is encapsulated into the delay-resp message, and the delay-resp message is sent to the first service board; the first service board, specifically using receiving the delay-resp message sent by the first main control board, and sending the delay-resp message to the slave device.

In a fourth aspect, an embodiment of the present invention provides a slave device, where the slave device includes a second main control board and a second service board, wherein the second service board is used to receive a first packet; the first Two main control boards, for acquiring the first dwell time, the second dwell time, the first time value and the second time value; and recording the third time value, and encapsulating the acquired third dwell time into the two packets; the second service board is also used to send the second packet to the main device; and, receive the third packet; the second main control board is also used to obtain the information in the third packet the included fourth time value, the fourth dwell time and the third dwell time in the second message, and according to the first time value, the second time value, the third time value and the fourth time value, And the first dwell time, the second dwell time, the third dwell time and the fourth dwell time, calculate the time deviation between the master device and the slave device and time delay.

In the above solution, the first message is a sync message; the second message is a delay-req message; and the third message is a delay-resp message.

In the above solution, the second service board is specifically configured to, when receiving the sync message, record the time tin ₂ when the second service board receives the sync message; and, report the sync message The message is sent to the second main control board; the second main control board is specifically used to record the time Tin ₂ when the sync message is received; and parse the sync message to obtain the encapsulated second service the time tin ₂ when the board receives the sync message, and obtains the second dwell time Δt ₂ ; the second main control board records and parses the second time value T ₂ of the sync message; The control board records the first dwell time Δt ₁ in the correction field ΔT ₁ of the sync message and the first time value T ₁ in the reservation field.

In the above solution, the second main control board is specifically configured to record the third time value T ₃ for generating the delay-req message when generating the delay-req message; The req message is sent to the second service board, and the time Tout ₃ when the second main control board sends the delay-req message is recorded; the second service board is specifically used to parse the delay-req message, obtain the time Tout ₃ when the second main control board sends the delay-req message; and, when sending the delay-req message to the main device, record the second service board Time tout ₃ of sending the delay-req message, and time Tout 3 of sending the delay-req message by the second main control board and the time Tout ₃ of the second service board sending the delay-req message The time tout ₃ acquires the third dwell time Δt ₃ , and encapsulates the third dwell time Δt ₃ in the correction field ΔT ₂ of the delay-req message and sends it to the master device.

In the above solution, the second main control board is specifically configured to use the synchronization mechanism of the Precision Time Protocol (PTP) according to the first time value, the second time value, the third time value and the first time value. The time stamps T ₁ , T ₂ , T ₃ and T ₄ corresponding to the four time values, as well as the first dwell time Δt ₁ , the second dwell time Δt ₂ , and the third dwell time Δt ₃ and the fourth dwell time Δt ₄ , the time offset and time delay between the master device and the slave device are calculated.

In a fifth aspect, an embodiment of the present invention provides a system for time synchronization, the system includes: a master device and a slave device; wherein,

The master device is configured to encapsulate the generated first time value and the obtained first dwell time into a first message, and send the first message to the slave device; A second message sent from the device; the second message includes a third dwell time; and when receiving the second message, a fourth dwell time and a fourth time value are obtained; wherein the The second packet includes a third dwell time; and encapsulating the fourth time value, the fourth dwell time in the second packet, and the third dwell time in the second packet into a third message, and send the third message to the slave device;

The slave device is used to obtain the first dwell time, the second dwell time, the first time value and the second time value when receiving the first message; The third dwell time is encapsulated into a second packet, and the second packet is sent to the master device; and, when the third packet is received, the fourth time value included in the third packet, the fourth dwell time and the third dwell time in the second message, and according to the first time value, the second time value, the third time value and the fourth time value, and the first dwell time , the second dwell time, the third dwell time and the fourth dwell time, and the time offset and time delay between the master device and the slave device are calculated.

The embodiments of the present invention provide a method, device and system for clock synchronization. Through multiple packet exchanges between the master and slave devices, the two-way residence time of the master and slave devices can be obtained. The two-way residence time of the device sending and receiving can know the delay between the master and slave devices, which reduces the coupling between network nodes during time synchronization and improves the accuracy of time synchronization between devices participating in time synchronization.

Description of drawings

FIG. 1 is a detailed flowchart of a method for clock synchronization provided by an embodiment of the present invention;

FIG. 2 is a schematic schematic diagram of a specific flow of a master device sending a first packet according to an embodiment of the present invention;

3 is a schematic flowchart of a specific process for obtaining a second dwell time and a second time value from a device according to an embodiment of the present invention;

FIG. 4 is a schematic flowchart of a specific process of sending a second packet from a device according to an embodiment of the present invention;

5 is a schematic diagram of a specific flow of a master device acquiring a fourth dwell time and a fourth time value according to an embodiment of the present invention;

6 is a schematic diagram of a specific flow of a master device sending a third packet according to an embodiment of the present invention;

7 is a schematic structural diagram of a master device according to an embodiment of the present invention;

FIG. 8 is a schematic structural diagram of a slave device according to an embodiment of the present invention;

FIG. 9 is a schematic diagram of a specific flow of another master device sending a first packet according to an embodiment of the present invention;

10 is a schematic flowchart of another specific process of acquiring a second dwell time and a second time value from a device according to an embodiment of the present invention;

FIG. 11 is another schematic flowchart of a specific process of sending a second packet from a device according to an embodiment of the present invention;

12 is a schematic schematic diagram of a specific flow of another master device acquiring a fourth dwell time and a fourth time value according to an embodiment of the present invention;

FIG. 13 is a schematic flowchart of another specific flow of a master device sending a third packet according to an embodiment of the present invention;

14 is a schematic flowchart of a time synchronization method on the master side provided by an embodiment of the present invention;

15 is a schematic flowchart of a time synchronization method on a slave device side according to an embodiment of the present invention;

16 is a schematic structural diagram of another master device according to an embodiment of the present invention;

17 is a schematic structural diagram of another slave device provided by an embodiment of the present invention;

FIG. 18 is a schematic structural diagram of a system for time synchronization provided by an embodiment of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

Example 1

Referring to FIG. 1 , a time synchronization method is provided in an embodiment of the present invention. The method can be applied to a time synchronization system, and the system may include: a master device and a slave device that perform message interaction; wherein, the master device includes A first main control board and at least one first service board, and the slave device includes a second main control board and at least one second service board. The method can include:

S101: The master device encapsulates the generated first time value and the obtained first dwell time into a first message, and sends the first message to the slave device;

It should be noted that the first packet may be a synchronization sync packet sent by the master device to the slave device, or may be other types of packets, which are not specifically limited in this embodiment of the present invention. Moreover, the first dwell time is the dwell time of the packet in the master device when the master device sends the packet.

Exemplarily, since the main device may include one first main control board and at least one first service board, the implementation process of step S101 is shown in FIG. 2 , and may specifically include:

S1011: The first main control board records the first time value T ₁ for generating the sync message when generating the sync message, and encapsulates the first time value T ₁ in a reserved field of the sync message; specifically in this embodiment , the first main control board can save the _first time value T1 in the form of a system timestamp, and encapsulate it in the precisetime field of the sync message;

S1012: the first main control board sends the sync message to the first service board, and records the time Tout ₁ when the first main control board sends the sync message; specifically, the time Tout ₁ when the first main control board sends the sync message It can also be saved in the form of a system timestamp, and encapsulated in the field field after the PTP information and before the FCS check in the sync message; it is understandable that T ₁ is earlier than Tout ₁ ;

S1013: The first service board parses the sync message, and obtains the time Tout ₁ when the first main control board sends the sync message;

S1014: When the first service board sends the sync message to the slave device, it records the time tout ₁ when the first service board sends the sync message, and according to the time Tout ₁ when the first main control board sends the sync message and the first service The time tout ₁ when the board sends the sync message obtains the first dwell time Δt ₁ , and encapsulates the first dwell time Δt ₁ in the sync message and sends it to the slave device; specifically, the first dwell time Δt ₁ =tout ₁ -Tout ₁ , the first dwell time can be encapsulated in the correction field of the sync message, so that ΔT ₁ =Δt ₁ .

Optionally, in step S1011, the first time value T ₁ may be encapsulated in a Follow-up message sent after the sync message, and sent to the slave device by the first service board. It should be noted that, for the Follow-up message Up packets, the first service board is only responsible for sending, and does not perform other processing such as parsing.

S102: When the slave device receives the first message, obtain the first time value, the second time value, the first dwell time and the second dwell time;

It should be noted that the second dwell time is the dwell time of the packet in the slave device during the process of receiving the packet by the slave device. It can be understood that, in this embodiment, the first packet is a sync packet as an example for description. In this case, the slave device obtains the first time value, the second time value, the first dwell time, and the second dwell time.

Exemplarily, since the slave device may include a second main control board and at least one second service board, the implementation process of step S102 is shown in FIG. 3 , and may specifically include:

S1021: when the second service board receives the sync message, record the time tin ₂ when the second service board receives the sync message; specifically, the time tin ₂ when the second service board receives the sync message can also pass the system timestamp It is stored in the form of the sync message and encapsulated in the field field after the PTP information and before the FCS check in the sync message;

S1022: The second service board sends the sync message to the second main control board;

S1023: the second main control board records the time Tin ₂ when the sync message is received; and parses the sync message to obtain the time tin ₂ when the encapsulated second service board receives the sync message, and obtains the second dwell time Δt ₂ ;

Specifically, the second main control board can obtain tin ₂ by parsing the fields in the sync packet after the PTP information and before the FCS check, and then obtain the second dwell time according to Δt ₂ =Tin ₂ -tin ₂ .

S1024: The second main control board records and parses the second time value T ₂ of the sync message. Specifically, in this embodiment, the second main control board may save the second time value T ₂ in the form of a system time stamp; , record the first dwell time Δt ₁ in the correction field ΔT ₁ of the sync message and the first time value T ₁ in the precisetime field.

S103: The slave device records the third time value, encapsulates the obtained third dwell time into a second message, and sends the second message to the master device;

It should be noted that the second packet may be a delay-req packet sent by the slave device to the master device, or may be other types of packets, which are not specifically limited in this embodiment of the present invention. Moreover, the third dwell time is the dwell time of the message in the slave device when the slave device sends the message.

Exemplarily, since the slave device may include one second main control board and at least one second service board, the implementation process of step S103 is shown in FIG. 4 , and may specifically include:

S1031: When generating the delay-req message, the second main control board records the third time value T ₃ for generating the delay-req message; specifically in this embodiment, the second main control board may record the third time value T ₃ Save in the form of system timestamp;

S1032: The second main control board sends the delay-req message to the second service board, and records the time Tout ₃ when the second main control board sends the delay-req message; specifically, the second main control board sends the delay-req message The time Tout ₃ of the message can also be saved in the form of a system timestamp, and encapsulated in the field field after the PTP information and before the FCS check in the delay-req message; it is understandable that T ₃ is earlier than Tout ₃ ;

S1033: The second service board parses the delay-req message, and obtains the time Tout ₃ at which the second main control board sends the delay-req message;

S1034: When the second service board sends the delay-req message to the master device, it records the time tout ₃ at which the second service board sends the delay-req message, and according to the time at which the second main control board sends the delay-req message Tout ₃ obtains the third dwell time Δt ₃ at the time tout ₃ at which the delay-req message is sent by the second service board, and encapsulates the third dwell time in the delay-req message and sends it to the master device; specifically, the third dwell time is Three dwell times Δt ₃ =Tout ₃ -tout ₃ , and the third dwell time Δt ₃ can be encapsulated in the correction field of the delay-req message, so that ΔT ₂ =Δt ₃ .

S104: When receiving the second packet, the master device obtains a fourth dwell time and a fourth time value;

It should be noted that the fourth dwell time is the dwell time of the packet in the master device during the process of receiving the packet by the master device.

Exemplarily, since the main device may include one first main control board and at least one first service board, the implementation process of step S104 is shown in FIG. 5 , and may specifically include:

S1041: When receiving the delay-req message, the first service board records the time tin ₄ when the first service board receives the delay-req message; specifically, the time when the first service board receives the delay-req message can also be passed through the system It is stored in the form of timestamp and encapsulated in the field field of the delay-req packet after the PTP information and before the FCS check;

S1042: The first service board sends the delay-req message to the first main control board;

S1043: The first main control board records the time Tin ₄ when the delay-req message is received, and parses the delay-req message to obtain the time tin ₄ when the encapsulated first service board receives the delay-req message, and obtains the fourth stay time Δt ₄ ;

Specifically, the first main control board can obtain tin ₄ by parsing the fields in the delay-req message after the PTP information and before the FCS check, and then obtain the fourth resident according to Δt ₄ =Tin ₄ -tin ₄ time.

S1044: The first main control board records and parses the fourth time value T ₄ of the delay-req message; specifically in this embodiment, the first main control board may store the fourth time value T ₄ in the form of a system time stamp .

S105: The master device encapsulates the fourth time value, the fourth dwell time, and the third dwell time in the second message into a third message, and sends the third message to the slave device;

It should be noted that the third packet may be a delay-resp packet sent by the master device to the slave device, or may be other types of packets, which are not specifically limited in this embodiment of the present invention.

Exemplarily, since the main device may include a first main control board and at least one first service board, the implementation process of step S105 is shown in FIG. 6 , and may specifically include:

S1051: The first main control board generates a delay-resp message, and modifies the fourth time value T ₄ , the fourth dwell time Δt ₄ in the delay-req message, and the third dwell time in the delay-req message field. Time Δt ₃ encapsulates the delay-resp message, and sends the delay-resp message to the first service board;

S1052: The first service board receives the delay-resp message sent by the first main control board, and sends the delay-resp message to the slave device.

S106: When receiving the third packet, the slave device acquires the fourth time value, the fourth dwell time, and the third dwell time in the second packet, and obtains the fourth time value, the fourth dwell time, and the third dwell time in the second packet, The third time value and the fourth time value, as well as the first dwell time, the second dwell time, the third dwell time and the fourth dwell time, calculate the distance between the master device and the slave device The current time of the slave device is adjusted by the time deviation and delay, so that the time of the master and slave devices is synchronized.

It should be noted that the third packet may be a delay-resp packet sent by the master device to the slave device, or may be other types of packets, which are not specifically limited in this embodiment of the present invention.

In addition, the first time value T ₁ can be obtained from the precisetime field of the sync packet received by the slave device, and the value ΔT' ₁ in the correction field of the first packet can also be found in the correction field of the sync packet. obtained in.

In the specific implementation process, by the synchronization mechanism of the Precision Time Protocol (PTP, Precision Time Protocol), according to the timestamps T ₁ , T corresponding to the first time value, the second time value, the third time value and the fourth time value respectively ₂ , T ₃ and T ₄ , as well as the first dwell time Δt ₁ , the second dwell time Δt ₂ , the third dwell time Δt ₃ and the fourth dwell time Δt ₄ , to calculate the distance between the master device and the slave device where the first dwell time Δt ₁ is stored in the correction field ΔT ₁ =Δt ₁ of the first packet, and the third dwell time Δt ₃ is stored in the correction field ΔT ₂ = Δt ₃ .

Specifically, according to the time offset and delay Calculate the time deviation and delay between the master and slave devices, and then obtain the current time of the first master control board according to the PTP, which realizes the synchronization of the current time of the first master control board of the master device to the second master control of the slave device. purpose of the board.

It should be noted that the service boards also need to be time-synchronized with the main control boards in their respective devices, so that the time of the boards in all devices is consistent.

Embodiment 2

Based on the same technical concept as the above embodiments, this embodiment provides a specific implementation process of a time synchronization method, and the specific implementation process describes the specific implementation process of each step in the first embodiment.

Specifically, in this embodiment, as shown in FIG. 7 , the main device includes a first main control board and at least one first service board; wherein, in addition to the CPU, the first main control board also includes a first FPGA module and The first main control board sgmii interface, the first FPGA module further includes: a first Sync unit, a first Delay-req unit, a first Delay-resp unit, a first Timer0 unit, and a first Timer1 unit; the first service board includes the first A service board sgmii interface, a first Framer module and a first optical module, and the first Framer module further includes a first Framer serdes unit; it should be noted that the first Sync unit, the first Delay-req unit, the first Delay-resp The units are all units for the first main control board to process messages, and process messages of corresponding types.

As shown in FIG. 8 , the slave device includes a second main control board and at least one second service board; wherein, the second main control board includes a second FPGA module and an sgmii interface of the second main control board, and the second FPGA module also Including: the second Sync unit, the second Delay-req unit, the second Delay-resp unit, the second Timer0 unit, the second Timer1 unit; the second service board includes the second service board sgmii interface, the second Framer module and the second Optical module, the second Framer module also includes a second Framer serdes unit; it should be noted that the second Sync unit, the second Delay-req unit, and the second Delay-resp unit are all processed by the second main control board. unit to process the corresponding type of message.

Those skilled in the art can realize that the embodiments of the present invention are not limited to the above-mentioned scenarios, but can also be applied to any other scenarios.

Based on the specific structure of the above equipment, the specific implementation of each step in the first embodiment is as follows:

Preferably, referring to FIG. 9, for step S101: the master device encapsulates the generated first time value and the acquired first dwell time into a first packet, and sends the first packet to the slave device. The process can include:

S901: the first Sync unit on the master device generates and sends a sync message to the first Timer0 unit, the first Timer0 unit receives the sync message sent by the first Sync unit, and sends the sync message to the first Timer1 unit;

S902: the first main control board records the time at which the first Timer0 unit sends the sync message as the first time value, saves it in the form of a time stamp T ₁ , and loads the time stamp T ₁ into the precisetime field of the sync message;

S903: The first Timer1 unit receives the sync message sent by the first Timer0 unit, and sends the sync message to the first main control board sgmii interface module;

S904: The first main control board records the time at which the first Timer1 unit sends the sync message, saves it in the form of a system time stamp Tout ₁ , and loads the system time stamp Tout ₁ into the sync message, which is located after the PTP information and is checked by the FCS. the previous field field;

S905: the sgmii interface module of the first main control board receives the sync message sent by the first Timer1 unit, and transmits the sync message to the sgmii interface module of the first service board;

S906: The sgmii interface module of the first service board receives the sync message transmitted by the sgmii interface module of the first main control board, and sends the sync message to the first Framer module;

S907: the first Framer serializer (serdes, SERializer) unit in the first Framer module receives and sends the sync message, and sends the sync message to the first optical module;

S908: The first service board records the time when the first Framer serdes unit sends the sync message, and saves it in the form of a system time stamp tout ₁ ;

S909: The first service board parses the field fields in the sync message that are located after the PTP information and before the FCS verification, to obtain the time Tout ₁ when the first Timer1 unit sends the sync message;

S910: The first service board calculates the time difference between the sync packet sent by the first Timer1 unit and the sync packet sent by the first Framer serdes unit, which may be specifically recorded as the first dwell time Δt ₁ =tout ₁ -Tout ₁ , and write the first dwell time Δt ₁ into the correction field ΔT ₁ =Δt ₁ of the sync message;

S911: The first optical module receives the sync message sent by the first Framer serdes unit, and sends the sync message to the slave device.

Optionally, in step S901, the _first time value T1 may be encapsulated in a Follow-up message sent after the sync message, and sent to the slave device by the first service board. It should be noted that, for the Follow-up message Up packets, the first service board is only responsible for sending, and does not perform other processing such as parsing.

Preferably, referring to FIG. 10, for step S102: when the slave device receives the first packet, the implementation process of acquiring the first time value, the second time value, the first dwell time and the second dwell time may include: :

S1001: Receive the message sent by the master device from the second optical module in the device, and send the message to the second Framer module, the second Framer module recognizes the sync message, and unifies the sync message to the inter-board communication On the defined Ethernet message format;

S1002: the second Framer serdes unit in the second Framer module receives the sync message, and sends the sync message to the sgmii interface module of the second service board;

S1003: The second service board records the time when the second Framer serdes unit receives the sync packet, saves it in the form of a timestamp tin ₂ , and encapsulates the timestamp tin ₂ into the sync packet after the PTP information and before the FCS check. field field;

S1004: the sgmii interface module of the second service board receives the sync message sent by the second Framer serdes unit, and transmits the sync message to the sgmii interface module of the second main control board;

S1005: The sgmii interface module of the second main control board receives the sync message transmitted by the sgmii interface module of the second service board, and then sends the sync message to the second Timer1 unit;

S1006: The second main control board records the time when the second Timer1 unit receives the sync message, and saves it in the form of a system time stamp Tin ₂ ;

S1007: The second main control board parses the field fields located after the PTP information and before the FCS verification in the sync message, and obtains the time tin ₂ when the second Framer serdes unit receives the sync message;

S1008: The second main control board calculates the time difference between the sync packet received by the second Framer serdes unit and the sync packet received by the second Timer1 unit, which can be specifically recorded as the second dwell time Δt ₂ =Tin ₂ -tin ₂ ;

S1009: the second Timer1 unit sends the sync message to the second Timer0 unit, and records the time when the second Timer0 unit receives the sync message as the _second time value, and saves it in the form of a timestamp T2;

S1010: The second Timer0 unit sends a sync message to the second Sync unit, and the second Sync unit parses the sync message, and records the first dwell time Δt ₁ in the correction field ΔT ₁ of the sync message and the precision time field in the precisetime field The first time value T ₁ .

Preferably, referring to FIG. 11 , for step S103, the slave device records the third time value, encapsulates the acquired third dwell time into a second packet, and sends the second packet to the master device. The process can include:

S1101: After generating the delay-req message from the second Delay-req unit in the device, the second Timer0 unit receives the delay-req message sent by the second Delay-req unit, and sends the delay-req message to the first Two Timer1 units;

S1102: The second main control board records the time at which the second Timer0 unit sends the delay-req message as a _third time value, and saves it in the form of a timestamp T3;

S1103: The second Timer1 unit receives the delay-req message sent by the second Timer0 unit, and sends the delay-req message to the sgmii interface module of the second main control board;

S1104: The second main control board records the time when the second Timer1 unit sends the delay-req message, saves it in the form of a system time stamp Tout ₃ , and loads the system time stamp Tout ₃ into the delay-req message after the PTP information , the field field before FCS verification;

S1105: The sgmii interface module of the second main control board receives the delay-req message sent by the second Timer1 unit, and transmits the delay-req message to the sgmii interface module of the second service board;

S1106: The sgmii interface module of the second service board receives the delay-req message transmitted by the sgmii interface module of the second main control board, and sends the delay-req message to the second Framer module;

S1107: the second Framer serdes unit in the second Framer module receives the delay-req message, and sends the delay-req message to the second optical module;

S1108: The second service board records the time when the second Framer serdes unit sends the delay-req message, and saves it in the form of a system time stamp tout ₃ ;

S1109: The second service board parses the fields in the delay-req message after the PTP information and before the FCS check, to obtain the time Tout ₃ when the second Timer1 unit sends the delay-req message;

S1110: The second service board calculates the time difference between the delay-req message sent by the second Timer1 unit and the delay-req message sent by the second Framerserdes unit, which can be specifically recorded as the third dwell time Δt ₃ =tout ₃ -Tout ₃ , and write the third dwell time Δt ₃ into the correction field ΔT ₂ =Δt ₃ of the delay-req message;

S1111: The second optical module receives the delay-req message sent by the second Framer serdes unit, and sends the delay-req message to the master device.

Preferably, referring to FIG. 12, for step S104, when the master device receives the second packet, the implementation process of acquiring the fourth dwell time and the fourth time value may include:

S1201: The first optical module in the master device receives the message sent from the slave device, and sends the message to the first Framer module, the first Framer module identifies the delay-req message, and unifies the delay-req message to the Ethernet message format defined by the inter-board communication;

S1202: the first Framer serdes unit in the first Framer module receives the delay-req message, and sends the delay-req message to the first service board sgmii interface module;

S1203: The first service board records the time when the first Framer serdes unit receives the delay-req message, saves it in the form of a time stamp tin ₄ , and encapsulates the time stamp tin ₄ into the delay-req message, which is located after the PTP information, and the FCS Field field before verification;

S1204: The sgmii interface module of the first service board receives the delay-req message sent by the first Framer serdes unit, and then transmits the delay-req message to the sgmii interface module of the first main control board;

S1205: The sgmii interface module of the first main control board receives the sync message transmitted by the sgmii interface module of the first service board, and then sends the delay-req message to the first Timer1 unit;

S1206: The first main control board records the time when the first Timer1 unit receives the delay-req message, and saves it in the form of a system timestamp Tin ₄ ;

S1207: The first main control board parses the fields in the delay-req message after the PTP information and before the FCS verification, and obtains the time tin ₄ when the first Framer serdes unit receives the delay-req message;

S1208: The first main control board calculates the time difference between the delay-req message received by the first Framer serdes unit and the delay-req message received by the first Timer1 unit, which can be specifically recorded as the fourth dwell time Δt ₄ = Tin ₄ -tin ₄ ;

S1209: The first Timer1 unit sends the delay-req message to the first Timer0 unit, and records the time when the first Timer0 unit receives the delay-req message as the _fourth time value, which is stored in the form of a timestamp T4;

S1210: The first Timer0 unit sends a delay-req message to the first delay-req unit, and the first delay-req unit receives and parses the delay-req message;

Preferably, referring to FIG. 13, for step S105: the master device encapsulates the fourth time value, the fourth dwell time and the third dwell time in the second packet into a third packet, and The implementation process of sending the third packet to the slave device may include:

S1301: The first Delay-resp unit in the master device generates a delay-resp message, and modifies the fourth time value T ₄ , the fourth dwell time Δt ₄ and the delay-req message correction field in the delay-req message The third dwell time Δt ₃ is encapsulated into a delay-resp message, and the delay-resp message is sent to the first Timer0 unit;

S1302: The first Timer0 unit receives the delay-resp message sent by the first Delay-resp unit, and sends the delay-resp message to the first Timer1 unit;

S1303: The first Timer1 unit receives the delay-resp message sent by the first Timer0 unit, and sends the delay-resp message to the first main control board sgmii interface module;

S1304: The sgmii interface module of the first main control board receives the delay-resp message sent by the first Timer1 unit, and transmits the delay-resp message to the sgmii interface module of the first service board;

S1305: The sgmii interface module of the first service board receives the delay-resp message sent by the sgmii interface module of the first main control board, and sends the delay-resp message to the first optical module via the first Framer module;

S1306: The first optical module receives the delay-resp packet sent by the first Framer module, and sends the delay-resp packet to the slave device.

Preferably, for step S106: when receiving the third packet, the slave device obtains the fourth time value, the fourth dwell time and the third dwell time in the second packet, and according to the first time value, the second time value, the third time value and the fourth time value, and the first dwell time, the second dwell time, the third dwell time and the fourth dwell time, to calculate the master device The time deviation and delay between the slave device and the time deviation and the time delay are used to adjust the current time of the slave device, so that the realization process of the time synchronization of the master and slave devices can include:

By the synchronization mechanism of the Precision Time Protocol (PTP), according to the timestamps T ₁ , T ₂ , T ₃ and T corresponding to the first time value, the second time value, the third time value and the fourth time value respectively ₄ , and the first dwell time, the second dwell time, the third dwell time and the fourth dwell time, to calculate the time deviation and delay between the master device and the slave device; wherein, the first dwell time Δt ₁ is stored in the correction field ΔT ₁ =Δt ₁ of the first packet, and the third dwell time Δt ₃ is stored in the correction field ΔT ₂ =Δt ₃ of the second packet.

It should be noted that the third packet may be a delay-resp packet sent by the master device to the slave device, or may be other types of packets, which are not specifically limited in this embodiment of the present invention.

In addition, the first time value T ₁ can be obtained from the precisetime field of the sync packet received by the slave device, and the value ΔT ₁ in the correction field of the first packet can also be found in the correction field of the sync packet. Get it.

Specifically, according to the time offset and delay Calculate the time deviation and delay between the master and slave devices, and then obtain the current time of the first master control board according to the PTP, which realizes the synchronization of the current time of the first master control board of the master device to the second master control of the slave device. purpose of the board.

It should also be noted that the service boards also need to be time synchronized with the main control boards in their respective devices, so that the time of the boards in all devices is consistent. The specific time synchronization process can be performed according to the above process, and this embodiment of the present invention I won't go into details.

Embodiment 3

Based on the same technical concept of the above two embodiments, referring to FIG. 14 , which shows a flow of a time synchronization method on the master device side provided by an embodiment of the present invention, and the method may include:

S1401: The master device encapsulates the generated first time value and the obtained first dwell time into a first message, and sends the first message to the slave device;

S1402: The master device receives the second packet sent by the slave device;

Wherein, the second message includes a third dwell time;

S1403: When receiving the second message, the master device obtains a fourth dwell time and a fourth time value;

S1404: The master device encapsulates the fourth time value, the fourth dwell time in the second packet, and the third dwell time in the second packet into a third packet, and encapsulates the third The message is sent to the slave device.

Exemplarily, the main device may include a first main control board and at least one first service board; the first packet is a sync packet; the second packet is a delay-req packet; the third The packet is a delay-resp packet.

Preferably, the master device encapsulates the generated first time value and the obtained first dwell time into a first packet, and sends the first packet to the slave device, specifically including:

The first main control board records the first time value T ₁ for generating the sync message when generating the sync message, and encapsulates the first time value T ₁ in the reservation of the sync message field;

The first main control board sends the sync message to the first service board, and records the time Tout ₁ when the first main control board sends the sync message;

The first service board parses the sync message, and obtains the time Tout ₁ when the first main control board sends the sync message;

When the first service board sends the sync message to the slave device, it records the time tout ₁ when the first service board sends the sync message, and sends the data according to the first main control board. The time Tout ₁ of the sync message and the time tout ₁ of the first service board sending the sync message obtain the first dwell time Δt ₁ , and encapsulate the first dwell time Δt ₁ in the The correction field ΔT ₁ in the sync message is sent to the slave device.

Preferably, when receiving the second message, the master device obtains a fourth dwell time and a fourth time value; and encapsulates the fourth dwell time and the fourth time value in the first In the second message, it specifically includes:

When the first service board receives the delay-req message, it records the time tin ₄ when the first service board receives the delay-req message;

the first service board sends the delay-req message to the first main control board;

The first main control board records the time Tin ₄ when the delay-req message is received, and parses the delay-req message to obtain the time tin ₄ when the encapsulated first service board receives the delay-req message. , obtain the fourth dwell time Δt ₄ ;

The first main control board records and parses the fourth time value T ₄ of the delay-req message.

Preferably, the master device encapsulates the fourth time value, the fourth dwell time, and the third dwell time in the second packet into a third packet, and sends the third packet To slave devices, including:

The first main control board generates the delay-resp message, and modifies the fourth time value T ₄ , the fourth dwell time Δt ₄ , and the third dwell time in the delay-req message correction field. leaving time Δt ₃ to encapsulate the delay-resp message, and send the delay-resp message to the first service board;

The first service board receives the delay-resp message sent by the first main control board, and sends the delay-resp message to the slave device.

Embodiment 4

Based on the same technical concept as the foregoing embodiments, referring to FIG. 15 , it shows a flow of a time synchronization method on the slave side provided by an embodiment of the present invention. The method may include:

S1501: When the slave device receives the first message, obtain the first dwell time, the second dwell time, the first time value and the second time value;

S1502: The slave device records the third time value, encapsulates the obtained third dwell time into a second packet, and sends the second packet to the master device;

S1503: When receiving the third packet, the slave device acquires the fourth time value, the fourth dwell time included in the third packet, and the third dwell time in the second packet, and calculates according to the first a time value, a second time value, a third time value, and a fourth time value, and the first dwell time, the second dwell time, the third dwell time, and the fourth dwell time , and calculate the time offset and delay between the master device and the slave device.

Exemplarily, the slave device includes a second main control board and at least one second service board; the first packet is a sync packet; the second packet is a delay-req packet; The third packet is a delay-resp packet.

Preferably, when receiving the first message, the slave device obtains the first dwell time, the second dwell time, the first time value and the second time value; specifically, it includes:

When the second service board receives the sync message, it records the time tin ₂ when the second service board receives the sync message;

the second service board sends the sync message to the second main control board;

The second main control board records the time Tin ₂ when the sync message is received; and parses the sync message to obtain the time tin ₂ when the second service board encapsulated receives the sync message, and obtains the the second dwell time Δt ₂ ;

the second main control board records and parses the second time value T ₂ of the sync message;

The second main control board records the first dwell time Δt ₁ in the correction field ΔT ₁ of the sync message and the first time value T ₁ in the precisetime field.

Preferably, the slave device records the third time value, encapsulates the acquired third dwell time into a second packet, and sends the second packet to the master device, specifically including:

The second main control board records, when generating the delay-req message, a third time value T ₃ for generating the delay-req message;

The second main control board sends the delay-req message to the second service board, and records the time Tout ₃ when the second main control board sends the delay-req message;

The second service board parses the delay-req message, and obtains the time Tout ₃ when the second main control board sends the delay-req message;

When the second service board sends the delay-req message to the master device, it records the time tout 3 when the second service board sends the delay-req message, and records the time tout ₃ when the second service board sends the delay-req message, and records the delay-req message according to the second service board. The time Tout ₃ when the control board sends the delay-req message and the time tout ₃ when the second service board sends the delay-req message obtains the third dwell time Δt ₃ , and the third The dwell time Δt ₃ is encapsulated in the correction field ΔT ₂ of the delay-req message and sent to the master device.

Preferably, when receiving the third packet, the slave device acquires the fourth time value, the fourth dwell time included in the third packet, and the third dwell time in the second packet, and obtains the fourth time value included in the third packet, the fourth dwell time and the third dwell time in the second packet. the first time value, the second time value, the third time value and the fourth time value, and the first dwell time, the second dwell time, the third dwell time and the fourth dwell time Dwell time, calculate the time deviation and delay between the master device and the slave device, including:

The slave device uses the synchronization mechanism of the Precision Time Protocol (PTP), according to the timestamps T ₁ , T 2 , T 2 , T 2 , T 1 , T ₂ , T ₃ and T ₄ , as well as the first dwell time Δt ₁ , the second dwell time Δt ₂ , the third dwell time Δt ₃ and the fourth dwell time Δt ₄ , the time between the master device and the slave device is calculated Deviation and delay; wherein, the first dwell time Δt ₁ is stored in the correction field ΔT ₁ =Δt ₁ of the first message, and the third dwell time Δt ₃ is stored in the second message The correction domain of ΔT ₂ =Δt ₃ .

Embodiment 5

Based on the same technical concept of the above-mentioned embodiments, referring to FIG. 16 , it shows a main device 160 provided by an embodiment of the present invention. The main device 160 includes: a first main control board 1601 and a first service board 1602; wherein,

The first main control board 1601 is used to encapsulate the generated first time value and the obtained first dwell time into a first packet;

the first service board 1602, configured to send the first packet to the slave device;

and, receiving a second message sent by the slave device; the second message includes a third dwell time;

The first main control board 1601 is further configured to acquire a fourth dwell time and a fourth time value when the first service board 1602 receives the second packet;

and, encapsulating the fourth time value, the fourth dwell time and the third dwell time in the second message into a third message;

The service board is further configured to send the third packet to the slave device.

Exemplarily, the first packet is a sync packet; the second packet is a delay-req packet; and the third packet is a delay-resp packet.

Preferably, the first main control board 1601 is specifically configured to record the first time value T ₁ for generating the sync message when generating the sync message, and encapsulate the first time value T ₁ in a the reserved field of the sync message;

And, the sync message is sent to the first service board 1602, and the time Tout ₁ for sending the sync message is recorded;

The first service board 1602 is specifically configured to parse the sync message, and obtain the time Tout ₁ for sending the sync message;

And, when sending the sync message to the slave device, record the time tout ₁ of sending the sync message, and according to the time Tout ₁ of the first main control board 1601 sending the sync message and The time tout ₁ at which the first service board 1602 sends the sync message obtains the first dwell time Δt ₁ , and encapsulates the first dwell time Δt ₁ in the correction field in the sync message ΔT ₁ is sent to the slave device.

Preferably, the first service board 1602 is specifically configured to, when receiving the delay-req message, record the time tin ₄ when the first service board 1602 receives the delay-req message;

and, sending the delay-req message to the first main control board 1601;

The first main control board 1601 is specifically configured to record the time Tin ₄ when the delay-req message is received, and parse the delay-req message to obtain the encapsulated first service board 1602 to receive the delay-req The time tin ₄ of the message is obtained, and the fourth dwell time Δt ₄ is obtained;

And, recording and parsing the fourth time value of the delay-req message.

Preferably, the first main control board 1601 is specifically configured to generate the delay-resp message, report the fourth time value T ₄ in the delay-req message, and the delay-req message The _third dwell time Δt3 in the text correction field is encapsulated into the delay-resp message, and the delay-resp message is sent to the first service board 1602;

The first service board 1602 is specifically configured to receive the delay-resp message sent by the first main control board 1601, and send the delay-resp message to the slave device.

Embodiment 6

Based on the same technical concept as the foregoing embodiments, see FIG. 17 , which shows a slave device 170 provided by an embodiment of the present invention. The slave device 170 may include a second main control board 1701 and a second service board 1702 , wherein,

the second service board 1702, configured to receive the first message;

The second main control board 1701 is used to obtain the first dwell time, the second dwell time, the first time value and the second time value;

And, recording the third time value, and encapsulating the obtained third dwell time into the second message;

The second service board 1702 is further configured to send the second packet to the master device;

and, receiving the third message;

The second main control board 1701 is further configured to obtain the fourth time value included in the third packet, the fourth dwell time, and the third dwell time in the second packet, and according to the first a time value, a second time value, a third time value, and a fourth time value, and the first dwell time, the second dwell time, the third dwell time, and the fourth dwell time , and calculate the time offset and delay between the master device and the slave device.

Exemplarily, the first packet is a sync packet; the second packet is a delay-req packet; and the third packet is a delay-resp packet.

Preferably, the second service board 1702 is specifically configured to, when receiving the sync message, record the time tin ₂ when the second service board 1702 receives the sync message;

and, sending the sync message to the second main control board 1701;

The second main control board 1701 is specifically used to record the time Tin ₂ when the sync message is received; and parse the sync message to obtain the time tin when the second service board 1702 encapsulated receives the sync message ₂ , obtaining the second dwell time Δt ₂ ;

And, record the second time value T ₂ for parsing the sync message.

The second main control board 1701 records the first dwell time Δt ₁ in the correction field ΔT ₁ of the sync message and the first time value T ₁ in the precisetime field.

Preferably, the second main control board 1701 is specifically configured to record the third time value T ₃ for generating the delay-req message when generating the delay-req message;

and, sending the delay-req message to the second service board 1702, and recording the time Tout ₃ when the second main control board 1701 sends the delay-req message;

The second service board 1702 is specifically configured to parse the delay-req message, and obtain the time Tout ₃ when the second main control board 1701 sends the delay-req message;

And, when sending the delay-req message to the main device, record the time tout 3 when the second service board 1702 sends the delay-req message, and record the time tout 3 when the second service board 1702 sends the delay-req message, and record the time tout ₃ when the second service board 1702 sends the delay-req message, and record the time tout 3 when the second service board 1702 sends the delay-req message, The time Tout ₃ when the delay-req message is sent and the time tout ₃ when the second service board 1702 sends the delay-req message obtains the third dwell time Δt ₃ , and sets the third dwell time Δt 3 . The retention time Δt ₃ is encapsulated in the correction field ΔT ₂ of the delay-req message and sent to the master device.

Preferably, the second main control board 1701 is specifically configured to use the synchronization mechanism of the Precision Time Protocol (PTP) according to the first time value, the second time value, the third time value and the fourth time value. Time stamps T ₁ , T ₂ , T ₃ and T ₄ corresponding to the time values, as well as the first dwell time Δt ₁ , the second dwell time Δt ₂ , the third dwell time Δt ₃ and For the fourth dwell time Δt ₄ , the time offset and time delay between the master device and the slave device are calculated.

Embodiment 7

Based on the same technical idea of the previous embodiments, see FIG. 18 , which shows a time synchronization system 180 provided by an embodiment of the present invention, the system 180 includes: a master device 160 and a slave device 170;

in,

the master device 160, configured to encapsulate the generated first time value and the acquired first dwell time into a first packet, and send the first packet to the slave device 170;

and, receiving a second packet sent by the slave device 170; the second packet includes a third dwell time;

and, when receiving the second message, obtain a fourth dwell time and a fourth time value; wherein, the second message includes a third dwell time;

and, encapsulating the fourth time value, the fourth dwell time in the second message, and the third dwell time in the second message into a third message, and encapsulating the third message sent to the slave device 170;

The slave device 170 is configured to acquire the first dwell time, the second dwell time, the first time value and the second time value when receiving the first message;

and, recording and obtaining the third time value, encapsulating the obtained third dwell time into a second message, and sending the second message to the master device 160;

and, when receiving the third packet, obtain the fourth time value, the fourth dwell time included in the third packet, and the third dwell time in the second packet, and obtain the fourth time value, the fourth dwell time in the second packet, and the third dwell time in the second packet according to the first time value. , the second time value, the third time value and the fourth time value, and the values in the correction fields of the first message and the second message, to calculate the distance between the master device 160 and the slave device 170 Time skew and delay.

As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the invention may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media having computer-usable program code embodied therein, including but not limited to disk storage, optical storage, and the like.

The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block in the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to the processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing device to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing device produce Means for implementing the functions specified in a flow or flow of a flowchart and/or a block or blocks of a block diagram.

These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory result in an article of manufacture comprising instruction means, the instructions The apparatus implements the functions specified in the flow or flow of the flowcharts and/or the block or blocks of the block diagrams.

These computer program instructions can also be loaded on a computer or other programmable data processing device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process such that The instructions provide steps for implementing the functions specified in the flow or blocks of the flowcharts and/or the block or blocks of the block diagrams.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention.

Claims (21)

1. A method for time synchronization, the method being applied to a master device, the method comprising:

the master device packages the generated first time value and the acquired first residence time into a first message and sends the first message to the slave device;

the master device receives a second message sent by the slave device; wherein the second packet includes a third residence time;

the master device acquires a fourth residence time and a fourth time value when receiving the second message;

the master device packages the fourth time value, the fourth residence time and the third residence time in the second message into a third message and sends the third message to a slave device;

the first residence time is the residence time of the first message in the master device when the master device sends the first message;

the third residence time is the residence time of the second message in the slave device when the slave device transmits the second message;

the fourth residence time is the residence time of the second message in the master device in the process of receiving the second message by the master device.

2. The method of claim 1, wherein the master device comprises a first master control board and at least one first service board; the first message is a sync message; the second message is a delay-req message; the third message is a delay-resp message.

3. The method according to claim 2, wherein the master device encapsulates the generated first time value and the obtained first residence time into a first packet, and sends the first packet to a slave device, specifically including:

the first master control board records a first time value T for generating the sync message when generating the sync message₁And the first time value T is compared with₁Encapsulating the reserved field of the sync message;

the first master control board sends the sync message to the first service board and records the time Tout of sending the sync message by the first master control board₁；

The first service board analyzes the sync message to obtain the time Tout of the first master control board for sending the sync message₁；

The first service board sends the sync messageWhen the message is sent to the slave equipment, recording the time tout of sending the sync message by the first service board₁And according to the time Tout of sending the sync message by the first main control board₁Time tout for sending the sync message with the first service board₁Obtaining the first residence time Δ t₁And comparing said first dwell time Δ t₁A correction field Δ T encapsulated in the sync message₁And sending to the slave device.

4. The method according to claim 2, wherein the obtaining, by the master device, a fourth residence time and a fourth time value when receiving the second packet specifically includes:

when the first service board receives the delay-req message, recording the time tin when the first service board receives the delay-req message₄；

The first service board sends the delay-req message to the first main control board;

the first main control board records the time Tin of receiving the delay-req message₄And analyzing the delay-req message to obtain the time tin for receiving the delay-req message by the first service board₄Obtaining the fourth residence time delta t₄；

The first main control board records and analyzes the fourth time value T of the delay-req message₄。

5. The method according to claim 2, wherein the master device encapsulates the fourth time value, the fourth residence time, and the third residence time in the second message into a third message, and sends the third message to a slave device, specifically including:

the first main control board generates the delay-resp message and sends the fourth time value T₄The fourth residence time Δ t₄And a third residence time Δ t in the delay-req message correction domain₃Encapsulating the delay-resp message and sending the delay-resp messageTo the first service board;

and the first service board receives the delay-resp message sent by the first main control board and sends the delay-resp message to the slave equipment.

6. A method for time synchronization, the method being applied to a slave device, the method comprising:

the method comprises the steps that when the slave equipment receives a first message, first residence time, second residence time, a first time value and a second time value are obtained;

the slave device records a third time value, packages the acquired third residence time into a second message, and sends the second message to the master device;

when receiving a third message, the slave device obtains a fourth time value, a fourth residence time and a third residence time in a second message, wherein the fourth time value, the fourth residence time and the third residence time are included in the third message, and calculates the time deviation and the time delay between the master device and the slave device according to the first time value, the second time value, the third time value and the fourth time value, the first residence time, the second residence time, the third residence time and the fourth residence time;

the first residence time is the residence time of the first message in the master device when the master device sends the first message;

the second residence time is the residence time of the first message in the slave equipment in the process of receiving the first message by the slave equipment;

the third residence time is the residence time of the second message in the slave device when the slave device transmits the second message;

the fourth residence time is the residence time of the second message in the master device in the process of receiving the second message by the master device.

7. The method of claim 6, wherein the slave device comprises a second master control board and at least one second service board; the first message is a sync message; the second message is a delay-req message; the third message is a delay-resp message.

8. The method according to claim 7, wherein the obtaining, by the slave device, the first residence time, the second residence time, the first time value, and the second time value when receiving the first packet specifically includes:

when the second service board receives the sync message, recording the time tin when the second service board receives the sync message₂；

The second service board sends the sync message to the second master control board;

the second main control board records the time Tin of receiving the sync message₂(ii) a And analyzing the sync message to obtain the time tin of receiving the sync message by the second service board₂Obtaining the second residence time delta t₂；

The second master control board records and analyzes a second time value T of the sync message₂；

The second master control board records the correction domain delta T of the sync message₁First dwell time at₁And a first time value T in the reserved field₁。

9. The method according to claim 7, wherein the slave device records a third time value, encapsulates the obtained third residence time into a second packet, and sends the second packet to the master device, and specifically includes:

the second main control board records a third time value T for generating the delay-req message when generating the delay-req message₃；

The second main control board sends the delay-req message to the second service board and records the time Tout of the second main control board sending the delay-req message₃；

The second service board parses the delay-req message,obtaining the time Tout for the second main control board to send the delay-req message₃；

When the second service board sends the delay-req message to the master device, recording the time tout of sending the delay-req message by the second service board₃And according to the time Tout for sending the delay-req message by the second main control board₃Time tout for sending the delay-req message with the second service board₃Obtaining the third residence time Δ t₃And the third dwell time Δ t₃A correction field delta T encapsulated in the delay-req message₂And sending the data to the main equipment.

10. The method according to claim 7, wherein when receiving a third packet, the slave device obtains a fourth time value, a fourth residence time, and a third residence time in a second packet, which are included in the third packet, and calculates a time offset and a time delay between the master device and the slave device according to the first time value, the second time value, the third time value, and the fourth time value, and the first residence time, the second residence time, the third residence time, and the fourth residence time, specifically includes:

the slave device respectively corresponds to the timestamps T according to the first time value, the second time value, the third time value and the fourth time value through a synchronization mechanism of a Precision Time Protocol (PTP)₁、T₂、T₃And T₄And a first dwell time Δ t₁Second dwell time Δ t₂Third dwell time Δ t₃And a fourth dwell time Δ t₄Calculating the time deviation and the time delay between the master equipment and the slave equipment; wherein the first residence time Δ t₁The correction field delta T stored in the first message₁＝Δt₁Said third dwell time Δ t₃The correction field delta T stored in the second message₂＝Δt₃。

11. A master device, the master device comprising: the system comprises a first main control board and a first service board; wherein,

the first master control board is used for packaging the generated first time value and the acquired first residence time into a first message;

the first service board is used for sending the first message to a slave device;

and receiving a second message sent by the slave device; the second message comprises a third residence time;

the first main control board is further configured to obtain a fourth residence time and a fourth time value when the first service board receives the second packet;

and encapsulating the fourth time value, the fourth residence time and the third residence time in the second message into a third message;

the service board is further configured to send the third packet to a slave device;

the first residence time is the residence time of the first message in the master device when the master device sends the first message;

the third residence time is the residence time of the second message in the slave device when the slave device transmits the second message;

the fourth residence time is the residence time of the second message in the master device in the process of receiving the second message by the master device.

12. The master device of claim 11, wherein the first message is a sync message; the second message is a delay-req message; the third message is a delay-resp message.

13. The master device according to claim 12, wherein the first master control board is specifically configured to record a first time value T for generating the sync message when the sync message is generated₁And the first time value T is compared with₁Encapsulated in the syncA reserved field of the message;

and sending the sync message to the first service board and recording the time Tout for sending the sync message₁；

The first service board is specifically configured to analyze the sync message and obtain the time Tout for sending the sync message₁；

And recording the time tout for sending the sync message when the sync message is sent to the slave equipment₁And according to the time Tout of sending the sync message by the first main control board₁Time tout for sending the sync message with the first service board₁Obtaining the first residence time Δ t₁And comparing said first dwell time Δ t₁A correction field Δ T encapsulated in the sync message₁And sending to the slave device.

14. The master device according to claim 12, wherein the first service board is specifically configured to record a time tin when the first service board receives the delay-req packet when receiving the delay-req packet₄；

And sending the delay-req message to the first main control board;

the first main control board is specifically configured to record time Tin when the delay-req packet is received₄And analyzing the delay-req message to obtain the time tin for receiving the delay-req message by the first service board₄Obtaining the fourth residence time delta t₄；

And recording and analyzing the fourth time value T of the delay-req message₄。

15. The master device according to claim 12, wherein the first master control board is specifically configured to generate the delay-resp packet, and use the fourth time value T in the delay-req packet₄And a third residence time Δ t in the delay-req message correction field₃Encapsulating the delay-resp message and sending the encapsulated messageThe delay-resp message is sent to the first service board;

the first service board is specifically configured to receive the delay-resp packet sent by the first master control board, and send the delay-resp packet to the slave device.

16. A slave device, wherein the slave device includes a second master control board and a second service board, wherein the second service board is configured to receive a first packet;

the second main control board is used for acquiring first residence time, second residence time, a first time value and a second time value;

recording a third time value, and packaging the obtained third residence time to a second message;

the second service board is further configured to send the second message to the master device;

and receiving a third message;

the second master control board is further configured to obtain a fourth time value, a fourth residence time, and a third residence time in the second message, which are included in the third message, and calculate a time deviation and a time delay between the master device and the slave device according to the first time value, the second time value, the third time value, the fourth time value, the first residence time, the second residence time, the third residence time, and the fourth residence time;

the first residence time is the residence time of the first message in the master device when the master device sends the first message;

the second residence time is the residence time of the first message in the slave equipment in the process of receiving the first message by the slave equipment;

the third residence time is the residence time of the second message in the slave device when the slave device transmits the second message;

the fourth residence time is the residence time of the second message in the master device in the process of receiving the second message by the master device.

17. The slave device of claim 16, wherein the first message is a sync message; the second message is a delay-req message; the third message is a delay-resp message.

18. The slave device according to claim 17, wherein the second service board is specifically configured to record, when receiving the sync message, a time tin at which the second service board receives the sync message₂；

And sending the sync message to the second main control board;

the second master control board is specifically used for recording the time Tin of receiving the sync message₂(ii) a And analyzing the sync message to obtain the time tin of receiving the sync message by the second service board₂Obtaining the second residence time delta t₂；

The second master control board records and analyzes a second time value T of the sync message₂；

The second master control board records the correction domain delta T of the sync message₁First dwell time at₁And a first time value T in the reserved field₁。

19. The slave device according to claim 17, wherein the second master control board is specifically configured to record a third time value T for generating the delay-req packet when the delay-req packet is generated₃；

And sending the delay-req message to the second service board, and recording the time Tout for sending the delay-req message by the second main control board₃；

The second service board is specifically configured to analyze the delay-req packet and obtain a time Tout for the second main control board to send the delay-req packet₃；

And when the delay-req message is transmitted to the master deviceRecording the time tout of the second service board for sending the delay-req message₃And according to the time Tout for sending the delay-req message by the second main control board₃Time tout for sending the delay-req message with the second service board₃Obtaining the third residence time Δ t₃And the third dwell time Δ t₃A correction field delta T encapsulated in the delay-req message₂And sending the data to the main equipment.

20. The slave device according to claim 17, wherein the second master control board is specifically configured to, according to a synchronization mechanism of a precision time protocol PTP, respectively correspond to timestamps T of the first time value, the second time value, the third time value, and the fourth time value₁、T₂、T₃And T₄And said first dwell time Δ t₁The second residence time Δ t₂The third residence time Δ t₃And the fourth dwell time Δ t₄And calculating the time deviation and the time delay between the master equipment and the slave equipment.

21. A system for time synchronization, the system comprising: a master device and a slave device; wherein,

the master device is used for packaging the generated first time value and the acquired first residence time into a first message and sending the first message to the slave device;

and receiving a second message sent by the slave device; the second message comprises a third residence time;

and when receiving the second message, acquiring a fourth residence time and a fourth time value; wherein the second packet includes a third residence time;

encapsulating a fourth time value, a fourth residence time and a third residence time in the second message into a third message, and sending the third message to a slave device;

the slave device is used for acquiring a first residence time, a second residence time, a first time value and a second time value when receiving the first message;

recording and acquiring a third time value, packaging the acquired third residence time into a second message, and sending the second message to the master device;

when receiving a third message, acquiring a fourth time value, a fourth residence time and a third residence time in a second message, wherein the fourth time value, the fourth residence time and the third residence time are included in the third message, and calculating a time deviation and a time delay between the master device and the slave device according to the first time value, the second time value, the third time value and the fourth time value, the first residence time, the second residence time, the third residence time and the fourth residence time;

the first residence time is the residence time of the first message in the master device when the master device sends the first message;

the second residence time is the residence time of the first message in the slave equipment in the process of receiving the first message by the slave equipment;

the third residence time is the residence time of the second message in the slave device when the slave device transmits the second message;

the fourth residence time is the residence time of the second message in the master device in the process of receiving the second message by the master device.