CN106876363A - The fan-out package structure and its process of 3D connections - Google Patents

Abstract

The invention relates to a 3D-connected fan-out packaging structure and a process method thereof. The structure includes a circuit layer (1), a chip (3) is arranged on the back of the circuit layer (1), and a front side of the chip (3) A redistribution circuit layer (2) is provided, and the chip (3) is connected to the redistribution circuit layer (2) through metal balls (4) and first bonding wires (5), and the circuit layer (1 ), the rewiring circuit layer (2) and the periphery of the chip (3) are all encapsulated with the first plastic compound (6), and the front side of the circuit layer (1) is provided with electronic components (9) or packaging components (10), so The outer periphery of the electronic component (9) or the package component (10) is encapsulated with a second plastic compound (11). The present invention is a 3D-connected fan-out packaging structure and its process method. It adopts the traditional two-end wire bonding method to solder wires on the chip and the metal circuit layer or on the metal circuit layer adjacent to the package component, thereby improving the height and Stability, and improve wiring efficiency.

Description

3D-connected fan-out packaging structure and process method thereof

technical field

The invention relates to a 3D-connected fan-out packaging structure and a process method thereof, belonging to the technical field of semiconductor packaging.

Background technique

In the existing semiconductor stack packaging technology, solder balls were commonly used as the connection carrier of the stack. Fix the solder balls on the substrate by planting balls. After the solder balls are molded and coated, the solder balls are partially exposed through the process of laser drilling, and then the next packaging process is continued on the solder balls. The ball diameter and spacing of the balls limit the number and arrangement density of the longitudinal engagement elements. In order to overcome the shortage of solder balls, a method of interconnecting through metal pillars has been developed. The metal pillars are arranged around the substrate and surround the chips on the substrate to serve as input/output connection pads interconnected with other substrates. However, with the further shrinking of packaged product size and the limitation of the manufacturing process of metal pillars, it is difficult to further increase the number of metal pillars on the substrate, so the number of interconnected I/Os cannot be increased.

Contents of the invention

The technical problem to be solved by the present invention is to provide a 3D-connected fan-out packaging structure and its process method for the above-mentioned prior art. The wire bonding on the metal circuit layer can use the wire bonding to simultaneously play the ball post and the wire on the chip, so as to improve the height and stability (especially in the hot pressing of EMC), and improve the efficiency of the wire bonding.

The technical solution adopted by the present invention to solve the above problems is: a 3D-connected fan-out packaging structure, which includes a circuit layer, a chip is arranged on the back of the circuit layer, and a metal ball post and a first solder are arranged on the front of the chip. line, the front of the chip is provided with a rewiring circuit layer, the chip and the rewiring circuit layer are connected through metal balls and the first bonding wire, and the circuit layer and the rewiring circuit are connected through the second bonding wire The circuit layer, the rewiring circuit layer and the periphery of the chip are all encapsulated with a first molding compound, the front of the circuit layer is provided with electronic components or packaging components, and the periphery of the electronic components or packaging components is encapsulated with a second In the molding compound, solder balls are provided on the back of the rewiring circuit layer, and a third insulating material is provided between the solder balls.

The circuit layer is composed of multiple layers of metal circuit layers and insulating materials.

The redistribution circuit layer is composed of multiple layers of metal circuit layers and insulating materials.

A process method for a 3D-connected fan-out packaging structure, the method comprising the steps of:

Step 1. Take a carrier board,

Step 2, the front of the carrier board is formed into a circuit layer by multiple electroplating and insulation coating;

Step 3, mount the chip on the circuit layer;

Step 4. Using the wire bonding method at both ends to punch metal balls on the pads on the front of the chip, wire bonding between the chip and the metal circuit layer, and between the metal circuit layers adjacent to the packaged components;

Step 5, encapsulating the circuit layer, chips and bonding wires with a plastic encapsulant;

Step 6. Grinding and thinning, disconnecting the bonding wire connection between adjacent package components, disconnecting the bonding wire connection between the chip and the metal circuit layer, and exposing part or all of the metal balls above the chip;

Step 7: The surface of the molding compound is electroplated and filled with insulating material to form a rewiring circuit layer, and the rewiring part of the metal ball post on the chip surface and the disconnected wire is electrically extended;

Step 8. Cover the surface of the rewiring circuit layer with an insulating layer, and open a window on the insulating layer to connect with the external electrical connection and implant solder balls;

Step 9. Paste the solder ball protective film on the front and remove the carrier board on the back;

Step 10. Continue implanting electronic components or packaging components on the backside of the removed carrier board;

Step 11. Selective encapsulation on the back side after implanting the components;

Step 12. Finally, remove the solder ball protection film and cut into individual products.

Compared with the prior art, the present invention has the advantages of:

1. Use the traditional two-end bonding method to directly bond wires on the chip and the metal circuit layer or on the metal circuit layer adjacent to the packaged components. There is no need to modify the corresponding equipment, and the traditional process can be used directly without increasing production. cost;

2. Metal balls or wires can be selectively placed on the chip to improve the efficiency of wire bonding, and the middle chip can be electrically connected to the lower package, and can be connected to the upper package through metal balls. electrical interconnection;

3. The electrical interconnection of the 3D structure is carried out by bonding wires. Compared with solder balls and metal pillars, the diameter is smaller and the spacing is finer, which can increase the complexity of electrical interconnection, thereby improving product functions and reducing the volume of the entire package.

Description of drawings

FIG. 1 is a schematic diagram of a 3D-connected fan-out packaging structure according to the present invention.

FIG. 2 to FIG. 16 are flow charts of each process of a 3D connection fan-out packaging structure process method according to the present invention.

in:

Line layer 1

The first line layer 1-1

The first metal pillar 1-2

The second line layer 1-3

First insulating material 1-4

RWL 2

The third line layer 2-1

The second metal column 2-2

Fourth line layer 2-3

Second insulating material 2-4

chip 3

Metal ball post 4

First bond wire 5

The first molding compound 6

Second bonding wire 7

Ball 8

Electronic Components 9

package components 10

Second molding compound 11

The third insulating material 12 .

detailed description

The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

Referring to FIG. 1 , a 3D-connected fan-out packaging structure in this embodiment includes a circuit layer 1, and the circuit layer 1 includes a first circuit layer 1-1 and a second circuit layer 1-3. The first circuit layer 1-1 and the second circuit layer 1-3 are electrically connected through the first metal pillar 1-2, and the first circuit layer 1-1 and the first metal pillar 1-2 are surrounded by first Insulating materials 1-4, the back of the circuit layer 1 is provided with a chip 3, the front of the chip 3 is provided with metal balls 4 and the first bonding wire 5, the front of the chip 3 is provided with a rewiring circuit layer 2, the The chip 3 and the redistribution circuit layer 2 are connected through the metal ball post 4 and the first bonding wire 5, and the circuit layer 1 and the redistribution circuit layer 2 are connected through the second bonding wire 7, and the circuit layer 1. The periphery of the rewiring circuit layer 2 and the chip 3 is encapsulated with a first plastic compound 6, the front of the circuit layer 1 is provided with an electronic component 9 or a packaging component 10, and the periphery of the electronic component 9 or the packaging component 10 is encapsulated with The second molding compound 11, the rewiring circuit layer 2 includes a third circuit layer 2-1 and a fourth circuit layer 2-3, and the third circuit layer 2-1 and the fourth circuit layer 2-3 pass through The second metal pillar 2-2 is electrically connected, the third circuit layer 2-1 and the second metal pillar 2-2 are surrounded by a second insulating material 2-4, and the back of the rewiring circuit layer 2 is provided with solder balls 8. A third insulating material 12 is provided between the solder balls 8 and the solder balls 8 .

Its process method comprises the following steps:

Step 1, see Figure 2, take a carrier plate; it can be a metal plate, wafer, glass, etc.; the electroplating conductive bottom layer can be directly deposited on the carrier plate; there can be selective separation or protection between the carrier plate and the electroplating bottom layer Floor.

Step 2. Referring to FIG. 3, the front of the carrier board is formed by electroplating forming process to form the first circuit layer, the first metal pillar is formed on the front of the first circuit layer, and the first insulating material is applied to the first circuit layer and the first metal pillar; And do the required exposure process, such as grinding, or photolithography, or laser opening;

Step 3, see Figure 4, on the surface of the first metal pillar and the first insulating material, the second circuit layer and the corresponding positioning metal layer on the wiring surface are formed through the deposition of the conductive bottom layer, the circuit forming, the electroplating forming process, and the etching of the conductive bottom layer , such as Ni/Au or Ni/Pt/Au; in another method, the second wiring layer can be formed by Ti/Al physical sputter deposition (PVD) followed by photolithography and chemical etching;

Step 4, see Figure 5, mount the chip on the second circuit layer, with a patch film or glue on the bottom of the chip;

Step 5, see Figure 6, use the traditional method of bonding wires at both ends to punch metal balls on the pads on the front of the chip, bond wires between the chip and the second circuit layer, and bond wires between the second circuit layer adjacent to the packaged components ;

Step 6, see Figure 7, encapsulate the circuit layer, chips and bonding wires with a plastic encapsulant, such as ABF insulating film or granular plastic encapsulant, form an insulating layer through a vacuum thermocompression molding process, and then cure it ;

Step 7, see Figure 8, grind and thin the surface of the plastic encapsulant, disconnect the bonding wire connection between adjacent package components, disconnect the bonding wire connection between the chip and the second circuit layer, and expose the upper part of the chip or all metal balls;

Step 8, see Figure 9, form the third circuit layer by electroplating on the surface of the plastic encapsulant, rewire the metal ball post on the chip surface and the disconnected wire part to electrically extend out, and form the second metal circuit layer on the front of the third circuit layer pillars, and coat the third circuit layer and the second metal pillars with a second insulating material; and perform the required exposure process on them, such as grinding, or photolithography, or laser opening;

Step 9. Referring to FIG. 10 , a fourth circuit layer is formed on the surface of the second metal pillar and the second insulating material through conductive bottom layer deposition, line forming, electroplating forming process, and conductive bottom layer etching;

Step 10. Referring to FIG. 11 , coat the third insulating material on the outside of the fourth circuit layer, and open a window on the surface of the third insulating material to expose the area that needs to be planted later;

Step 11, see Figure 12, perform ball planting on the part where the window is exposed on the surface;

Step 12. Referring to Figure 13, stick a solder ball protective film on the front of the solder ball, and remove the carrier board or the carrier board and the separation layer on the back;

Step 13, see Figure 14, remove the back of the carrier to continue implanting chips, active devices, passive devices and other electronic components, or connect completed package components, such as QFN, CSP, BGA, LGA, etc.;

Step 14, refer to Figure 15, and selectively perform encapsulation;

Step 15, see Figure 16, remove the solder ball protection film and cut into individual products.

In addition to the above-mentioned embodiments, the present invention also includes other implementations, and any technical solution formed by equivalent transformation or equivalent replacement shall fall within the protection scope of the claims of the present invention.

Claims (4)

1. the fan-out package structure that a kind of 3D is connected, it is characterised in that：It includes line layer（1）, the line layer（1）The back side It is provided with chip（3）, the chip（3）Front is provided with metal goalpost（4）With the first bonding wire（5）, the chip（3）Front sets It is equipped with rewiring line layer（2）, the chip（3）With rewiring line layer（2）Between pass through metal goalpost（4）With the first bonding wire （5）It is connected, the line layer（1）With rewiring circuit（2）Between pass through the second bonding wire（7）It is connected, the line layer （1）, reroute line layer（2）And chip（3）Periphery is encapsulated with the first plastic packaging material（6）, the line layer（1）Front is set There is electronic component（9）Or potted element（10）, the electronic component（9）Or potted element（10）Periphery is encapsulated with the second plastic packaging material （11）, the rewiring line layer（2）The back side is provided with soldered ball（8）, the soldered ball（8）With soldered ball（8）Between set the 3rd exhausted Edge material（12）.

2. the fan-out package structure that a kind of 3D according to claim 1 is connected, it is characterised in that：Line layer（1）By many Layer metallic circuit layer and insulating materials are constituted.

3. the fan-out package structure that a kind of 3D according to claim 1 is connected, it is characterised in that：Reroute line layer （2）It is made up of multiple layer metal line layer and insulating materials.

4. the process of the fan-out package structure of a kind of 3D connection, it is characterised in that methods described comprises the following steps：

Step one, a piece of support plate is taken,

Step 2, support plate front form line layer by repeatedly plating and insulation coating；

Step 3, the pasting chip on line layer；

Step 4, metal goalpost is beaten in chip front side part of solder pads using two ends routing method, in chip and metallic circuit layer Between bonding wire and neighbouring potted element metallic circuit layer between bonding wire；

Step 5, line layer, chip and bonding wire are encapsulated with plastic packaging material；

Step 6, grinding are thinning, disconnect the bonding wire connection between neighbouring potted element, disconnect between chip and metallic circuit layer The bonding wire connection for dividing, and expose chip upper section or whole metal goalpost；

Step 7, plastic packaging material surface are formed by plating and fill insulant and reroute line layer, by the gold of chip surface The bonding wire part of category goalpost and disconnection reroutes and electrically extends out；

Step 8, reroute line layer covering surface insulating barrier, need on the insulating layer with exposed electrical junction open a window plant Enter tin ball；

Step 9, front patch soldered ball diaphragm, back side removal support plate；

Step 10, the back side continuation implantation electronic component or potted element in removal support plate；

Selective encapsulating is overleaf carried out after step 11, implant element；

Single product is cut into after step 12, finally removal soldered ball diaphragm.