CN106802380A - Track traffic electronics veneer strenuous test method - Google Patents
Track traffic electronics veneer strenuous test method Download PDFInfo
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- CN106802380A CN106802380A CN201710134495.0A CN201710134495A CN106802380A CN 106802380 A CN106802380 A CN 106802380A CN 201710134495 A CN201710134495 A CN 201710134495A CN 106802380 A CN106802380 A CN 106802380A
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- 238000012360 testing method Methods 0.000 claims abstract description 179
- 230000010354 integration Effects 0.000 claims abstract description 41
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- 230000008569 process Effects 0.000 claims description 15
- 238000002474 experimental method Methods 0.000 claims description 9
- 230000035939 shock Effects 0.000 claims description 6
- 230000008901 benefit Effects 0.000 abstract description 2
- 230000007613 environmental effect Effects 0.000 description 11
- 230000008859 change Effects 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 230000006872 improvement Effects 0.000 description 2
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/005—Testing of electric installations on transport means
- G01R31/008—Testing of electric installations on transport means on air- or spacecraft, railway rolling stock or sea-going vessels
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2817—Environmental-, stress-, or burn-in tests
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Abstract
The invention discloses a kind of track traffic electronics veneer strenuous test method, including the first compbined test that low temperature is combined with vibration, following steps are specifically included:S01, first, determines each the first integration test point in the first compbined test, and each first integration test point has corresponding temperature value and vibration values;S02, it is under "on" position in electronics veneer, keeps the first Preset Time under each first integration test point, and offline or on-line testing is carried out to electronics veneer;After test under S03, the whole first integration test points of completion, electronics veneer is placed under the conditions of debugging enironment carries out off-line test.Track traffic electronics veneer strenuous test method of the invention has the advantages that to improve electronics veneer reliability.
Description
Technical field
The invention mainly relates to technical field of rail traffic, a kind of track traffic electronics veneer strenuous test method is refered in particular to.
Background technology
Strenuous test is a kind of reliability development test by accelerated stress, and effect is that to obtain product design more strong
It is strong, mainly by applying stepstress, constantly accelerate to excite the latent defect of product, and be improved and verify, make product
The reliability of product is improved constantly, and the adaptive capacity to environment of product is also improved.Although current reliability test is a kind of biography
The general simulated test or reliability test of system, but when being directed to track traffic electronics veneer and carrying out strenuous test, test period
Long, efficiency is low and expensive, still lacks specific effective method.
The content of the invention
The technical problem to be solved in the present invention is that:For the technical problem that prior art is present, the present invention provides one
Plant the track traffic electronics veneer strenuous test method for effectively improving electronics veneer functional reliability.
In order to solve the above technical problems, technical scheme proposed by the present invention is:
A kind of track traffic electronics veneer strenuous test method, including the first compbined test that low temperature is combined with vibration,
Specifically include following steps:
S01, first, determines each the first integration test point in the first compbined test, and each first integration test point is equal
There are corresponding temperature value and vibration values;
S02, electronics veneer be in "on" position under, keep the first Preset Time under each first integration test point,
And offline or on-line testing is carried out to electronics veneer;
After test under S03, the whole first integration test points of completion, electronics veneer is placed under the conditions of debugging enironment to be carried out
Off-line test.
As the further improvement of above-mentioned technical proposal:
In step S01, six the first integration test points are determined, corresponding temperature value is respectively 20%Tmin, 40%
Tmin, 60%Tmin, 80%Tmin and 100%Tmin, vibration values are respectively 20%Vmax, 40%Vmax, 60%Vmax, 80%
Vmax and 100%Vmax, wherein Tmin are the low temperature limit of electronics veneer, and Vmax is the vibration mark value of electronics veneer, is shaken
Dynamic direction is vertical direction.
In step S02, the temperature rate in process of the test is 3 DEG C/min~200 DEG C/min.
In step S02, in the first Preset Time under each first integration test point, first protected under corresponding temperature value
Vibrated again after holding certain hour, and carried out offline or on-line testing to electronics veneer in vibration processes.
First Preset Time is 1h.
Before step S02, examination is first predicted under the conditions of debugging enironment.
Corresponding temperature is 18 DEG C~30 DEG C under the conditions of the debugging enironment, and humidity is 40%RH~70%RH.
Also include the second compbined test that high temperature, vibration and humidity are combined, specifically include following steps:
S11, first, determines each the second integration test point in the second compbined test, and each second integration test point is equal
There are corresponding temperature value, vibration values and humidity value;
S12, electronics veneer be in "on" position under, keep the second Preset Time under each second integration test point,
And offline or on-line testing is carried out to electronics veneer;
After test under S13, the whole second integration test points of completion, electronics veneer is placed under the conditions of debugging enironment to be carried out
Off-line test.
In step s 11, six the second integration test points are determined, corresponding temperature value is respectively 20%Tmin, 40%
Tmin, 60%Tmin, 80%Tmin and 100%Tmin, vibration values are respectively 20%Vmax, 40%Vmax, 60%Vmax, 80%
Vmax and 100%Vmax, humidity value be 20%RHmax, 40%RHmax, 60%RHmax, 80%RHmax and 100%RHmax,
Wherein Tmin is the low temperature limit of electronics veneer, and Vmax is the vibration mark value of electronics veneer, and direction of vibration is vertical direction,
RHmax is humidity extremes value.
Also include that low temperature step stress test, high temperature step stress test, the experiment of quick temperature shock cycle and vibration stepping should
Power is tested.
Compared with prior art, the advantage of the invention is that:
Track traffic electronics veneer test method of the invention, applies various stress and carries out for track traffic electronics veneer
Strenuous test simultaneously proposes corresponding strenuous test section and method, so as to more effectively excite product bug, is made using the experiment
Electronics veneer fully exposes its latent defect in development stage early stage, and to improve its reliability, effectively drop Electronic locomotive device exists
Maintenance cost in life cycle management, and determine its sensitive stress limit condition of operation, and determine its major failure by analyzing
Pattern and weak link, so as to ensure the reliability level of whole rail transit electrical equipment.
Brief description of the drawings
Fig. 1 is the strenuous test profile of the first compbined test of the invention.
Fig. 2 is the strenuous test profile of the second compbined test of the invention.
Fig. 3 is low temperature stepstress strenuous test profile of the invention.
Fig. 4 is high temperature stepstress strenuous test profile of the invention.
Fig. 5 is quick temperature shock cycle test profile map of the invention.
Fig. 6 is vibration step stress test profile of the invention.
Fig. 7 is vibration stepstress strenuous test spectrogram of the invention.
Specific embodiment
Below in conjunction with Figure of description and specific embodiment, the invention will be further described.
As shown in figure 1, the track traffic electronics veneer strenuous test method of the present embodiment, including low temperature is combined with vibration
The first compbined test, specifically include following steps:
S01, first, determines each the first integration test point in the first compbined test, and each first integration test point is equal
There are corresponding temperature value and vibration values;
S02, electronics veneer be in "on" position under, keep the first Preset Time under each first integration test point,
And offline or on-line testing is carried out to electronics veneer;
After test under S03, the whole first integration test points of completion, electronics veneer is placed under the conditions of debugging enironment to be carried out
Off-line test.
Track traffic electronics veneer test method of the invention, for track traffic electronics veneer (circuit board, such as power panel
Or communication board) apply various stress development strenuous tests and propose corresponding strenuous test section and method, so that more effectively
Product bug is excited, electronics veneer development stage early stage is fully exposed its latent defect using the experiment, to improve its reliability
Property, maintenance cost of the Electronic locomotive device in life cycle management is effectively reduced, and determine its sensitive stress limit condition of operation,
And determine its chife failure models and weak link by analyzing, so as to ensure the reliability water of whole rail transit electrical equipment
It is flat.
In the present embodiment, in step S01, six the first integration test points, corresponding temperature value and vibration values point are determined
Not Wei (20%Tmin, 20%Vmax), (40%Tmin, 40%Vmax), (60%Tmin, 60%Vmax), (80%Tmin,
80%Vmax) with (100%Tmin, 100%Vmax), wherein Tmin is the low temperature limit of electronics veneer, and Vmax is electronics list
The vibration mark value of plate, direction of vibration is vertical direction.Certainly, in other embodiments, the number of each first integration test point
Also any is can use, and the temperature value of each first integration test point can take arbitrary value between 0%Tmin~100%Tmin,
Vibration values take arbitrary value between 0%Vmax~100%Vmax.
In the present embodiment, in step S02, the temperature rate in process of the test takes between 3 DEG C/min~200 DEG C/min
Value, specifically can use 3 DEG C/min.
In the present embodiment, in step S02, in the first Preset Time under each first integration test point, first right
Answer and vibrated again after keeping certain hour under temperature value, and carry out offline or online survey to electronics veneer in vibration processes
Examination;Specifically, the first Preset Time takes 1h, and first temperature keeps 0.5h, then starts to vibrate and carry out on-line testing, on-line testing
During record at the beginning of each test event between.
In the present embodiment, before step S02, examination is first predicted under the conditions of debugging enironment.Wherein debugging enironment bar
Corresponding temperature is 18 DEG C~30 DEG C under part, and humidity is 40%RH~70%RH.
As shown in Fig. 2 in the present embodiment, the second compbined test being also combined including high temperature, vibration and humidity, specific bag
Include following steps:
S11, first, determines each the second integration test point in the second compbined test, and each second integration test point is equal
There are corresponding temperature value, vibration values and humidity value;
S12, electronics veneer be in "on" position under, keep the second Preset Time under each second integration test point,
And offline or on-line testing is carried out to electronics veneer;
After test under S13, the whole second integration test points of completion, electronics veneer is placed under the conditions of debugging enironment to be carried out
Off-line test.
In the present embodiment, in step s 11, six the second integration test points are determined, corresponding temperature value is respectively 20%
Tmin, 40%Tmin, 60%Tmin, 80%Tmin and 100%Tmin, vibration values are respectively 20%Vmax, 40%Vmax, 60%
Vmax, 80%Vmax and 100%Vmax, humidity value be 20%RHmax, 40%RHmax, 60%RHmax, 80%RHmax and
100%RHmax, wherein Tmin are the low temperature limit of electronics veneer, and Vmax is the vibration mark value of electronics veneer, direction of vibration
It is vertical direction, RHmax is humidity extremes value.Certainly, in other embodiments, the number of each second integration test point also takes and appoints
Meaning, and the temperature value of each second integration test point can take arbitrary value between 0%Tmin~100%Tmin, vibration values exist
Arbitrary value is taken between 0%Vmax~100%Vmax, humidity value takes arbitrary value between 0%RHmax~100%RHmax.
In the present embodiment, also including low temperature step stress test, high temperature step stress test, quick temperature shock cycle experiment and
Vibration step stress test, is described in detail to each experiment below:
1st, low temperature step stress test:
The initial temperature point of low temperature step stress test is -26 DEG C, and end temp point is -60 DEG C or reaches the work of product
The limit.Changed with 5 DEG C of steps.Offline or on-line testing is carried out to electronics veneer in each temperature step, then by temperature
Off-line test is carried out under regulation to debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH~70%RH).Fig. 3 is low temperature stepping
Stress test section, wherein T1 are the test adjustment time, and T2 is temperature hold-time (1h).
(1) each step test temperature spot of the section is -25 DEG C, -30 DEG C, -35 DEG C, -40 DEG C, -45 DEG C, -50 DEG C, -55
DEG C, -60 DEG C, changed with 5 DEG C of temperature steps;The heating rate and rate of temperature fall of process of the test are 3 DEG C/min;
(2) remained powered in whole process of the test, control product temperature;
(3) carry out testing preceding pretest under debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH~70%RH);
(4) 1 hour is incubated in each test temperature point, energization was proceeded by 0.5 hour and is started and is carried out on-line testing,
Tested model machine must be made to carry out 3 times and to start detection, between being recorded during on-line testing at the beginning of each test event;
(5) conventional environment is returned to after the completion of the insulation of each temperature step, offline or on-line testing is carried out to electronics veneer, from
Line test environment is debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH~70%RH);
Note:1. low temperature step stress test temperature takes arbitrary temp value between+5 DEG C~-65 DEG C, that is, section is each
Step test temperature spot is not to be fixed as -25 DEG C, -30 DEG C, -35 DEG C, -40 DEG C, -45 DEG C, -50 DEG C, -55 DEG C, and -60 DEG C this is several
It is individual, arbitrary temp value can be taken between+5 DEG C~-65 DEG C.2. the heating rate and rate of temperature fall of process of the test can be 3
DEG C/min~200 DEG C/min between take arbitrary temp speed.
2nd, high temperature step stress test
Foundation《GB/T25119-2010 rail transit rolling stock electronic installations》In hot test requirement, high temperature stepping
The initial temperature point of strenuous test is 40 DEG C, and end temp point is 120 DEG C or reaches the working limit of product;Wherein in crucial temperature
70 DEG C of degree point is nearby changed with 5 DEG C of steps, is changed with 10 DEG C of steps in other temperature spots.In each temperature step pair
Electronics veneer carries out offline or on-line testing, then by temperature adjustment to debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH
~70%RH) under carry out off-line test or on-line testing.
High temperature step stress test section as shown in figure 4, wherein T1 be the test adjustment time, T2 is temperature hold-time
(1h)。
(1) each step test temperature spot of the section be 40 DEG C, 50 DEG C, 60 DEG C, 70 DEG C, 75 DEG C, 80 DEG C, 85 DEG C, 90 DEG C,
95 DEG C, 100 DEG C, 105 DEG C, 110 DEG C, 115 DEG C and 120 DEG C, temperature step is 5 DEG C after 70 DEG C, in other temperature spots with 10
A DEG C step, the heating rate and rate of temperature fall of process of the test are 3 DEG C/min;
(2) remained powered in whole process of the test, control product temperature;
(3) carry out testing preceding pretest under debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH~70%RH);
(4) 1 hour is incubated in each test temperature point, on-line testing was proceeded by 0.5 hour, during on-line testing
Between recording at the beginning of each test event;
(5) conventional environment is returned to after the completion of the insulation of each temperature step, offline or on-line testing is carried out to electronics veneer, from
Line test environment is debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH~70%RH);
Note:1. high temperature step stress test temperature takes arbitrary temp value between+30 DEG C~1000 DEG C, that is, section
Each step test temperature spot is not to be fixed as 40 DEG C, 50 DEG C, 60 DEG C, 70 DEG C, 75 DEG C, 80 DEG C, 85 DEG C, 90 DEG C, 95 DEG C, 100
DEG C, 105 DEG C, 110 DEG C, 115 DEG C and 120 DEG C these points can take arbitrary temp value between+30 DEG C~1000 DEG C.2. try
The heating rate and rate of temperature fall for testing process can take arbitrary temp speed between 3 DEG C/min~200 DEG C/min.
3rd, quick temperature shock cycle experiment
The result of quick temperature shock cycle experimental evidence high temperature step stress test and low temperature step stress test determines.
Fast temperature fluctuating stress test profile as shown in figure 5, wherein T1 be the test adjustment time, T2 for temperature keep when
Between (1h).
(1) 80% high temperature and low-temperature working limiting range of stress level are taken or the high temperature degree that subtracts 5, low temperature adds 5 degree;
(2) temperature cycling test is carried out with certain rate temperature change, rate of temperature change value is followed successively by 10 DEG C/min,
20 DEG C/min, 30 DEG C/min, 40 DEG C/min, 45 DEG C/min, 50 DEG C/min, 55 DEG C/min, 60 DEG C/min, the temperature after 40 DEG C/min
Degree step is 5 DEG C/min, in other temperature spots with 10 DEG C/min, mono- step;
(3) it is powered in whole process of the test, controls product temperature;
(4) carry out testing preceding pretest under debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH~70%RH);
(5) 1 hour is incubated respectively under each high temperature and low temperature, on-line testing, on-line testing were proceeded by 0.5 hour
Between being recorded in journey at the beginning of each test event;
(6) conventional environment is returned to after the completion of the insulation of each temperature step, offline or on-line testing is carried out to electronics veneer, from
Line test environment is debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH~70%RH);
Note:1. take high temperature and low-temperature working limiting range of stress level percentage can between 60%~100% any number,
High temperature limit subtracts Temperature numerical and can take arbitrary temp value between 0 DEG C~50 DEG C, and low temperature limit increases Temperature numerical can be with
Arbitrary temp value is taken between 0 DEG C~50 DEG C;2. the rate temperature change of process of the test can be in 3 DEG C/min~200 DEG C/min
Between take arbitrary temp speed.
4th, step stress test is vibrated
Direction of vibration includes vertical, horizontal and vertical in vibration step stress test.In each direction, stepstress is vibrated
The initial magnitude 0rms. of experiment, terminates magnitude and is 5gr.m.s. or reaches the working limit of product, determine sensitive direction and each
The limiting range of stress of axial direction;Changed with mono- step of 0.5gr.m.s. under all vibration levels, in each vibration step to electronics
Veneer carries out offline or on-line testing, then will carry out off-line test under vibration regulation to debugging single board environmental condition.
In each direction of vibration, step stress test section such as Fig. 6 is vibrated, rumble spectrum is shown in Fig. 7.
(1) each step test vibration level be 0gr.m.s, 0.5gr.m.s, 1.0gr.m.s, 1.5gr.m.s, 2gr.m.s,
2.5gr.m.s, 3.0gr.m.s, 3.5gr.m.s, 4.0gr.m.s, 4.5gr.m.s, 5.0gr.m.s under all vibration levels with
Mono- step change of 0.5gr.m.s.;
(2) it is powered in whole process of the test, controls product temperature;
(3) carry out testing preceding pretest under debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH~70%RH);
(4) each experiment vibration level is kept for 15 minutes or 30 minutes, and vibration carries out on-line testing, on-line testing after starting
During record at the beginning of each test event between;
(5) conventional environment is returned to after the completion of each vibration level, offline or on-line testing is carried out to electronics veneer, it is offline to survey
Test ring border is debugging single board environmental condition (18 DEG C~30 DEG C, 40%RH~70%RH);
Note:1. vibration step stress test vibration level takes any vibration level between 0gr.m.s~1000gr.m.s,
Namely each step test vibration level of section is not to be fixed as 0gr.m.s, 0.5gr.m.s, 1.0gr.m.s,
1.5gr.m.s, 2gr.m.s, 2.5gr.m.s, 3.0gr.m.s, 3.5gr.m.s, 4.0gr.m.s, 4.5gr.m.s, 5.0gr.m.s
These points, can take any vibration level between 0gr.m.s~1000gr.m.s;2. vibration duration can 5~
Random time value is taken between 120 minutes.
The above is only the preferred embodiment of the present invention, protection scope of the present invention is not limited merely to above-described embodiment,
All technical schemes belonged under thinking of the present invention belong to protection scope of the present invention.It should be pointed out that for the art
For those of ordinary skill, some improvements and modifications without departing from the principles of the present invention should be regarded as protection of the invention
Scope.
Claims (10)
1. a kind of track traffic electronics veneer strenuous test method, it is characterised in that first be combined with vibration including low temperature
Compbined test, specifically includes following steps:
S01, first, determines each the first integration test point in the first compbined test, and each first integration test point has right
The temperature value and vibration values answered;
S02, it is under "on" position in electronics veneer, keeps the first Preset Time under each first integration test point, and right
Electronics veneer carries out offline or on-line testing;
After test under S03, the whole first integration test points of completion, electronics veneer is placed under the conditions of debugging enironment to be carried out offline
Test.
2. track traffic electronics veneer strenuous test method according to claim 1, it is characterised in that in step S01,
Determine six the first integration test points, corresponding temperature value is respectively 20%Tmin, 40%Tmin, 60%Tmin, 80%Tmin
And 100%Tmin, vibration values are respectively 20%Vmax, 40%Vmax, 60%Vmax, 80%Vmax and 100%Vmax, wherein
Tmin is the low temperature limit of electronics veneer, and Vmax is the vibration mark value of electronics veneer, and direction of vibration is vertical direction.
3. track traffic electronics veneer strenuous test method according to claim 1, it is characterised in that in step S02,
Temperature rate in process of the test is 3 DEG C/min~200 DEG C/min.
4. track traffic electronics veneer strenuous test method as claimed in any of claims 1 to 3, its feature exists
In first to keep one under corresponding temperature value in the first Preset Time under each first integration test point in step S02
Vibrated again after fixing time, and carried out offline or on-line testing to electronics veneer in vibration processes.
5. track traffic electronics veneer strenuous test method according to claim 4, it is characterised in that described first presets
Time is 1h.
6. track traffic electronics veneer strenuous test method as claimed in any of claims 1 to 3, its feature exists
In first that examination is predicted under the conditions of debugging enironment before step S02.
7. track traffic electronics veneer strenuous test method according to claim 6, it is characterised in that the debugging enironment
Under the conditions of corresponding temperature be 18 DEG C~30 DEG C, humidity be 40%RH~70%RH.
8. track traffic electronics veneer strenuous test method as claimed in any of claims 1 to 3, its feature exists
In the second compbined test being also combined including high temperature, vibration and humidity specifically includes following steps:
S11, first, determines each the second integration test point in the second compbined test, and each second integration test point has right
Temperature value, vibration values and the humidity value answered;
S12, it is under "on" position in electronics veneer, keeps the second Preset Time under each second integration test point, and right
Electronics veneer carries out offline or on-line testing;
After test under S13, the whole second integration test points of completion, electronics veneer is placed under the conditions of debugging enironment to be carried out offline
Test.
9. track traffic electronics veneer strenuous test method according to claim 8, it is characterised in that in step s 11,
Determine six the second integration test points, corresponding temperature value is respectively 20%Tmin, 40%Tmin, 60%Tmin, 80%Tmin
And 100%Tmin, vibration values are respectively 20%Vmax, 40%Vmax, 60%Vmax, 80%Vmax and 100%Vmax, humidity value
It is 20%RHmax, 40%RHmax, 60%RHmax, 80%RHmax and 100%RHmax, wherein Tmin is low for electronics veneer
Warm limiting value, Vmax is the vibration mark value of electronics veneer, and direction of vibration is vertical direction, and RHmax is humidity extremes value.
10. track traffic electronics veneer strenuous test method as claimed in any of claims 1 to 3, its feature exists
In also including low temperature step stress test, high temperature step stress test, the experiment of quick temperature shock cycle and vibration stepstress examination
Test.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN110726923A (en) * | 2018-07-16 | 2020-01-24 | 郑州宇通客车股份有限公司 | Accelerated life test method for motor controller circuit board |
CN113328900A (en) * | 2020-02-28 | 2021-08-31 | 株洲中车时代电气股份有限公司 | Multi-composite environment test method for rail transit communication device |
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