CN106783955B - Semiconductor device including an insertion layer of aluminum gallium nitride and indium gallium nitride and method of manufacturing the same - Google Patents
Semiconductor device including an insertion layer of aluminum gallium nitride and indium gallium nitride and method of manufacturing the same Download PDFInfo
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Abstract
本发明涉及一种含有氮镓铝和氮镓铟的插入层的半导体器件及其制造方法。该半导体器件包括衬底、设在该衬底上部的籽晶层、设在该籽晶层上部的缓冲层、设在该缓冲层上部的Ⅲ族氮化物外延层以及设置在该Ⅲ族氮化物外延层中间的插入层,该插入层包括氮镓铝层和/或氮镓铟层。本发明通过设置插入层可以补偿Ⅲ族氮化物外延层中的一部分张应力,有效减少Ⅲ族氮化物外延层的位错和张应力,可以得到高质量的Ⅲ族氮化物外延层。
The present invention relates to a semiconductor device containing an insertion layer of aluminum gallium nitride and indium gallium nitride and a method for manufacturing the same. The semiconductor device comprises a substrate, a seed layer disposed on the substrate, a buffer layer disposed on the seed layer, a III-group nitride epitaxial layer disposed on the buffer layer, and an insertion layer disposed in the middle of the III-group nitride epitaxial layer, wherein the insertion layer comprises an aluminum gallium nitride layer and/or an indium gallium nitride layer. The present invention can compensate for a portion of the tensile stress in the III-group nitride epitaxial layer by disposing the insertion layer, effectively reduce the dislocation and tensile stress of the III-group nitride epitaxial layer, and obtain a high-quality III-group nitride epitaxial layer.
Description
技术领域Technical Field
本发明涉及半导体器件领域,特别是涉及一种含有氮镓铝和氮镓铟的插入层的半导体器件及其制造方法。The present invention relates to the field of semiconductor devices, and in particular to a semiconductor device containing an insertion layer of aluminum gallium nitride and indium gallium nitride and a manufacturing method thereof.
背景技术Background Art
Ⅲ族氮化物半导体材料被誉为是第三代半导体材料,包括氮化镓(GaN)、氮化铝(AlN)、氮化铟(InN)以及他们之间形成的三、四元合金,如氮镓铝(AlGaN)、氮铝铟(InAlN)和氮镓铟(InGaN)。以氮化镓(GaN)为主的Ⅲ族氮化物半导体材料具有宽的直接代隙(Eg=3.36eV)、高熔点、高热导率、高饱和电子速率、高临界击穿电场强度和高电子室温迁移率,被广泛应用于金属半导体场效应晶体管(MESFET)、高电子迁移率晶体管(HEMT)、异质结场效应晶体管(HFET)、发光二极管(LED)等耐高温、高压和高频交换器件。Group III nitride semiconductor materials are known as the third generation of semiconductor materials, including gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN) and ternary and quaternary alloys formed between them, such as aluminum gallium nitride (AlGaN), indium aluminum nitride (InAlN) and indium gallium nitride (InGaN). Group III nitride semiconductor materials, mainly gallium nitride (GaN), have a wide direct generation gap (Eg = 3.36eV), a high melting point, high thermal conductivity, high saturation electron velocity, high critical breakdown electric field strength and high electron room temperature mobility. They are widely used in metal semiconductor field effect transistors (MESFETs), high electron mobility transistors (HEMTs), heterojunction field effect transistors (HFETs), light emitting diodes (LEDs) and other high temperature resistant, high voltage and high frequency switching devices.
由于目前很难得到大尺寸的Ⅲ族氮化物单晶体材料,为了获得高质量的Ⅲ族氮化物外延层,一般通过在硅、蓝宝石或碳化硅等衬底材料上进行异质外延生长。但是随着Ⅲ族氮化物外延层厚度的增加,Ⅲ族氮化物薄膜上会产生较多的位错缺陷和较大的内应力,导致Ⅲ族氮化物外延层裂纹,严重影响半导体器件的性能。Since it is difficult to obtain large-sized III-nitride single crystal materials at present, in order to obtain high-quality III-nitride epitaxial layers, heteroepitaxial growth is generally performed on substrate materials such as silicon, sapphire or silicon carbide. However, as the thickness of the III-nitride epitaxial layer increases, more dislocation defects and greater internal stress will be generated on the III-nitride film, resulting in cracks in the III-nitride epitaxial layer, which seriously affects the performance of semiconductor devices.
发明内容Summary of the invention
基于此,有必要针对随着Ⅲ族氮化物外延层厚度的增加,Ⅲ族氮化物薄膜上会产生较多的位错缺陷和较大的内应力的问题,提供一种含有氮镓铝和氮镓铟的插入层的半导体器件及其制造方法。Based on this, it is necessary to provide a semiconductor device and a manufacturing method thereof containing an insertion layer of aluminum gallium nitride and indium gallium nitride to address the problem that more dislocation defects and greater internal stress will be generated on the group III nitride film as the thickness of the group III nitride epitaxial layer increases.
一种含有氮镓铝和氮镓铟的插入层的半导体器件,其特征在于,包括:A semiconductor device containing an insertion layer of aluminum gallium nitride and indium gallium nitride, characterized by comprising:
衬底;substrate;
籽晶层,所述籽晶层设在所述衬底的上部;A seed layer, the seed layer being disposed on an upper portion of the substrate;
缓冲层,所述缓冲层设置在所述籽晶层的上部;a buffer layer, the buffer layer being disposed on an upper portion of the seed crystal layer;
Ⅲ族氮化物外延层,所述Ⅲ族氮化物外延层设置在所述缓冲层的上部;A group III nitride epitaxial layer, wherein the group III nitride epitaxial layer is disposed on an upper portion of the buffer layer;
以及插入层,所述插入层设置在所述Ⅲ族氮化物外延层中间,所述插入层包括氮镓铝层和氮镓铟层。and an insertion layer, wherein the insertion layer is arranged in the middle of the group III nitride epitaxial layer, and the insertion layer includes an aluminum gallium nitride layer and an indium gallium nitride layer.
在其中一个实施例中,所述插入层包括单层氮镓铝层和单层氮镓铟层。In one embodiment, the insertion layer includes a single-layer aluminum gallium nitride layer and a single-layer indium gallium nitride layer.
在其中一个实施例中,所述氮镓铝层和/或氮镓铟层为多层,且所述氮镓铟层与所述氮镓铝层交替层叠。In one embodiment, the aluminum gallium nitride layer and/or the indium gallium nitride layer is a multilayer, and the indium gallium nitride layer and the aluminum gallium nitride layer are alternately stacked.
在其中一个实施例中,当所述氮镓铝层有多层时,每一层所述氮镓铝层中铝的掺杂浓度是不同的,所述氮镓铝层中铝的掺杂浓度小于等于1。In one of the embodiments, when there are multiple layers of the AlGaN layer, the doping concentration of aluminum in each layer of the AlGaN layer is different, and the doping concentration of aluminum in the AlGaN layer is less than or equal to 1.
在其中一个实施例中,所述Ⅲ族氮化物外延层设置多个所述插入层。In one of the embodiments, the III-nitride epitaxial layer is provided with a plurality of the insertion layers.
在其中一个实施例中,所述衬底为蓝宝石衬底、硅衬底或碳化硅衬底。In one embodiment, the substrate is a sapphire substrate, a silicon substrate or a silicon carbide substrate.
在其中一个实施例中,所述籽晶层为氮化铝层和/或氮镓铝层。In one embodiment, the seed layer is an aluminum nitride layer and/or an aluminum gallium nitride layer.
在其中一个实施例中,所述缓冲层为氮化铝层和/或氮镓铝层。In one embodiment, the buffer layer is an aluminum nitride layer and/or an aluminum gallium nitride layer.
在其中一个实施例中,所述Ⅲ族氮化物外延层包括氮化镓外延层及氮镓铝外延层中的至少一层,且所述Ⅲ族氮化物外延层中具有由氮化镓外延层与氮镓铝外延层构成的异质结构。In one embodiment, the III-nitride epitaxial layer includes at least one of a gallium nitride epitaxial layer and an aluminum gallium nitride epitaxial layer, and the III-nitride epitaxial layer has a heterostructure consisting of the gallium nitride epitaxial layer and the aluminum gallium nitride epitaxial layer.
上述半导体器件,在Ⅲ族氮化物外延层中间插入一个氮镓铝层与氮镓铟层层叠设置的插入层,通过变更铝掺杂浓度调整插入层中氮镓铝层的结构构造,有效缓解Ⅲ族氮化物外延层与衬底之间的晶格失配和热失配;并且插入层中的压应力可以补偿Ⅲ族氮化物外延层中的一部分张应力,有效减少Ⅲ族氮化物外延层的位错和张应力。因此,通过含有氮镓铝和氮镓铟的插入层的设置可以得到高质量的Ⅲ族氮化物外延层。In the semiconductor device, an insertion layer composed of a stacked aluminum gallium nitride layer and an indium gallium nitride layer is inserted in the middle of the III-nitride epitaxial layer. The structure of the aluminum gallium nitride layer in the insertion layer is adjusted by changing the aluminum doping concentration, which effectively alleviates the lattice mismatch and thermal mismatch between the III-nitride epitaxial layer and the substrate; and the compressive stress in the insertion layer can compensate for a part of the tensile stress in the III-nitride epitaxial layer, effectively reducing the dislocation and tensile stress of the III-nitride epitaxial layer. Therefore, a high-quality III-nitride epitaxial layer can be obtained by setting an insertion layer containing aluminum gallium nitride and indium gallium nitride.
此外,还有必要提供一种含有氮镓铝和氮镓铟的插入层的半导体器件的制造方法。In addition, it is also necessary to provide a method for manufacturing a semiconductor device containing an insertion layer of aluminum gallium nitride and indium gallium nitride.
一种含有氮镓铝和氮镓铟的插入层的半导体器件的制造方法,其特征在于,所述制造方法包括以下步骤:A method for manufacturing a semiconductor device containing an insertion layer of aluminum gallium nitride and indium gallium nitride, characterized in that the manufacturing method comprises the following steps:
1)在衬底上形成籽晶层;1) forming a seed layer on a substrate;
2)在所述籽晶层上形成缓冲层;2) forming a buffer layer on the seed layer;
3)在所述缓冲层上形成Ⅲ族氮化物外延层;3) forming a group III nitride epitaxial layer on the buffer layer;
4)在预先生长的所述Ⅲ族氮化物层表面形成插入层,接着在所述插入层上继续生长所述Ⅲ族氮化物以与预先生长的所述Ⅲ族氮化物层形成所述Ⅲ族氮化物外延层,所述插入层包括氮镓铝层和氮镓铟层。4) forming an insertion layer on the surface of the pre-grown III-nitride layer, and then continuing to grow the III-nitride on the insertion layer to form the III-nitride epitaxial layer with the pre-grown III-nitride layer, wherein the insertion layer includes an aluminum gallium nitride layer and an indium gallium nitride layer.
通过该方法制造的含有氮镓铝和氮镓铟的插入层的半导体器件,具有较高的高临界击穿电场强度和高电子室温迁移率,半导体器件的工作性能较好。The semiconductor device containing the insertion layer of aluminum gallium nitride and indium gallium nitride manufactured by this method has a high critical breakdown electric field strength and a high electron room temperature mobility, and the working performance of the semiconductor device is good.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1为一实施方式的含有氮镓铝和氮镓铟的插入层的半导体器件的结构示意图;FIG1 is a schematic structural diagram of a semiconductor device containing an insertion layer of aluminum gallium nitride and indium gallium nitride according to an embodiment;
图2为一实施方式的含有氮镓铝和氮镓铟的插入层的半导体器件的插入层的结构示意图。FIG. 2 is a schematic diagram of the structure of an insertion layer of a semiconductor device containing an insertion layer of aluminum gallium nitride and indium gallium nitride according to one embodiment.
具体实施方式DETAILED DESCRIPTION
为了便于理解本发明,下面将参照相关附图对本发明的含有硅掺杂氮化铝层的半导体器件及其制造方法进行更全面的描述。附图中给出了本发明的较佳实施例。但是,本发明可以以许多不同的形式来实现,并不限于本文所描述的实施例。相反地,提供这些实施例的目的是使对本发明的公开内容的理解更加透彻全面。In order to facilitate the understanding of the present invention, a semiconductor device containing a silicon-doped aluminum nitride layer and a method for manufacturing the same will be described more fully below with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the accompanying drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present invention more thorough and comprehensive.
除非另有定义,本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的,不是旨在于限制本发明。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and/or" used herein includes any and all combinations of one or more related listed items.
如图1所示,一实施方式的半导体器件包括衬底101、籽晶层102、缓冲层103、第一Ⅲ族氮化物外延层104、插入层105以及第二Ⅲ族氮化物外延层106。As shown in FIG. 1 , a semiconductor device according to an embodiment includes a substrate 101 , a seed layer 102 , a buffer layer 103 , a first group III nitride epitaxial layer 104 , an insertion layer 105 , and a second group III nitride epitaxial layer 106 .
在本实施方式中,衬底101的材料选择除了要考虑晶格失配度、材料的热膨胀系数,还要综合考虑材料的尺寸和价格。在本实施方式中,衬底101的材料选用硅。可以理解,在其他实施方式中,衬底101的材料还可以为蓝宝石或碳化硅等。In this embodiment, the material selection of the substrate 101 should not only consider the lattice mismatch and the thermal expansion coefficient of the material, but also comprehensively consider the size and price of the material. In this embodiment, the material of the substrate 101 is silicon. It is understood that in other embodiments, the material of the substrate 101 can also be sapphire or silicon carbide.
籽晶层102位于衬底101的上表面,主要作用是在衬底表面形成成核点,有利于Ⅲ族氮化物在衬底上形核和生长。在本实施方式中,籽晶层102的材料是氮化铝。籽晶层102由一层或多层氮化铝层构造而成。优选的,籽晶层102的厚度小于等于500nm。可以理解,在其他实施方式中,籽晶层102的材料是氮镓铝、氮化镓、氮化硅等其他Ⅲ族氮化物,或几者的组合。籽晶层102是含有氮化铝层、氮化镓层、氮化硅层等其他Ⅲ族氮化物层构成的一层或多层结构。The seed layer 102 is located on the upper surface of the substrate 101, and its main function is to form nucleation points on the substrate surface, which is conducive to the nucleation and growth of group III nitrides on the substrate. In this embodiment, the material of the seed layer 102 is aluminum nitride. The seed layer 102 is constructed of one or more layers of aluminum nitride layers. Preferably, the thickness of the seed layer 102 is less than or equal to 500nm. It is understood that in other embodiments, the material of the seed layer 102 is other group III nitrides such as aluminum gallium nitride, gallium nitride, silicon nitride, or a combination of several. The seed layer 102 is a one-layer or multi-layer structure composed of other group III nitride layers such as aluminum nitride, gallium nitride, and silicon nitride.
缓冲层103位于籽晶层102的上部,主要作用是有效缓解Ⅲ族氮化物外延层与衬底之间的晶格失配和热失配,减少了Ⅲ族氮化物外延层因应力产生的应变,降低了位错和缺陷的发生。在本实施方式中,缓冲层103的材料是氮镓铝。缓冲层103由一层或多层氮镓铝层构造而成。优选的,缓冲层103的厚度小于等于5um。可以理解,在其他实施方式中,缓冲层103的材料是氮化铝、氮化镓、氮化硅等其他Ⅲ族氮化物,或几者的组合。缓冲层103是含有氮化铝层、氮化镓层、氮化硅层等其他Ⅲ族氮化物层构成的一层或多层结构。The buffer layer 103 is located on the upper part of the seed layer 102. Its main function is to effectively alleviate the lattice mismatch and thermal mismatch between the III-nitride epitaxial layer and the substrate, reduce the strain of the III-nitride epitaxial layer caused by stress, and reduce the occurrence of dislocations and defects. In this embodiment, the material of the buffer layer 103 is gallium aluminum nitride. The buffer layer 103 is constructed of one or more layers of gallium aluminum nitride. Preferably, the thickness of the buffer layer 103 is less than or equal to 5um. It is understood that in other embodiments, the material of the buffer layer 103 is aluminum nitride, gallium nitride, silicon nitride and other III-nitrides, or a combination of several. The buffer layer 103 is a layer or multilayer structure composed of other III-nitride layers such as aluminum nitride layers, gallium nitride layers, and silicon nitride layers.
Ⅲ族氮化物外延层由第一Ⅲ族氮化物外延层104和第二Ⅲ族氮化物外延层106构成。第一Ⅲ族氮化物外延层104位于缓冲层103的上部,第二Ⅲ族氮化物外延层106位于第一Ⅲ族氮化物外延层104的上部。在本实施方式中,第一Ⅲ族氮化物外延层104的材料是氮化镓,第二Ⅲ族氮化物外延层106的材料是氮镓铝。The III-nitride epitaxial layer is composed of a first III-nitride epitaxial layer 104 and a second III-nitride epitaxial layer 106. The first III-nitride epitaxial layer 104 is located on the upper portion of the buffer layer 103, and the second III-nitride epitaxial layer 106 is located on the upper portion of the first III-nitride epitaxial layer 104. In this embodiment, the material of the first III-nitride epitaxial layer 104 is gallium nitride, and the material of the second III-nitride epitaxial layer 106 is aluminum gallium nitride.
在氮化镓外延层和氮镓铝外延层之间构成一个氮镓铝/氮化镓异质结构,氮镓铝/氮化镓异质结构是半导体器件的核心部件。在氮镓铝/氮化镓异质结构界面形成三角形势阱,电子的德布罗意波长比势阱的宽度大,垂直于表面方向上的能量将发生量子化形成子能带,电子在垂直表面方向的运动丧失了自由度,只存在沿表面两个方向的自由度,这些势阱中具有很高的迁移速度的电子即为二维电子气(2DEG)。A gallium nitride aluminum/gallium nitride heterostructure is formed between the gallium nitride epitaxial layer and the gallium nitride aluminum epitaxial layer. The gallium nitride aluminum/gallium nitride heterostructure is the core component of semiconductor devices. A triangular potential well is formed at the gallium nitride aluminum/gallium nitride heterostructure interface. The de Broglie wavelength of electrons is larger than the width of the potential well. The energy perpendicular to the surface will be quantized to form a sub-band. The electrons lose their freedom in the direction perpendicular to the surface and only have freedom in two directions along the surface. The electrons with very high migration speed in these potential wells are two-dimensional electron gas (2DEG).
可以理解,在其他实施方式中,第一Ⅲ族氮化物外延层104的材料是氮嫁铝或氮镓铟等其他Ⅲ族氮化物,第二Ⅲ族氮化物外延层106的材料是氮化镓或氮化铟等其他Ⅲ族氮化物。Ⅲ族氮化物外延层为一层第一Ⅲ族氮化物外延层104与一层第二Ⅲ族氮化物外延层106构成的两层结构、两层第一Ⅲ族氮化物外延层104与一层第二Ⅲ族氮化物外延层106构成的三层结构、一层第一Ⅲ族氮化物外延层104与两层第二Ⅲ族氮化物外延层106构成的三层结构、两层第一Ⅲ族氮化物外延层104与两层第二Ⅲ族氮化物外延层106构成的四层结构等包括第一Ⅲ族氮化物外延层104及第二Ⅲ族氮化物外延层106构成的多层结构,且Ⅲ族氮化物外延层具有至少一个异质结构。It can be understood that in other embodiments, the material of the first III-nitride epitaxial layer 104 is other III-nitrides such as aluminum gallium nitride or indium gallium nitride, and the material of the second III-nitride epitaxial layer 106 is other III-nitrides such as gallium nitride or indium nitride. The group III nitride epitaxial layer is a two-layer structure consisting of a first group III nitride epitaxial layer 104 and a second group III nitride epitaxial layer 106, a three-layer structure consisting of two first group III nitride epitaxial layers 104 and a second group III nitride epitaxial layer 106, a three-layer structure consisting of a first group III nitride epitaxial layer 104 and two second group III nitride epitaxial layers 106, a four-layer structure consisting of two first group III nitride epitaxial layers 104 and two second group III nitride epitaxial layers 106, etc., including a multilayer structure consisting of the first group III nitride epitaxial layer 104 and the second group III nitride epitaxial layer 106, and the group III nitride epitaxial layer has at least one heterostructure.
插入层105位于Ⅲ族氮化物外延层的中间,主要作用是使后续生长的外延层处于压应变状态,减少外延层中的应力和位错,进而消除外延层中的裂纹,得到高质量无裂纹的Ⅲ族氮化物外延层。在本实施方式中,插入层105位于第一Ⅲ族氮化物外延层104的中间,插入层105的材料是氮镓铟和氮镓铝,其中氮化铝材料可以根据外延层生长要求变更铝掺杂浓度(铝相对于氮化铝层的质量分数)。优选的,插入层105的厚度小于等于100nm。The insertion layer 105 is located in the middle of the III-nitride epitaxial layer, and its main function is to put the subsequently grown epitaxial layer in a compressive strain state, reduce the stress and dislocation in the epitaxial layer, and then eliminate the cracks in the epitaxial layer to obtain a high-quality, crack-free III-nitride epitaxial layer. In this embodiment, the insertion layer 105 is located in the middle of the first III-nitride epitaxial layer 104, and the material of the insertion layer 105 is gallium indium nitride and gallium aluminum nitride, wherein the aluminum nitride material can change the aluminum doping concentration (the mass fraction of aluminum relative to the aluminum nitride layer) according to the requirements of epitaxial layer growth. Preferably, the thickness of the insertion layer 105 is less than or equal to 100nm.
如图2所示,插入层105为氮镓铝层111与氮镓铟层112依次交替层叠成长构成的超晶格层结构。其中,插入层105中第二层氮镓铝层111中的铝的掺杂浓度相对于第一层氮镓铝层111中的铝的掺杂浓度增加15%,第三层氮镓铝层111中的铝的掺杂浓度相对于第一层氮镓铝层111中的铝的掺杂浓度增加35%,第三层氮镓铝层111中的铝的掺杂浓度相对于第一层氮镓铝层111中的铝的掺杂浓度增加60%。插入层105中每一层氮镓铝层111中的铝的掺杂浓度可以是不固定的,每一层氮镓铝层111中铝的掺杂浓度可以根据Ⅲ族氮化物外延层的生长需求进行调整,可以是不规律变化的。优选的,氮镓铝层111中铝的掺杂浓度小于等于1。As shown in FIG2 , the insertion layer 105 is a superlattice layer structure formed by alternately stacking and growing gallium aluminum nitride layers 111 and gallium indium nitride layers 112. Among them, the doping concentration of aluminum in the second gallium aluminum nitride layer 111 in the insertion layer 105 is increased by 15% relative to the doping concentration of aluminum in the first gallium aluminum nitride layer 111, the doping concentration of aluminum in the third gallium aluminum nitride layer 111 is increased by 35% relative to the doping concentration of aluminum in the first gallium aluminum nitride layer 111, and the doping concentration of aluminum in the third gallium aluminum nitride layer 111 is increased by 60% relative to the doping concentration of aluminum in the first gallium aluminum nitride layer 111. The doping concentration of aluminum in each gallium aluminum nitride layer 111 in the insertion layer 105 may not be fixed, and the doping concentration of aluminum in each gallium aluminum nitride layer 111 may be adjusted according to the growth requirements of the III-group nitride epitaxial layer, and may change irregularly. Preferably, the doping concentration of aluminum in the gallium aluminum nitride layer 111 is less than or equal to 1.
可以理解,在其他实施方式中,插入层105可以是单层氮镓铝层111与单层氮镓铟层112构成的两层结构、两层氮镓铝层111与单层氮镓铟层112构成的三层结构、单层氮镓铝层111与两层氮镓铟层112构成的三层结构、两层氮镓铝层111与两层氮镓铟层112构成的四层结构、三层氮镓铝层111与两层氮镓铟层112构成的五层结构等氮镓铝层111与氮镓铟层112交替层叠成长构成的超晶格层结构。其中,插入层105中每一层氮镓铝层111中的铝的掺杂浓度可以是固定的,也可以是不固定的。每一层氮镓铝层111中铝的掺杂浓度可以根据Ⅲ族氮化物外延层的生长需求进行调整,可以是规律变化的,也可以是不规律变化的。优选的,氮镓铝层111中铝的掺杂浓度小于等于1。It can be understood that in other embodiments, the insertion layer 105 can be a two-layer structure consisting of a single-layer aluminum gallium nitride layer 111 and a single-layer indium gallium nitride layer 112, a three-layer structure consisting of two aluminum gallium nitride layers 111 and a single-layer indium gallium nitride layer 112, a three-layer structure consisting of a single-layer aluminum gallium nitride layer 111 and two indium gallium nitride layers 112, a four-layer structure consisting of two aluminum gallium nitride layers 111 and two indium gallium nitride layers 112, a five-layer structure consisting of three aluminum gallium nitride layers 111 and two indium gallium nitride layers 112, etc., in which the aluminum gallium nitride layers 111 and the indium gallium nitride layers 112 are alternately stacked and grown to form a superlattice layer structure. Among them, the doping concentration of aluminum in each aluminum gallium nitride layer 111 in the insertion layer 105 can be fixed or not fixed. The doping concentration of aluminum in each aluminum gallium nitride layer 111 can be adjusted according to the growth requirements of the III-group nitride epitaxial layer, and can be regularly changed or irregularly changed. Preferably, the doping concentration of aluminum in the aluminum gallium nitride layer 111 is less than or equal to 1.
优选的,在第一Ⅲ族氮化物外延层104和第一Ⅲ族氮化物外延层106中存在多个包含氮镓铝层111与氮镓铟层112的插入层105。Preferably, there are a plurality of insertion layers 105 including aluminum gallium nitride layers 111 and indium gallium nitride layers 112 in the first group III nitride epitaxial layer 104 and the first group III nitride epitaxial layer 106 .
此外,本实施方式还提供了一种上述含有硅掺杂氮化铝层的半导体器件的制造方法,其具体包括如下步骤:In addition, this embodiment also provides a method for manufacturing the semiconductor device containing the silicon-doped aluminum nitride layer, which specifically includes the following steps:
步骤一:在提供的衬底101上沉积形成含有硅掺杂氮化铝的籽晶层102。Step 1: depositing a seed layer 102 containing silicon-doped aluminum nitride on a provided substrate 101 .
在本实施方式中,在1000度以上的NH3氛围中注入三甲基铝通过气相外延生长(MOCDV)的方式形成籽晶层102。In this embodiment, the seed layer 102 is formed by a method of vapor phase epitaxial growth (MOCDV) by implanting trimethylaluminum in an NH 3 atmosphere at a temperature above 1000 degrees.
在形成籽晶层102之前,还包含用湿刻或者干刻蚀去除衬底101的自然氧化层的步骤。Before forming the seed layer 102 , a step of removing the natural oxide layer of the substrate 101 by wet etching or dry etching is also included.
步骤二:在籽晶层102上形成缓冲层103。Step 2: forming a buffer layer 103 on the seed layer 102 .
步骤三:在缓冲层103上形成成核点,促进Ⅲ族氮化物的岛状生长和小岛联并,逐步形成第一Ⅲ族氮化物外延层104。Step three: forming nucleation points on the buffer layer 103 to promote island growth and island merging of group III nitrides, and gradually forming the first group III nitride epitaxial layer 104 .
步骤四:在预先生长的Ⅲ族氮化物层表面形成插入层105,接着在插入层105上继续生长Ⅲ族氮化物以与预先生长的Ⅲ族氮化物层形成第一Ⅲ族氮化物外延层104。在第一Ⅲ族氮化物外延层104中形成插入层105可以减少随着Ⅲ族氮化物层厚度增加产生的内应力和位错。Step 4: forming an insertion layer 105 on the surface of the pre-grown group III nitride layer, and then continuing to grow group III nitride on the insertion layer 105 to form a first group III nitride epitaxial layer 104 with the pre-grown group III nitride layer. Forming the insertion layer 105 in the first group III nitride epitaxial layer 104 can reduce the internal stress and dislocation generated as the thickness of the group III nitride layer increases.
步骤五:在第一Ⅲ族氮化物外延层104上形成第二Ⅲ族氮化物外延层106,完成Ⅲ族氮化物外延层的生长。Step 5: forming a second group III nitride epitaxial layer 106 on the first group III nitride epitaxial layer 104 to complete the growth of the group III nitride epitaxial layer.
以上所述实施例的各技术特征可以进行任意的组合,为使描述简洁,未对上述实施例中的各个技术特征所有可能的组合都进行描述,然而,只要这些技术特征的组合不存在矛盾,都应当认为是本说明书记载的范围。The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
以上所述实施例仅表达了本发明的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对发明专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变形和改进,这些都属于本发明的保护范围。因此,本发明专利的保护范围应以所附权利要求为准。The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims.
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