CN106737655A - A kind of configurable manipulator wafer centring means - Google Patents
A kind of configurable manipulator wafer centring means Download PDFInfo
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- CN106737655A CN106737655A CN201510811888.1A CN201510811888A CN106737655A CN 106737655 A CN106737655 A CN 106737655A CN 201510811888 A CN201510811888 A CN 201510811888A CN 106737655 A CN106737655 A CN 106737655A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B25—HAND TOOLS; PORTABLE POWER-DRIVEN TOOLS; MANIPULATORS
- B25J—MANIPULATORS; CHAMBERS PROVIDED WITH MANIPULATION DEVICES
- B25J9/00—Programme-controlled manipulators
- B25J9/16—Programme controls
- B25J9/1602—Programme controls characterised by the control system, structure, architecture
- B25J9/161—Hardware, e.g. neural networks, fuzzy logic, interfaces, processor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The invention provides a kind of configurable manipulator wafer centring means, embedded CPU module is connected with FPGA module, and embedded CPU module reads the configuration information of AWC stations and IO interlockings from FPGA module；Input Acquisition Circuit is connected with FPGA module at a high speed, and the input signal in collection AWC sensor signals and IO interlock functions is simultaneously sent to FPGA module；IO output circuits are connected with FPGA module, receive FPGA module control signal output IO interlocking signals；User's I/O interface is input into Acquisition Circuit with the high speed and IO output circuits are connected, and realizes AWC functions and IO interlock functions.Configurable manipulator wafer centring means of the invention, will all access the present apparatus for the high-rate input signals of AWC functions with IO interlocking signals, omit IO capture cards；By the importation Acquisition Circuit in IO interlocking signals all by the circuit realiration as AWC high speed input circuits, and the Acquisition Circuit of the two is all accessed into FPGA, indefinite differentiation AWC circuits and IO input circuits, give tacit consent to all high speed input circuits.
Description
【Technical field】
The present invention relates to semiconductor processing equipment technical field, more particularly to a kind of configurable manipulator wafer
Centring means.
【Background technology】
In semicon industry, the transmission of wafer is completed between each chamber or between station usually using manipulator.
In wafer transmission system, to avoid taking the generation of the objective factor such as off normal or wafer breakage during piece, improve brilliant
The degree of accuracy that circle is picked and placeed is, it is necessary to design and use AWC (Active Wafer Centering) functions to be examined
Survey and correction.AWC function wafer self-centering functions, for practical center during robotic transfer wafer
With the off normal situation at teaching center, corrected automatically in the motion process of manipulator, it is ensured that wafer is by just
Often it is transported to specified location.
AWC functions include two sensors using one group, are positioned over the station direction for needing detection, such as move
Radial alignment and crystal round fringes between, and ensure two sensor lines and station vertical, the machine of radial direction as far as possible
Tool hand, when sensor has detected wafer to come in and go out, can be watched in collection at once during GOTO instructions are performed
Take shaft position data and preserve, in calculating the wafer center of circle and manipulator finger according to 4 secondary datas for collecting
The deviation of the heart.While manipulator stretches in place, R axles and T axles can be compensated to the bias vector automatically
Treatment, realizes automatic deviation correction, until GOTO order fulfillments after deviation elimination, it is ensured that wafer is accurately transmitted
To aiming station.
At present, the manipulator applied in semicon industry be all by motion control card or servo-driver in itself
The high speed having is input into Acquisition Circuit to complete the high speed acquisition function of AWC sensor signals.The function needs
Using motion control card or the high-rate input signals Acquisition Circuit of servo-driver, when sensor sweeps to wafer
The positional value of current robot axis servomotor is latched during edge by high speed input circuit.Manipulator reaches work
Position and complete wafer centering operation after, also need with semiconductor manufacturing equipment carry out IO (Input/Output, it is defeated
Enter/export) interlocked operation, to ensure to transmit security wafer.
Due to the complicated variety of production process of semiconductor, different semiconductor manufacturers are to manipulator AWC functions
And the demand of IO interlock functions is different, even same semiconductor manufacturers are for device upgrade or carry
Demand from the aspect of high yield etc. to AWC functions and IO interlock functions is likely to that change can be produced.This will
Ask manipulator AWC functional interfaces and the mutual lock interfaces of IO should have height flexible configurability.
Semiconductor manufacturers are even more more to 8 stations from 1 station to the station number demand that AWC functions are supported.
And AWC needs 2 road high-rate input signals using each station, to meet the demand of whole semiconductor manufacturers,
The AWC signal acquisition circuits of manipulator will at least meet 8 station demands, i.e. 16 tunnels are input at a high speed Acquisition Circuit.
Therefore to meet application demand, current the best way is separately to locate AWC Acquisition Circuits and IO interlock circuits
Reason.Design one and at least meet 8 station AWC applications, the special of Acquisition Circuit is input at a high speed with 16 tunnels
Wafer centering control device, AWC signals are linked into FPGA, are configured AWC by configuring FPGA and are adopted
Enable and the interrelated logic operation of collector, and the IO of manipulator is realized additionally by conventional IO capture cards
Interlock function.
In actual applications, most semiconductor life manufacturer takes less than 8 station AWC functions, and this will make
Into the waste of robot hardware resource, and increase the cost of manipulator.When production technology changes,
If AWC functions and IO interlock functions need adjustment, it is necessary to change between manipulator and semiconductor manufacturing equipment
Interconnection cable, and need substantial amounts of time to debug change in design, cause the wave in manpower and materials
Take.
【The content of the invention】
Based on this, it is an object of the invention to provide a kind of configurable manipulator wafer centring means.
It is in order to realize the purpose of the present invention, there is provided a kind of configurable manipulator wafer centring means including embedding
Enter formula CPU module, FPGA module, at a high speed IO output circuits, input Acquisition Circuit, user's I/O interface；
The embedded CPU module is connected with the FPGA module, and the embedded CPU module is from the FPGA
Module reads the configuration information of AWC stations and IO interlockings；The high speed is input into Acquisition Circuit and the FPGA
Module is connected, and the input signal in collection AWC sensor signals and IO interlock functions is simultaneously sent to the FPGA
Module；The IO output circuits are connected with the FPGA module, receive the FPGA module control signal defeated
Go out IO interlocking signals；User's I/O interface is input into Acquisition Circuit with the high speed and IO output circuits are connected,
AWC functions and IO interlock functions are realized for being connected with external equipment.
Preferably, described device also includes EEPROM module, the EEPROM module and the embedded type CPU
Module is connected, and the EEPROM module is used for the configuration information for storing AWC stations and IO interlockings.
Preferably, the EEPROM module is connected by universal serial bus with the embedded CPU module.
Preferably, described device also includes driver interface circuit, the driver interface circuit and the FPGA
Module is connected, and the driver interface circuit is used to connect peripheral driver.
Preferably, the driver interface circuit receives the code device signal of peripheral driver and sends described
The position command of FPGA module, speed command or torque instruction are to peripheral driver.
Preferably, described device also includes bus communication circuit, and the bus communication circuit is embedded with described
CPU module is connected, and the bus communication circuit is used to connect outside host computer.
Preferably, the bus communication circuit receive outside host computer AWC stations and IO interlockings with confidence
Breath.
Preferably, the external equipment includes AWC sensors and process equipment.
Preferably, the embedded CPU module is connected by address date line with the FPGA module.
It is different from prior art, above-mentioned configurable manipulator wafer centring means, by for AWC functions
High-rate input signals all access the present apparatus with IO interlocking signals, omit IO capture cards；By IO interlocking signals
In importation Acquisition Circuit all by the circuit realiration as AWC high speed input circuits, and by two
The Acquisition Circuit of person all accesses FPGA, indefinite differentiation AWC circuits and IO input circuits, gives tacit consent to all
High speed input circuit.
【Brief description of the drawings】
Fig. 1 is the structural representation of manipulator wafer centring means configurable in one embodiment of the invention.
Description of reference numerals：
1st, embedded CPU module；
2nd, FPGA module；
3rd, bus communication circuit；
4th, EEPROM module；
5th, driver interface circuit；
6th, IO output circuits；
7th, Acquisition Circuit is input at a high speed；
8th, user's I/O interface；
9th, host computer；
10th, AWC sensors；
11st, process equipment.
【Specific embodiment】
To describe technology contents of the invention, structural feature, the objects and the effects in detail, below in conjunction with
Implementation method simultaneously coordinates accompanying drawing to be explained in detail.It should be appreciated that specific embodiment described herein is only used to solve
The present invention is released, is not used to limit the present invention.
The present invention provides a kind of configurable manipulator wafer centring means, including embedded CPU module, FPGA
Module, at a high speed IO output circuits, input Acquisition Circuit and user's I/O interface.
The embedded CPU module is connected with the FPGA module, and the embedded CPU module is from the FPGA
Module reads the configuration information of AWC stations and IO interlockings.
The high speed input Acquisition Circuit is connected with the FPGA module, gathers AWC sensor signals and IO
Input signal in interlock function is simultaneously sent to the FPGA module；The IO output circuits and the FPGA
Module is connected, and receives the FPGA module control signal output IO interlocking signals；User's I/O interface with
The high speed input Acquisition Circuit and the connection of IO output circuits, AWC functions are realized for being connected with external equipment
With IO interlock functions.
Specifically, as shown in figure 1, in an embodiment of the present invention, a kind of configurable manipulator wafer is determined
Center device, including embedded CPU module 1, FPGA module 2, at a high speed IO output circuits 6, input collection electricity
Road 7 and user's I/O interface 8.
The embedded CPU module 1 is core controller, gathers high-rate input signals and latches servo shaft position
Value, and control IO interlock functions are realized.Embedded CPU module 1 is connected with FPGA module 2, embedded
Formula CPU module 1 reads the configuration information of AWC stations and IO interlockings from FPGA module 2.
High speed input Acquisition Circuit 7 is connected with FPGA module 2, gathers the signal of AWC sensors 10 and IO
Input signal in interlock function is simultaneously sent to FPGA module 2.
The IO output circuits 6 are connected with FPGA module 2, receive the control signal of FPGA module 2 output IO
Interlocking signal.
User's I/O interface 8 be the special external I/O interface of manipulator, user's I/O interface 8 respectively with a high speed
Input Acquisition Circuit 7 and IO output circuits 6 are connected, and AWC functions and IO are realized for being connected with external equipment
Interlock function.
Described device also includes EEPROM module 4, and EEPROM module 4 is connected with embedded CPU module 1,
EEPROM module 4 is used for the configuration information for storing AWC stations and IO interlockings.Embedded type CPU after each upper electricity
Module 1 reads the configuration information of AWC stations and IO interlockings from EEPROM module 4, and writes FPGA moulds
Block 2.FPGA module 22 is configured according to above-mentioned configuration information to high speed input Acquisition Circuit 7.
Preferable, EEPROM module 4 is connected by universal serial bus with embedded CPU module 1.
As shown in figure 1, in an alternative embodiment of the invention, a kind of configurable manipulator wafer centring means,
Including embedded CPU module 1, FPGA module 2, at a high speed IO output circuits 6, input Acquisition Circuit 7 and use
Family I/O interface 8.
The embedded CPU module 1 is core controller, gathers high-rate input signals and latches servo shaft position
Value, and control IO interlock functions are realized.Embedded CPU module 1 is connected with FPGA module 2, embedded
Formula CPU module 1 reads the configuration information of AWC stations and IO interlockings from FPGA module 2.Preferable,
The embedded CPU module 1 is connected by address date line with the FPGA module 2.
High speed input Acquisition Circuit 7 is connected with FPGA module 2, gathers the signal of AWC sensors 10 and IO
Input signal in interlock function is simultaneously sent to FPGA module 2.
The IO output circuits 6 are connected with FPGA module 2, receive the control signal of FPGA module 2 output IO
Interlocking signal.
User's I/O interface 8 be the special external I/O interface of manipulator, user's I/O interface 8 respectively with a high speed
Input Acquisition Circuit 7 and IO output circuits 6 are connected, and AWC functions and IO are realized for being connected with external equipment
Interlock function.
Described device also includes driver interface circuit 5, and driver interface circuit 5 is connected with FPGA module 2,
Driver interface circuit 5 is used to connect peripheral driver.
Preferable, driver interface circuit 5 receives the code device signal of peripheral driver and sends the FPGA
The position command of module 2, speed command or torque instruction are to peripheral driver.Will be by inside FPGA module 2
IO configuration registers are configured to the high-rate input signals " line with " of AWC functions into serial interrupt signal, output
To embedded CPU module 1, embedded CPU module 1 is set to latch current servo shaft position value after responding interruption.
As shown in figure 1, in another preferred embodiment of the invention, a kind of configurable manipulator wafer centering
Device, including embedded CPU module 1, FPGA module 2, at a high speed IO output circuits 6, input Acquisition Circuit
7 and user's I/O interface 8, bus communication circuit 3.
The bus communication circuit 3 is connected with embedded CPU module 1, and bus communication circuit 3 is used to connect outer
Portion's host computer 9, the bus that the bus communication circuit 3 is used has an open architecture, such as Canopen or
EhterCAT etc..
Bus communication circuit 3 receives the configuration information of AWC stations and the IO interlocking of outside host computer 9.Specifically
Ground, is communicated by bus communication circuit 3 (controlling bus) and host computer 9 and interlocks AWC stations and IO
Configuration information write-in EEPROM module 4 and read-write FPGA module 2.
The embedded CPU module 1 is core controller, gathers high-rate input signals and latches servo shaft position
Value, and control IO interlock functions are realized.Embedded CPU module 1 is connected with FPGA module 2, embedded
Formula CPU module 1 reads the configuration information of AWC stations and IO interlockings from FPGA module 2.Preferable,
The embedded CPU module 1 is connected by address date line with the FPGA module 2.
High speed input Acquisition Circuit 7 is connected with FPGA module 2, gathers the signal of AWC sensors 10 and IO
Input signal in interlock function is simultaneously sent to FPGA module 2.
The IO output circuits 6 are connected with FPGA module 2, receive the control signal of FPGA module 2 output IO
Interlocking signal.
User's I/O interface 8 be the special external I/O interface of manipulator, user's I/O interface 8 respectively with a high speed
Input Acquisition Circuit 7 and IO output circuits 6 are connected, and AWC functions and IO are realized for being connected with external equipment
Interlock function.
Embedded CPU module 1 first reads the configuration information stored in EEPROM module 4 after each system electrification,
IO configuration registers in FPGA module 2 are configured.Embedded CPU module 1 is also total by communication
Line reads the configuration file that host computer 9 is issued, and configuration file is write into EEPROM module 4.
Preferable, the external equipment includes AWC sensors 10 and process equipment 11, wherein, AWC is passed
Sensor 10AWC function detection sensors；Process equipment 11 is semiconductor production equipment, is passed through with manipulator
IO interlockings ensure wafer transmission safety.
The configurable manipulator wafer centring means of the embodiment of the present invention, will be defeated for the high speed of AWC functions
Enter signal and all access the present apparatus with IO interlocking signals, omit IO capture cards.Will be defeated in IO interlocking signals
Enter part Acquisition Circuit all by the circuit realiration as AWC high speed input circuits, and adopting the two
Collector all accesses FPGA, indefinite differentiation AWC circuits and IO input circuits, gives tacit consent to all high speeds defeated
Enter circuit.
User generates configuration file by the AWC stations application message and IO interlock informations that host computer will need,
And the present apparatus is handed down to by communication bus.Embedded CPU module in the present apparatus reads configuration file and deposits
Storage is in the nonvolatile memory.After system electrification, the present apparatus can automatically carry out initialization operation, at this
Configuration file reads during embedded CPU module can will be stored in nonvolatile memory in operating process, and root
The management input inside FPGA and the register of output signal are configured according to configuration file, with postponing deposit
All high-rate input signals flexibly can be configured to AWC functions or IO interlock functions by device.
When needing the situation of change AWC functions or IO interlock functions if any technique upgrading or device upgrade etc., only
AWC and IO interlock functions need to be completed again through host computer generation configuration file and by being handed down to the present apparatus
It is reconfigured at, greatly uses manpower and material resources sparingly.I/O interface function of the manipulator to user is unified, comprising AWC
Function and IO interlock functions, versatility are stronger, and make the hardware production maintenance cost of the manipulator part significantly
Reduce.
It should be noted that in the present invention, such as first and second or the like relational terms are used merely to
One entity or operation are made a distinction with another entity or operation, and is not necessarily required or is implied this
There is any this actual relation or order between a little entities or operation.And, term " including ", " bag
Containing " or any other variant thereof is intended to cover non-exclusive inclusion, so that including a series of key elements
Process, method, article or terminal device not only include those key elements, but also including not arranging clearly
Other key elements for going out, or also include intrinsic for this process, method, article or terminal device
Key element.In the absence of more restrictions, limited by sentence " including ... " or " including ... "
Key element, it is not excluded that also exist in the process including above-mentioned key element, method, article or terminal device another
Outer key element.Additionally, herein, " being more than ", " being less than ", " exceeding " etc. are interpreted as not including this number；
" more than ", " below ", " within " etc. be interpreted as including this number.
Although being described to the various embodiments described above, those skilled in the art once know
Basic creative concept, then can make other change and modification to these embodiments, so the above is above-mentioned only
It is the embodiment of type of the present invention, not thereby limits scope of patent protection of the invention, it is every using the present invention
Equivalent structure or equivalent flow conversion that specification and accompanying drawing content are made, or directly or indirectly it is used in other
Related technical field, is similarly included within scope of patent protection of the invention.
Claims (9)
1. a kind of configurable manipulator wafer centring means, it is characterised in that including embedded CPU module,
FPGA module, at a high speed IO output circuits, input Acquisition Circuit, user's I/O interface；The embedded type CPU
Module is connected with the FPGA module, and the embedded CPU module reads AWC works from the FPGA module
Position and the configuration information of IO interlockings；The high speed input Acquisition Circuit is connected with the FPGA module, gathers
Input signal in AWC sensor signals and IO interlock functions is simultaneously sent to the FPGA module；The IO
Output circuit is connected with the FPGA module, receives the FPGA module control signal output IO interlocking signals；
User's I/O interface is input into Acquisition Circuit with the high speed and IO output circuits are connected, for being set with outside
AWC functions and IO interlock functions are realized in standby connection.
2. configurable manipulator wafer centring means according to claim 1, it is characterised in that institute
Stating device also includes EEPROM module, and the EEPROM module is connected with the embedded CPU module, institute
EEPROM module is stated for storing the configuration information of AWC stations and IO interlockings.
3. configurable manipulator wafer centring means according to claim 2, it is characterised in that institute
EEPROM module is stated to be connected with the embedded CPU module by universal serial bus.
4. configurable manipulator wafer centring means according to claim 1, it is characterised in that institute
Stating device also includes driver interface circuit, and the driver interface circuit is connected with the FPGA module, institute
Driver interface circuit is stated for connecting peripheral driver.
5. configurable manipulator wafer centring means according to claim 4, it is characterised in that institute
The position for stating code device signal and the transmission FPGA module that driver interface circuit receives peripheral driver refers to
Make, speed command or torque instruction to peripheral driver.
6. configurable manipulator wafer centring means according to claim 1, it is characterised in that institute
Stating device also includes bus communication circuit, and the bus communication circuit is connected with the embedded CPU module,
The bus communication circuit is used to connect outside host computer.
7. configurable manipulator wafer centring means according to claim 6, it is characterised in that institute
State bus communication circuit and receive the AWC stations of outside host computer and the configuration information of IO interlockings.
8. configurable manipulator wafer centring means according to claim 1, it is characterised in that institute
Stating external equipment includes AWC sensors and process equipment.
9. configurable manipulator wafer centring means according to claim 1, it is characterised in that institute
Embedded CPU module is stated to be connected with the FPGA module by address date line.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510811888.1A CN106737655A (en) | 2015-11-20 | 2015-11-20 | A kind of configurable manipulator wafer centring means |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510811888.1A CN106737655A (en) | 2015-11-20 | 2015-11-20 | A kind of configurable manipulator wafer centring means |
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| CN201510811888.1A Pending CN106737655A (en) | 2015-11-20 | 2015-11-20 | A kind of configurable manipulator wafer centring means |
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| CN103930984A (en) * | 2011-11-23 | 2014-07-16 | 日本电产三协株式会社 | Work transfer system |
| CN104626151A (en) * | 2013-11-13 | 2015-05-20 | 沈阳新松机器人自动化股份有限公司 | Mechanical arm wafer centering device and method |
| US20150179488A1 (en) * | 2013-12-23 | 2015-06-25 | Lam Research Corporation | Robot with integrated aligner |
-
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- 2015-11-20 CN CN201510811888.1A patent/CN106737655A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1464824A (en) * | 2001-06-25 | 2003-12-31 | 林武秀 | System for conveying and transferring semiconductor or liquid crystal wafer one by one |
| WO2009032204A1 (en) * | 2007-08-30 | 2009-03-12 | Applied Materials, Inc. | Method and apparatus for robot calibrations with a calibrating device |
| CN103930984A (en) * | 2011-11-23 | 2014-07-16 | 日本电产三协株式会社 | Work transfer system |
| CN103594406A (en) * | 2013-11-05 | 2014-02-19 | 中国电子科技集团公司第四十五研究所 | Self-centering positioning chuck and centering positioning method of semiconductor wafer |
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