CN106657966B - A kind of integration imaging 3D film source rapid generations based on CPU multithreadings - Google Patents

Abstract

The present invention proposes a method for rapidly generating integrated imaging 3D film sources based on CPU multithreading. The method includes three processes: acquisition of parallax image resources, multithreaded reading of parallax image resources, and rapid synthesis of micro-image arrays. This method adopts the multi-thread technology based on the guiding heuristic self-scheduling method, makes full use of the advantages of computer multi-core, and realizes the efficient reading of parallax images and the rapid synthesis of micro-image arrays. It is a fast and efficient method. Integrated imaging 3D film source generation method.

Description

A fast generation method of integrated imaging 3D film source based on CPU multithreading

technical field

The invention relates to integrated imaging 3D (three-dimensional) display technology and computer multi-core multi-thread technology, more specifically, the invention relates to a method for rapidly generating integrated imaging 3D film sources based on CPU (central processing unit) multi-thread.

Background technique

Integrated imaging 3D display technology is a naked-eye 3D display technology that does not require auxiliary equipment such as glasses or tracking devices. The traditional pure optical integrated imaging 3D display film source is difficult to shoot, and the imaging quality is not high. With the rapid development of computer technology, computer integrated imaging technology has been derived. Computer integrated imaging technology uses 3D modeling software to establish a 3D scene model, and builds a corresponding virtual target camera array to render a parallax image, and then synthesizes it through a micro-image array to finally generate an integrated imaging 3D film source.

CPU multithreading refers to the technology of parallel execution of multiple threads based on CPU software or hardware. More specifically, it refers to the technology of CPU using multiple microprocessor cores to execute different tasks in parallel. Therefore, multiple threads can be used to take advantage of the multi-core CPU to realize parallel reading of parallax images and rapid synthesis of micro-image arrays, thereby efficiently and quickly generating integrated imaging 3D film sources.

Contents of the invention

The present invention proposes a method for rapidly generating integrated imaging 3D film sources based on CPU multi-threading. The method includes three processes: acquisition of parallax video, multi-thread reading of parallax image and rapid synthesis of micro-image array. The detailed process of the present invention is as shown in accompanying drawing 1.

The parallax video acquisition process of the present invention uses 3D modeling software to acquire video containing parallax information. First, use 3D modeling software to generate a virtual 3D scene, and establish a virtual target camera array containing R × R cameras as shown in Figure 2, where the number of columns and rows of cameras in the horizontal and vertical directions is R . The number of cameras included in the virtual target camera array is the same as the number of pixels in the image element in the micro-image array, and the distance between adjacent cameras is D. All cameras have a common convergence point O , and the plane where the convergence point O is located is the central depth plane. The central depth plane is parallel to the virtual target camera array plane at a distance L. Secondly, the multi-orthogonal projection synthesis method is used in the shooting process, and the parallax image with a single frame resolution of M × N is obtained as a rendering output. Finally, a parallax video with vertical and horizontal two-dimensional parallax is output as a source file for multi-threaded reading of the parallax image.

The multi-threaded reading process of the parallax image of the present invention is based on computer multi-thread technology, using different microprocessor cores in the CPU to access the parallax video in parallel, read and obtain the parallax image of the current frame, the process is as shown in the accompanying drawing 3. First, set the number of parallax videos to be accessed as Q , number the parallax videos as 0~ Q -1, and set the number of threads as the number of cores of the computer to be G. Different microprocessor cores 1~ G execute different threads 1~ G respectively, and each thread executes the iterative blocks D ₁ , D ₂ ... D _G allocated by the computer, and assigns the subsequent iterative blocks D _G+ in the order of execution ₁ , D _{G + 2} ... D _{G + G} ... D _w . The size of the iteration block, that is, the number of times each thread executes a single task, is determined by the guiding heuristic self-scheduling method, and the minimum number of iterations is declared as T. The size of each iteration block is calculated by the following formula:

(1)

Among them, C _w represents the number of remaining unread tasks, and D _w is the size of the wth block. When D _w < T , take D _w as T until all read tasks are completed, that is, D ₁ + D ₂ +...+ D _w = Q . Among them, G threads run in parallel, and a first-come-first-served task allocation method is adopted between threads, that is, each thread will be allocated a larger iteration block at the beginning, and then the size of the allocated iteration block will gradually decrease. The access operation is implemented sequentially for all parallax videos, and the parallax images of the current frame are read and obtained until all the parallax images of the current frame of the Q parallax videos are read.

The rapid composition process of the micro-image array of the present invention is also based on the CPU using computer multi-threading technology to parallelly map the read parallax images through pixel mapping to synthesize the micro-image array. Set the resolution of the generated micro-image array to S × P , and the resolution of a single image element to R × R , including the number of image elements H × K , where the number of columns of image elements in the horizontal direction is H , and the number of image element rows in the vertical direction The number is K. The specific mapping relationship is shown in Figure 4. I ( m , n ) _C represents the pixel corresponding to the mth row and nth column on the disparity map with the serial number C , and I ^' ( i , j ) represents the i -th pixel on the micro-image array. The pixel point corresponding to the jth column position of the row, the pixel mapping relationship is given by the following formula:

(2)

in:

(3)

(4)

(5)

In the formula, C represents the serial number of the parallax image, and 0≤ C ≤ R ² -1, C is a non-negative integer; the mod( x , y ) function represents the remainder of x to y , and the round (*) function represents the rounding of * Integer; m , n , i and j are loop variables, m belongs to the range of 0~ M -1, n belongs to the range of 0~ N -1; i is in the range of 0~ S -1, j is in the range of 0~ P -1 By taking an integer value in the inner loop, each pixel of the micro-image array can be assigned the pixel value of the corresponding position of the corresponding disparity map. The pixel mapping process in the present invention is independent of each other, and the fast synthesis process of the micro-image array is still processed in parallel by the CPU multi-thread technology based on the instructive heuristic self-scheduling method to obtain faster processing speed. Among them, the minimum number of iterations for pixel mapping is declared as J , and the number of threads is still G , so that G threads complete the pixel mapping of each frame of parallax image to the corresponding pixel point of the micro-image array S × P times in parallel until all frames corresponding to the micro-image array are completed The fast synthesis realizes the rapid generation of integrated imaging 3D film sources.

The invention proposes a method for rapidly generating integrated imaging 3D film sources based on CPU multithreading. This method adopts the multi-thread technology based on the guiding heuristic self-scheduling method, fully utilizes the advantages of computer multi-core, realizes the efficient reading of parallax images and the rapid synthesis of micro-image arrays, and is an efficient and fast integrated imaging 3D The source generation method.

Description of drawings

Accompanying drawing 1 is a kind of flow chart of the rapid generation method of integrated imaging 3D film source based on CPU multithreading.

Accompanying drawing 2 is the schematic diagram of parallax video obtained by 3D modeling software in the present invention.

Accompanying drawing 3 is a schematic diagram of reading iterative block tasks based on guiding heuristic self-scheduling multithreading.

Accompanying drawing 4 is the pixel mapping relationship of the parallax image synthesis micro-image array.

The pictorial labels in the above-mentioned accompanying drawings are:

1 central depth plane, 2 virtual target camera array, 3 virtual 3D scene, 4 virtual target camera array convergence point O , 5 reading task blocks, 6 micro image array.

It should be understood that the above drawings are only schematic and not drawn to scale.

Detailed ways

The following describes in detail a typical embodiment of a method for rapidly generating integrated imaging 3D film sources based on CPU multithreading in the present invention, and further specifically describes the present invention. It is necessary to point out that the following examples are only used for further description of the present invention, and cannot be interpreted as limiting the protection scope of the present invention, and those skilled in the art make some non-essential improvements to the present invention according to the above-mentioned content of the present invention And adjustments still belong to the protection scope of the present invention.

The present invention proposes a method for rapidly generating integrated imaging 3D film sources based on CPU multi-threading. The method includes three processes: acquisition of parallax video, multi-thread reading of parallax image and rapid synthesis of micro-image array.

The parallax video acquisition process of the present invention uses 3D modeling software to acquire video containing parallax information. First, use 3D modeling software to generate a virtual 3D scene, and establish a virtual target camera array containing R × R = 8 × 8 cameras as shown in Figure 2, where the number of camera columns and rows included in the horizontal and vertical directions The numbers are all R= 8. The number of cameras included in the virtual target camera array is the same as the number of pixels in the image element in the micro-image array, and the distance between adjacent cameras is D= 4mm. All cameras have a common convergence point O , and the plane where the convergence point O is located is the central depth plane, the central depth plane is parallel to the virtual target camera array plane, and the distance is L= 1030mm. Secondly, the shooting process adopts the multi-orthogonal projection synthesis method, and the rendering output obtains a parallax image with a single frame resolution of M × N = 854 pixels × 480 pixels. Finally, a parallax video with vertical and horizontal two-dimensional parallax is output as a source file for multi-threaded reading of the parallax image.

The multi-threaded reading process of the parallax image of the present invention is based on computer multi-thread technology, using different microprocessor cores in the CPU to access the parallax video in parallel, read and obtain the parallax image of the current frame, the process is as shown in the accompanying drawing 3. First, set the number of parallax videos to be accessed as Q =64, and number the parallax videos as 0~ Q -1=0~63, and set the number of threads as the number of cores of the computer to be G =8. Different microprocessor cores 1~ G =1~8 respectively execute different threads 1~ G =1~8, and each thread executes the iterative blocks D ₁ , D ₂ ... D ₈ allocated by the computer, in the order of execution Allocate the size of subsequent iteration blocks D ₉ , D ₁₀ ... D ₁₆ ... D _w sequentially, that is, the number of tasks executed by each thread at a time is determined by a guiding heuristic self-scheduling method, and the minimum number of iterations is declared as T = 5, The size of each iteration block is calculated by the following formula:

(1)

Among them, C _w represents the number of remaining unread tasks, D _w is the size of the wth block, when D _w <5, set D _w to 5 until all read tasks are completed, that is, D ₁ + D ₂ +...+ D _w =64. Among them, G = 8 threads run in parallel, and the task allocation method is adopted among the threads, that is, each thread will be allocated a larger iteration block at the beginning, and the size of the allocated iteration block will gradually decrease. The access operation is implemented sequentially for all parallax videos, and the parallax images of the current frame are read and obtained until all the parallax images of the current frame of Q =64 parallax videos are read.

The rapid composition process of the micro-image array of the present invention is also based on the CPU using computer multi-threading technology to parallelly map the read parallax images through pixel mapping to synthesize the micro-image array. Set the resolution of the generated micro-image array to S × P = 1920 × 1080, and the resolution of a single image element is R × R = 8 × 8, including the number of image elements H × K = 240 × 135, where the horizontal direction contains image elements The number of columns is H =240, and the number of rows containing image elements in the vertical direction is K =135. The specific mapping relationship is shown in Figure 4. I ( m , n ) _C represents the pixel corresponding to the mth row and nth column on the disparity map with the serial number C , and I ^' ( i , j ) represents the i -th pixel on the micro-image array. The pixel point corresponding to the jth column position of the row, the pixel mapping relationship is given by the following formula:

(2)

in:

(3)

(4)

(5)

In the formula, C represents the serial number of the parallax image, and 0≤ C ≤ R ² -1, C is a non-negative integer; the mod( x , y ) function represents the remainder of x to y , and the round (*) function represents the rounding of * Take an integer; m , n , i and j are loop variables, m belongs to the range of 0~ M -1=0~853, n belongs to the range of 0~ N -1=0~479; i is in the range of 0~ S -1=0~ In the range of 1919, if j takes an integer value cyclically within the range of 0~ P -1=0~1079, each pixel of the micro-image array can be assigned the pixel value of the corresponding position of the corresponding disparity map. The pixel mapping process in the present invention is independent of each other, and the fast synthesis process of the micro-image array is still processed in parallel by the CPU multi-thread technology based on the instructive heuristic self-scheduling method to obtain faster processing speed. Among them, the minimum number of iterations for pixel mapping is declared as J = 15, and the number of threads is still G = 8, so that G = 8 threads can complete the pixel mapping of each frame of parallax image to the corresponding pixel point of the micro-image array in parallel S × P = 1920 × 1080 times, until the rapid synthesis of micro-image arrays corresponding to all frames is completed, the rapid generation of integrated imaging 3D film sources is realized.

So far, the time consumed to generate an integrated imaging micro-image array using a CPU multi-threaded integrated imaging micro-image array rapid generation method proposed by the present invention is 0.28s, and the frame rate is 3.57fps, which is different from the single-threaded implementation Compared with this method, the method has been improved by 75%, which has significantly improved the rate at which the CPU generates integrated imaging 3D film sources.

Claims (1)

1. A method for quickly generating integrated imaging 3D film sources based on CPU multithreading, the method comprises three processes of acquisition of parallax video, multi-thread reading of parallax image and rapid synthesis of micro-image array: the acquisition of parallax video The process is to use three-dimensional modeling software to obtain parallax video containing parallax information; the multi-threaded reading process of the parallax image is based on computer multi-thread technology, using different microprocessor cores in the CPU to access the parallax video in parallel, read And obtain the parallax image of the current frame; the rapid synthesis process of the micro-image array is also based on the CPU and utilizes computer multi-threading technology to parallelly read the parallax image through pixel mapping to synthesize the micro-image array, I(m,n) _C represents the pixel point corresponding to the mth row and nth column on the disparity map whose serial number is C, and I'(i, j) represents the pixel point corresponding to the ith row and jth column position on the micro-image array, and the pixel relationship is I'( i,j)=I(m,n) _C , where the resolution of the parallax image is M×N, the resolution of the micro-image array is S×P, the resolution of a single image element is R×R, and the number of image elements is H×K, C=R×(R-1-mod(i,R))+(R-1-mod(j,R)) represents the serial number of the parallax image, and 0≤C≤R ² -1, m, n, i and j are loop variables, m belongs to the range of 0~M-1, n belongs to the range of 0~N-1, i is in the range of 0~S-1, j is cyclically taken in the range of 0~P-1 integer value, The rapid synthesis process of the micro-image array still uses CPU multi-threading technology to process in parallel to obtain faster processing speed until the rapid synthesis of all frames corresponding to the micro-image array is completed, realizing the rapid generation of integrated imaging 3D film sources.