CN106653748B - How to use the corner of the integrated circuit - Google Patents

Abstract

The invention discloses a kind of application methods in integrated circuit corner, it is the following steps are included: the quantity in corner is four, corner place power supply and ground loop wire, two each other the power supply of vertical direction, and input/output port corresponding to power and ground using meet channel design rule metal connecting line linking；The N-Well and N-tap for preventing latch-up are placed in the underface of the metal wire region of power supply line and the nonmetal wire area of a ground wire, stamps enough ohmic contact holes, and be connected to the power and ground of metal by metal and via hole；The test domain for meeting minimum rule is drawn according to wafer foundry's territory map layer design rule, and the domain that these figure layers to be tested are drawn is placed on to the corner of integrated circuit；Place the label of the integrated circuit information or the label for positioning when integrated antenna package.The present invention can promote the availability of integrated circuit silicon chip area.

Description

How to use the corner of the integrated circuit

technical field

The invention relates to a method for using, in particular to a method for using corners of integrated circuits.

Background technique

Usually integrated circuits are designed as a square, and a few are designed as a rectangle.

Regardless of whether the die (Die) of an integrated circuit is designed as a square or a rectangle, there are four corners (Corner), and the one marked as Core is the core area. Now the use of integrated circuit corners can be summarized as follows:

One, vacant, that is, nothing is left;

2. Select a corner to place the marking information (LOGO) of the chip;

Three, guard ring (Guardring);

4. Any two of the above three items are used at the same time;

5. Articles 1, 2, and 3 mentioned above apply simultaneously.

It is easy to find that even if the corner of the integrated circuit is utilized according to the fifth item above, there is a waste of silicon wafers.

Especially for the situation that there are many power supply, ground and input and output ports of the integrated circuit: for the convenience of description, the area corresponding to "power supply, ground and input and output ports" in the layout of the integrated circuit is hereinafter referred to as IO-RING.

In the existing technology, there will be a "core area" (Core) and peripheral "IO-RING" for placing power, ground and input and output ports, and four corners (Corner); if there are more power, ground and input and output Arranging these circuits (power supply, ground and input and output) around the periphery of the integrated circuit caused by the port is particularly tense. At this time, the IO-RING circuit that achieves the same function (anti-static, preventing latch-up effect) is usually compressed horizontally and pulled vertically. Stretch, and finally become "thin and tall" type; in this way, the area of the corner of the "thin and tall" type IO-RING integrated circuit is larger than the corner formed by the "short and fat" type IO-RING on both sides area.

When there are such "thin and tall" IO-RINGs on both sides, the "thin and tall" IO-RINGs on both sides will form a larger integrated circuit corner (Corner), and the silicon chip area occupied by this corner will inevitably be It is a pity that the silicon chip area corresponding to the corner of such a relatively large-area integrated circuit is wasted.

Contents of the invention

The technical problem to be solved by the present invention is to provide a method for using the corner of the integrated circuit, which can increase the effective utilization rate of the area of the silicon chip of the integrated circuit.

The present invention solves the above-mentioned technical problems through the following technical solutions: a method for using an integrated circuit corner, which is characterized in that it includes the following steps:

Step 1. The number of corners is four, and the circuits placed in the four corners cannot be exactly the same. The power and ground loops are placed in the corners, and the power lines and power lines corresponding to the two perpendicular power, ground, and input and output ports are placed in the corners. The ground wire is connected with a metal connection wire that conforms to the design rules of the trench;

Step 2, place N-We11 and N-tap to prevent latch-up effect directly under the metal line area of the power line in step 1, make enough ohmic contact holes, and connect to the metal power supply through metal and via holes Wire;

Step 3, place P-We11 and P-tap to prevent latch-up effect directly under the metal line area of a ground line, make enough ohmic contact holes, and connect to the metal ground line through metal and via holes ;

Step 4, modify the previous steps 1 to 3 under the condition of complying with the design rules of the foundry to prevent latch-up effects;

Step 5, draw a test layout conforming to the minimum rules according to the layout layer design rules of the wafer foundry, and place the layout drawn by these layers to be tested at the corner of the integrated circuit;

Step 6, placing a mark for the information of the integrated circuit or a mark for positioning when the integrated circuit is packaged;

Step 7: Test a certain process parameter of the wafer foundry, design a specific circuit and connect the metal pad (PAD), place this module in the corner of the integrated circuit, and wait for the tape-out to come back for testing.

The positive and progressive effects of the present invention are: the present invention can increase the effective utilization rate of the integrated circuit silicon chip area, has a simple structure, and reduces costs.

Description of drawings

FIG. 1 is a schematic diagram of the structure of an integrated circuit formed by using the corner of an integrated circuit according to the present invention.

Detailed ways

The preferred embodiments of the present invention are given below in conjunction with the accompanying drawings to describe the technical solution of the present invention in detail.

The use method of integrated circuit corner of the present invention comprises the following steps:

Step 1. The number of corners is four. The circuits placed in the four corners cannot be exactly the same. The power and ground loops are placed in the corners. The power and ground wires are connected by metal wires conforming to the design rules of trenching;

Step 2, place N-We11 and N-tap to prevent latch-up effect directly under the metal line area of the power line in step 1, make enough ohmic contact holes, and connect to the metal power supply through metal and via holes Wire;

Step 3, place P-We11 and P-tap to prevent latch-up effect directly under the metal line area of a ground line, make enough ohmic contact holes, and connect to the metal ground line through metal and via holes ;

Step 4. Modify the previous steps 1 to 3 under the condition of complying with the design rules of the wafer foundry to prevent the latch-up effect (Latch-Up), so that the modified corner can place the following circuit:

(1) Power start circuit [Power On Reset];

(2) Crystal oscillation circuit (Crysta1);

(3) Band-gap reference circuit (Band-gap);

(4) Operational Amplifier circuit (Operational Amplifier);

(5) Transistors, resistors, capacitors and other circuit components with special needs;

(6) Test circuits or circuit components such as transistors, resistors, and capacitors;

(7) The metal pad (PAD) connected to the circuit to be tested.

The circuits or components listed in this item are not required to be placed by this method, but are determined by modifying and adjusting the layout according to the size of the usable area of the corner to comprehensively consider the feasibility of placing them; if some components are more sensitive , the requirements for the surrounding environment are relatively strict, and placing the corner may affect the performance of the circuit itself, so this kind of circuit should not be placed in the corner;

Step 5: Draw a test layout that meets the minimum rules (mainly testing the thinnest line width and narrowest interval of a single layer) according to the layout layer design rules of the wafer foundry, and place the layout drawn by these layers to be tested on the corners of integrated circuits;

Step 6, placing the mark (LOGO) of the integrated circuit information or the mark used for positioning when the integrated circuit is packaged;

Step 7: Test a certain process parameter of the wafer foundry, design a specific circuit (in order to detect the process parameter of the factory) and connect the metal pad (PAD), place this module on the corner of the integrated circuit, and wait Tape out and test.

In order to avoid that there is no identification mark when the chip is packaged, when using the four corners (Corner), the circuits placed in the four corners (Corner) cannot be exactly the same.

The structure formed by the use method of the integrated circuit corner of the present invention is shown in Figure 1, wherein LOGO represents a mark, Module represents a module, VSS-Ring represents a VSS ring, and VDD-Ring represents a VDD ring. Place transistors, resistors, capacitors and other circuit design, anti-static, anti-latch or test components in the corner; or move small module units that implement specific functions from the Core area and place them in the corner (Corner) area of the integrated circuit ; Design a specific circuit to test the circuit of a certain process parameter in the foundry, and place it in the corner (Corner) area of the integrated circuit for tape-out testing. Design the layout of the layer to be tested and place it in the corner area of the integrated circuit so that the corresponding layer can be viewed, tested, and evaluated under a microscope after tape-out.

The specific embodiments described above have further described the technical problems, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit In the present invention, any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (1)

1. a kind of using method of integrated circuit corner, it is characterized in that, it comprises the following steps: Step 1. The number of corners is four, and the circuits placed in the four corners cannot be exactly the same. The power and ground loops are placed in the corners, and the power lines and power lines corresponding to the two perpendicular power, ground, and input and output ports are placed in the corners. The ground wire is connected with a metal connection wire that conforms to the design rules of the trench; Step 2, place N-Well and N-tap to prevent latch-up effect directly under the metal line area of the power line in step 1, make enough ohmic contact holes, and connect to the metal power supply through metal and via holes Wire; Step 3, place P-Well and P-tap to prevent latch-up effect directly under the metal line area of a ground line, make enough ohmic contact holes, and connect to the metal ground line through metal and via holes ; Step 4, modify the previous steps 1 to 3 under the condition of complying with the design rules of the foundry to prevent latch-up effects; Step 5, draw a test layout conforming to the minimum rules according to the layout layer design rules of the wafer foundry, and place the layout drawn by these layers to be tested at the corner of the integrated circuit; Step 6, placing a mark for the information of the integrated circuit or a mark for positioning when the integrated circuit is packaged; Step 7: Test a certain process parameter of the wafer foundry, design a specific circuit and connect the metal pad (PAD), place this module in the corner of the integrated circuit, and wait for the tape-out to come back for testing.