CN106611776A - N-type silicon carbide Schottky diode structure - Google Patents

Abstract

The invention relates to an N-type silicon carbide Schottky diode structure, which includes the following features: there is no P-type doped region in the body of the N-type silicon carbide Schottky diode device, and there is at least one groove, and the depth of the groove is Between 0.5um and 6.0um, the width is between 0.4um and 4.0um, there is a dielectric layer on the inner wall (side and bottom) of the groove, the thickness is 0.01um to 1um, and the middle of the groove is filled with conductive material. This trench structure is used to expand the depletion layer of the device when it is reverse biased, so as to avoid local premature breakdown of the device caused by excessive concentration of the electric field.

Description

An N-type silicon carbide Schottky diode structure

technical field

The invention relates to a structure of an N-type silicon carbide semiconductor device, and more specifically relates to a new structure of an N-type silicon carbide Schottky diode.

Background technique

Most traditional integrated circuits using silicon devices can only work below 250°C, which cannot meet the requirements of high temperature, high power and high frequency. Among them, the new semiconductor material silicon carbide (SiC) has attracted the most attention and research.

Silicon carbide semiconductor materials have outstanding advantages such as wide band gap, high saturation drift velocity, high thermal conductivity, and high critical breakdown electric field, and are especially suitable for the production of high-power, high-voltage, high-temperature, and radiation-resistant electronic devices.

Silicon carbide has a wide band gap ( _210eV≤E g≤710eV), and its leakage current is several orders of magnitude smaller than that of silicon. Moreover, silicon carbide has excellent thermal stability, and its intrinsic temperature can reach more than 800°C, which ensures long-term reliability when working at high temperature. By analyzing the figure of merit, such as the Johnson figure of merit (JFOM-reflecting the high power and high frequency performance of the corresponding device through the breakdown electric field and saturated electron drift velocity of the material), the Keyes figure of merit (KFOM-through the thermal conductivity of the material, saturation Electronic drift speed and dielectric constant reflect the switching speed and thermal limit of the corresponding device) and thermal figure of merit (QFOM-reflect the heat dissipation performance of the corresponding device through the breakdown electric field, breakdown electric field and thermal conductivity of the material), and silicon carbide will be found The merit values of SiC are much higher than the semiconductor materials commonly used today, and it is an ideal material for realizing the combination of high temperature and high frequency and high power.

Silicon carbide has a higher breakdown electric field, eight times that of silicon, which is critical for power devices. The on-resistance is inversely proportional to the cube of the breakdown electric field, so the on-resistance of silicon carbide SiC power devices is only one hundred to two hundredth of that of silicon devices, which significantly reduces the energy consumption of electronic equipment. Therefore, silicon carbide SiC power devices are also known as "green energy" devices that drive the "new energy revolution". Power devices made of silicon carbide SiC have the advantages of low specific on-resistance, high operating frequency and high temperature stability, and have broad application prospects.

With the successive commercialization of 6H and 4H-SiC bulk materials, silicon carbide SiC device processes, such as oxidation, doping, etching, and metal and semiconductor contacts, are becoming more and more mature, which lays the foundation for the development and application of silicon carbide SiC devices. Base.

600V and 1200V N-type silicon carbide Schottky diodes are the earliest commercialized silicon carbide devices. The device structure of a general silicon carbide N-type Schottky diode is shown in Figure 1. The composition of this structure can be mainly divided into active regions With the terminal area, the active area is connected in parallel with the Schottky metal contact and the PN junction, and the terminal area is composed of a field limiting ring. Because the conduction voltage of the SiC PN junction is generally greater than 3V and the conduction voltage of the Schottky metal contact is about 1V, when the forward conduction voltage is less than 3V, the conduction current is mainly the electron current flowing through the anode of the substrate The Schottky barrier goes into the surface cathode electrode, so it is a single carrier device. When the device is reverse biased, electrons try to cross the Schottky barrier from the surface and enter the silicon carbide semiconductor. When the general reverse bias is not very large, only a very small part of the electrons in the surface electrode can get Enough energy crosses the potential barrier into the silicon carbide semiconductor to form a part of the reverse leakage current. When the reverse bias is large, the depletion layer of the P-type doped region in the active region will be connected to the Schott of the surface. The base metal contact is shielded, making it more difficult for electrons in the surface electrode to enter the silicon carbide semiconductor, so that when the silicon carbide Schottky diode is reversed, it is non-conductive except for leakage current, so the Schottky diode becomes a unidirectional through devices. To form the device structure in FIG. 1 , it is necessary to form a P-type doped region in the silicon carbide body. Based on the high bond strength of SiC, the temperature required for impurity diffusion (>1800°C) greatly exceeds the conditions of the standard device process, so the doping process in the device manufacturing process cannot use the diffusion process, and can only be controlled by epitaxy. High temperature ion implantation doping.

Epitaxial doping can be controlled by changing the flow rate of silicon carbide source gas to control the doping concentration from light doping (10 ¹⁴ /cm ³ ) to degenerate doping (>10 ¹⁹ /cm ³ ). Silane and propane are typical epitaxial gas sources for silicon carbide SiC. The typical growth rate of 6H-SiC homoepitaxial growth on silicon (Si) surface N-type substrate is 3 μm/h. In the growth reaction chamber, site-competitive epitaxy is performed by adjusting the ratio of gas sources so that the impurities are located at the lattice sites. Growth on carbon (C) facet substrates is different, but its growth mechanism is not well understood.

Because the diffusion process cannot be used for doping, the ion implantation process is very important in device fabrication. Aluminum (Al) and boron (B) are typical P-type doping elements, which produce relatively deep acceptor energy levels (211meV and 300meV, respectively). The ionization energy of Al is smaller than that of B, and the activation temperature required by Al is higher than that of B is low; while B atoms are lighter than Al atoms, the damage caused by implantation is less, and the implantation range is deeper. The implantation elements should be selected according to the device process requirements.

However, when the ion implantation into silicon carbide is too large, it will cause damage to the crystal lattice and form an amorphous structure, greatly reducing the original performance of silicon carbide. In order to reduce the lattice damage and amorphization structure caused by implanting ions, it is necessary to add high temperature to the substrate when implanting ions. Generally, about 650 ° C is required for N implantation, and about 700-800 ° C is required for Al implantation. ℃. After the implantation, high-temperature annealing heat treatment (>1300°C) is required to activate the implanted ions and restore the crystal lattice damage caused by the implanted ions. Due to the high bond strength of SiC, lattice vacancies need to be generated at high temperatures to allow dopant ions to fill in and activate. It is reported in the literature that the annealing temperature is 1300°C and the activation rate is less than 10%; when the temperature is greater than 1600°C, the activation rate exceeds 95%.

When the temperature is higher than 1300°C, the Si in SiC will evaporate, and the surface of the device wafer will also be roughened, reducing the performance of the device. The existing process is to deposit a silicon carbide (SiC) or graphite (C) layer on the top surface of the wafer as a protection, and then perform annealing heat treatment. After annealing, the graphite layer should be removed to form a P-type doped region. The steps are also very cost-increasing steps. If the N-type SiC Schottky diode structure does not require the P-type doped region, the manufacturing cost can be greatly reduced.

Contents of the invention

The object of the present invention is to propose a practical and feasible active region structure and terminal region structure related to N-type silicon carbide Schottky diodes which can avoid the above-mentioned disadvantages. When the invention is used to make the N-type Schottky diode, it is not necessary to inject the P-type doped region, nor to grow the P-type epitaxial layer on the N-type epitaxial layer, which can greatly reduce the manufacturing cost of the device. In general, the active region or terminal region of a Schottky diode uses a P-type doped region to expand the depletion layer during reverse bias, so as to avoid excessive concentration of the depletion layer, that is, to avoid excessive concentration of the electric field and cause local premature aging of the device. breakdown. The core idea of the present invention is not to expand the depletion layer of the device in reverse bias without the P-type doped region, but to use a trench structure. The depth of the trench is between 0.5um and 6.0um, and the width is 0.5um. Between um and 4.0um, there is a layer of dielectric material such as silicon dioxide or silicon nitride on the inner wall of the trench (side and bottom), with a thickness of 0.01um to 1um, and the thickness of the side and the bottom can be selected independently The characteristics of the trenches in the active region and the trenches in the terminal region can be independently selected, and the middle is filled with conductive substances such as doped or non-doped polysilicon or refractory metals. The reason why this trench structure can expand the epitaxial layer is that when the electric field force lines pass through the trench medium and meet the conductive material in the trench, the electric field force lines cannot pass through the conductive material and detour to the undepleted area next to it. The depletion layer is expanded. In the active region in Figure 1, the trench structure can quickly expand the depletion layer and join together when the device is under voltage reverse bias to shield the Schottky metal contact, so that the reverse Only a small part of the forward voltage falls on the Schottky barrier, which greatly reduces the leakage current in the reverse direction. At the termination region, if there is no termination structure, as shown in FIG. 2 , when reverse biased, the electric field will concentrate on the surface of the edge of the active region to cause early breakdown of the device. If the above-mentioned trench structure is placed at the appropriate position at the terminal, these trench units will make the depletion layer not too concentrated during inversion and will expand, and finally the device will be optimized, that is, the maximum breakdown voltage.

Compared with the prior art, the invention has the beneficial effects of greatly reducing the product development cycle, making the production process simpler and easier to do, greatly reducing the production cost, and improving the cost performance of the device.

Description of drawings

Accompanying drawing is used for providing further understanding to the present invention, is used for explaining the present invention together with the embodiment of the present invention, does not constitute limitation of the present invention:

Figure 1 is a schematic diagram of the structure of a general Schottky diode;

FIG. 2 is a schematic diagram of a Schottky diode structure without any terminal structure;

FIG. 3 is a cross-sectional schematic diagram of forming an oxide layer 100 and a photoresist coating 200 on the surface according to an embodiment of the present invention;

Fig. 4 is a schematic diagram of the opening of grooves exposed on the surface of the embodiment of the present invention;

Fig. 5 is a schematic diagram of completing a sacrificial oxide layer in a trench according to an embodiment of the present invention;

Fig. 6 is a schematic diagram of removing the oxide layer and the polysilicon layer on the surface of the epitaxial layer according to the embodiment of the present invention;

7 is a schematic diagram of forming a contact hole according to an embodiment of the present invention;

Fig. 8 is a schematic diagram of leaving a layer of nickel (Schottky metal contact) at the silicon carbide surface metal contact according to the embodiment of the present invention;

Fig. 9 is a schematic diagram of completing an aluminum alloy layer on the surface of a silicon carbide device according to an embodiment of the present invention.

Reference symbol table:

10 N-type silicon carbide substrate

20 SiC N-type epitaxial layer

30 silicon dioxide layer

39 P-type doped region in N-type silicon carbide body

40 P-type highly doped polysilicon

50 interlayer medium

60 Ni metal layer (Schottky metal contact)

70 aluminum layers

100 silica layers

200 photolithographic coating

detailed description

The preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

Example:

As shown in FIG. 3 , the N-type silicon carbide epitaxial layer 20 is first placed on the top of the N-type silicon carbide substrate 10, and then a silicon dioxide (SiO2) layer 100 (thickness of 0.01 μm) is formed by deposition on the epitaxial layer. to 2um oxide hard mask), and then deposit a layer of photoresist coating 200 on the oxide layer.

As shown in FIG. 4 , some parts of the oxide layer are exposed by patterning the trench mask, and then the epitaxial layer is exposed after dry etching the oxide layer exposed by patterning the trench mask.

As shown in Figure 5, the photolithographic coating is then removed, followed by etching to form a trench (0.5um to 6.0um in depth, 0.1um to 4.0um in width), and then sacrificial oxidation of the trench (time 10 minutes to 100 minutes at a temperature of 1000°C to 1200°C) to eliminate the silicon carbide layer damaged by the plasma during the slotting process.

As shown in FIG. 6, all oxide layers on the surface of the epitaxial layer and in the trench are then removed, and then a silicon dioxide layer 30 is formed on the exposed sidewall and bottom of the trench and on the upper surface of the epitaxial layer by deposition. (thickness is 0.01um to 1um), then deposit P-type high-dopant polysilicon 40 in the trench and on the upper surface of the epitaxial layer, the polysilicon doping concentration is R _S =15Ω/□ to 100Ω/□ (square resistance) , to fill the trench and cover the top surface, and then perform planar etching or chemical mechanical treatment on the oxide layer and polysilicon layer on the surface of the epitaxial layer, and finally remove the oxide layer on the surface of the epitaxial layer.

As shown in Figure 7, the silicon carbide surface is cleaned, and then an undoped silicon dioxide layer (with a thickness of 0.1um to 0.5um) is deposited on the outermost surface of the epitaxial layer, and then borophosphoglass (with a thickness of 0.1um to 0.5um) is deposited. 0.8um) to form an interlayer dielectric 50, then deposit a photolithographic coating on the surface of the interlayer dielectric, use a contact hole mask to expose part of the interlayer dielectric, and then perform dry etching on the exposed part of the interlayer dielectric until it is exposed On the upper surface of the silicon carbide epitaxial layer, a contact hole mask opening is formed in the interlayer dielectric.

As shown in FIG. 8, a layer of nickel (Ni) layer 60 is deposited on the bottom of the contact hole and the upper surface of the interlayer dielectric, and then the photoresist coating is removed. By the Life-off method, when the photoresist coating is stripped, the The unnecessary Ni metal layer is removed.

As shown in Figure 9, an appropriate annealing process is performed on the Ni metal layer to make the Ni metal form a Schottky metal contact on the surface of the silicon carbide, and then a layer of aluminum alloy 70 (thickness 0.8um to 10um) is deposited on the device. , and then conduct metal etching through the metal mask to form a metal pad layer in the emitter region and a field plate in the terminal region.

Finally, it should be noted that the above is only an embodiment of the present invention, and is not intended to limit the present invention. The active region structure of the present invention can be used to manufacture N-type silicon carbide Schottky diodes, and the present invention can also be used for P-type For devices, the termination region structure of the present invention can be used to manufacture N-type silicon carbide devices including Schottky diodes, or insulated gate transistors (MOS), or insulated gate bipolar transistors (IGBTs) or PiN diodes. Although the present invention has been described in detail with reference to the embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Within the spirit and principles of the present invention, any modifications, equivalent replacements, improvements, etc., shall be included in the protection scope of the present invention.

Claims (12)

1. A kind of N-type silicon carbide Schottky diode structure comprises the following parts: (1) Active area and terminal area; (2) There is no P-type doped region in the active region and the terminal region; (3) There is at least one trench in the terminal region to extend the depletion layer of the device when it is reverse biased. 2. The P-type doped region according to claim 1-(2), characterized in that, the P-type doped region can be formed by epitaxy or activated by annealing after ion implantation. 3. The groove according to claim 1 (3), characterized in that, the depth of the groove is between 0.5um and 6.0um, the width is between 0.5um and 4.0um, and the groove inner wall (side and bottom) has a dielectric layer material with a thickness of 0.01um to 1um, the thickness of the side and the bottom can be selected independently, and the middle of the trench is filled with conductive material. 4. The trench inner wall (side and bottom) according to claim 3 has a dielectric layer material, characterized in that the dielectric layer material can be silicon dioxide or silicon nitride or Al2O3 or TiO2 or ZrO2 or HfO2 or ZnO , NiO or CoOx or CaF or SrF or ZnF, etc. or a combination of different dielectric layers. 5. The trench according to claim 3 is filled with a conductive substance, wherein the conductive substance can be P-type doped polysilicon or N-type doped polysilicon or non-doped polysilicon or metal or refractory metal, etc. or Combination of different conductive substances. 6. The at least one trench according to claim 1-(3), characterized in that the conductive material in the middle of the trench may or may not be connected to a field plate on the surface. 7. An N-type silicon carbide Schottky diode structure includes the following parts: (1) active area and terminal area; (2) There is no P-type doped region in the active region and the terminal region; (3) At least one trench in the active region is used to expand the depletion layer of the device when it is reverse biased; (4) There is at least one trench in the terminal region to extend the depletion layer of the device when it is reverse biased. 8. The trench according to claim 7-(3) and claim 7-(4), characterized in that the depth of the trench is between 0.5um and 6.0um, and the width is between 0.5um and 4.0um, The inner wall (side and bottom) of the trench has a dielectric layer with a thickness of 0.01um to 1um. The thickness of the side and the bottom can be selected independently, and the middle of the trench is filled with conductive material. 9. The groove according to claims 7-(3) and 7-(4), characterized in that the characteristics of the groove of (3) of 7 and the groove of (4) of 7 can be selected independently. 10. The trench inner wall (side and bottom) according to claim 8 has a dielectric layer substance, characterized in that the dielectric layer substance can be silicon dioxide or silicon nitride or Al2O3 or TiO2 or ZrO2 or HfO2 or ZnO , NiO or CoOx or CaF or SrF or ZnF, etc. or a combination of different dielectric layers. 11. The trench according to claim 8 is filled with a conductive substance, characterized in that the conductive substance can be P-type doped polysilicon or N-type doped polysilicon or non-doped polysilicon or metal or refractory metal, etc. or Combination of different conductive substances. 12. The at least one trench according to claim 7-(4), characterized in that the conductive material in the middle of the trench may or may not be connected to a field plate on the surface.