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CN106603073B - An integrated single-loop system for low phase noise microwave broadband frequency synthesis - Google Patents

An integrated single-loop system for low phase noise microwave broadband frequency synthesis Download PDF

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CN106603073B
CN106603073B CN201611127137.9A CN201611127137A CN106603073B CN 106603073 B CN106603073 B CN 106603073B CN 201611127137 A CN201611127137 A CN 201611127137A CN 106603073 B CN106603073 B CN 106603073B
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frequency
phase
divider
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CN106603073A (en
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陈丽
胡小兰
张晓来
朱伟
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CETC 41 Research Institute
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop

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Abstract

本发明涉及一种实现低相噪微波宽频段频率合成的集成单环系统，包括：VCO、功分器、外置反馈分频器、集成小数分频器、集成鉴相器、有源环路滤波器、VCO依次连接形成的反馈回路以及VCO、功分器、通路分频器、幅度调节装置，形成的锁相环输出电路。本发明提出的实现低相噪微波宽频段频率合成的集成单环系统能够在很小的一块印制板上实现高达20GHz的频率合成，采用单环模式锁相，即可达到多环模式才能达到的相位噪声，通过幅度调节装置使得该系统具有良好的输出平坦度，在印制板上实现具有性能指标高，体积小，功耗低，重量小，价格便宜等特点，满足手持式仪器的发展需要。

Figure 201611127137

The invention relates to an integrated single-loop system for realizing low-phase-noise microwave broadband frequency synthesis, comprising: a VCO, a power divider, an external feedback frequency divider, an integrated fractional frequency divider, an integrated phase detector, and an active loop The filter and the VCO are connected in turn to form a feedback loop, and the VCO, the power divider, the channel frequency divider, and the amplitude adjustment device form a phase-locked loop output circuit. The integrated single-loop system for realizing low-phase noise microwave broadband frequency synthesis proposed by the present invention can realize frequency synthesis up to 20 GHz on a very small printed board, and the single-loop mode is phase-locked to achieve multi-loop mode. The system has good output flatness through the amplitude adjustment device. It has the characteristics of high performance index, small size, low power consumption, small weight and low price on the printed board, which meets the development of hand-held instruments. need.

Figure 201611127137

Description

Integrated single-ring system for realizing low-phase-noise microwave wide-band frequency synthesis
Technical Field
The invention relates to the technical field of frequency synthesis, in particular to an integrated single-ring system for realizing low-phase-noise microwave wide-band frequency synthesis.
Background
At present, the development of handheld instrument products in the world is mainly to comprehensively consider and improve five aspects of miniaturization, low power consumption, heat dissipation, electromagnetic compatibility and weight of instruments while improving the technical performance index of the whole instrument, so that the integration requirement is higher and higher, and the difficulty is higher and higher. When the traditional desktop realizes the frequency synthesis of a microwave wide frequency band of 10 GHz-20 GHz, a mode of combining a frequency synthesis circuit board with a microwave module is often adopted, the volume power consumption and the weight are both large, and the requirement of an ultra-low phase noise index is met while signals of the wide frequency band are realized.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides an integrated single-loop system for realizing frequency synthesis of a low-phase-noise microwave broadband frequency band.
In order to solve the above problems, the present invention provides an integrated single-loop system for realizing frequency synthesis of low-phase-noise microwave broadband, comprising:
the VCO is used for generating a microwave signal with a wide frequency band of 10 GHz-20 GHz and transmitting the signal to the power divider;
the power divider transmits the microwave signal input by the VCO to an external feedback frequency divider and a phase-locked loop output frequency division channel respectively;
the external feedback frequency divider divides the frequency of the microwave signal input by the power divider by four, and inputs the generated feedback signal of 2.5 GHz-5 GHz into the integrated fractional frequency divider;
integrating a decimal frequency divider, carrying out built-in fractional frequency division on a feedback signal input by the external feedback frequency divider, and inputting a generated 45MHz feedback signal into the integrated phase discriminator;
the integrated phase discriminator is used for carrying out built-in frequency division and 2 division on a 90MHz reference clock input signal to obtain a 45MHz reference clock signal, comparing the reference clock signal with a feedback signal input by the integrated fractional frequency divider, and outputting a phase discrimination current to an active loop filter through a charge pump;
the active loop filter is connected with the VCO, filters a loop error signal and provides a certain gain at the same time, so that the control voltage of the VCO is adjusted to a proper range;
the method comprises the following steps that a path frequency divider controls the frequency dividing ratio to be 1/2/4/8 through a control signal generated by an FPGA, microwave signals input by the power divider are divided into frequency to form wide-band signals of 1.25 GHz-20 GHz, and the signals are input to an amplitude adjusting device;
and the amplitude adjusting device is used for adjusting the amplitude of the wide-frequency-band signal input by the path frequency divider so as to ensure that the wide-frequency-band signal has better power flatness.
In the above technical solution, a feedback amplifier is connected between the power divider and the external feedback frequency divider, a pass amplifier is connected between the power divider and the pass frequency divider, the feedback amplifier is used to improve output power, to push the external feedback frequency divider behind to normally operate, to increase isolation between the pass frequency divider and the external feedback frequency divider, and the pass amplifier is used to improve output power, to push the pass frequency divider behind to normally operate, to increase isolation between the pass frequency divider and the external feedback frequency divider.
In the technical scheme, the feedback amplifier and the channel amplifier adopt amplifiers with small integrated package, wide frequency band, low noise and low power consumption.
In the above technical solution, the active loop filter employs a rail-to-rail output type low noise operational amplifier.
In the above technical solution, the amplitude adjusting apparatus uses the FPGA to send data related to amplitude adjustment to enter a 16-bit DAC for D/a conversion, converts a digital signal into an analog signal, and controls a control circuit composed of two stages of operational amplifiers to control the attenuation of the output amplitude and the matching of the input and output impedances.
Compared with the prior art, the invention has the following beneficial effects and advantages:
the integrated single-ring system for realizing the frequency synthesis of the low-phase-noise microwave broadband frequency band can realize the frequency synthesis of up to 20GHz on a very small printed board, can achieve the phase noise which can be achieved only in a multi-ring mode by adopting single-ring mode phase locking, has good output flatness by an amplitude adjusting device, has the characteristics of high performance index, small volume, low power consumption, light weight, low price and the like on the printed board, and meets the development requirement of a handheld instrument.
Drawings
Fig. 1 is a block diagram of an integrated single-loop system for implementing low-phase-noise microwave broadband frequency synthesis according to the present invention.
The numbering in the figures illustrates: 1. a VCO; 2. a power divider; 3. a pass amplifier; 4. a feedback amplifier; 5. an external feedback frequency divider; 6. an integrated fractional frequency divider; 7. integrating a phase discriminator; 8. an active loop filter; 9. a path divider; 10. an amplitude adjustment device.
Detailed Description
The invention is described in further detail below with reference to the following figures and specific examples:
in this embodiment, as shown in fig. 1, the integrated single-loop system for implementing frequency synthesis of a low-phase-noise microwave broadband according to the present invention includes:
the VCO1 is used for generating a microwave signal with a wide frequency band of 10 GHz-20 GHz and transmitting the signal to the power divider 2;
the power divider 2 transmits the received microwave signals to the external feedback frequency divider 5 and the phase-locked loop output frequency division channel respectively;
the external feedback frequency divider 5 divides the frequency of the microwave signal by four, and inputs the generated feedback signal of 2.5 GHz-5 GHz into the integrated fractional frequency divider 6;
integrating a decimal frequency divider 6, carrying out built-in decimal frequency division on the feedback signal, and inputting the generated 45MHz feedback signal into an integrated phase discriminator 7;
integrating a phase discriminator 7, performing built-in frequency division and 2 division on a 90MHz reference clock input signal to obtain a 45MHz reference clock signal, comparing the reference clock signal with a feedback signal, and outputting a phase discrimination current to an active loop filter 8 through a charge pump;
an active loop filter 8 for providing a certain gain while filtering the loop error signal, thereby adjusting the control voltage of the VCO1 to a suitable range;
the channel frequency divider 9 controls the frequency dividing ratio to 1/2/4/8 through a control signal generated by the FPGA, divides the frequency of the microwave signal input by the power divider 2 into a wide-frequency-band signal of 1.25 GHz-20 GHz, and inputs the wide-frequency-band signal into the amplitude adjusting device 10;
the amplitude adjusting device 10 is used for adjusting the amplitude of the wide-band signal of 1.25 GHz-20 GHz, so that the wide-band signal has better power flatness.
A feedback amplifier 4 is connected between the power divider 2 and the external feedback frequency divider 5, the feedback amplifier 4 is used for improving the output power, pushing the external feedback frequency divider 5 behind to normally work, and increasing the isolation between the channel frequency divider 9 and the external feedback frequency divider 5.
The channel amplifier 3 is connected between the power divider 2 and the channel frequency divider 9, and the channel amplifier 3 is used for improving the output power, pushing the following channel frequency divider 9 to work normally, and increasing the isolation between the channel frequency divider 9 and the external feedback frequency divider 5.
The feedback amplifier 4 and the path amplifier 3 adopt integrated small-package, broadband, low-noise and low-power-consumption amplifiers.
The active loop filter 8 employs a low noise operational amplifier of a rail-to-rail output type.
The amplitude adjustment device 10 uses the FPGA to send data about amplitude adjustment into a 16-bit DAC, performs D/a conversion, converts a digital signal into an analog signal, and controls a control circuit composed of two stages of operational amplifiers to control the attenuation amount of the output amplitude and the input/output impedance matching.
The working principle of the integrated single-ring system for realizing the frequency synthesis of the low-phase-noise microwave broadband frequency band is as follows:
the VCO1 oscillates to generate a 10 GHz-20 GHz broadband microwave signal, the signal is transmitted to the power divider 2, the power is divided into two paths of signals, one path of signal is transmitted to the phase-locked loop, the gain is improved through the feedback amplifier 4, the external feedback frequency divider 5 is pushed to divide four frequencies, a 2.5 GHz-5 GHz feedback signal is generated and enters the integrated fractional frequency divider 6 to divide a decimal frequency, the decimal frequency division generates a 45MHz feedback signal and enters the integrated phase discriminator 7, the integrated phase discriminator 7 internally divides a 90MHz reference clock signal by 2 to obtain a 45MHz reference signal and then compares the 45MHz reference signal with the feedback signal, a phase discrimination current is output to the active loop filter 8 through the charge pump, and the control voltage of the VCO1 is adjusted through filtering and amplification, so that the oscillation of the VCO1 is controlled; the other path of signal after power division is transmitted to the access amplifier 3 for amplification, and then is subjected to 1/2/4/8 frequency division by the access frequency divider 9, the frequency division of the 10 GHz-20 GHz signal is changed into a wide-frequency-band signal of 1.25 GHz-20 GHz, the wide-frequency-band signal is input to the amplitude adjusting device 10, and the FPGA controls the amplitude adjusting device 10 to improve the power flatness.

Claims (5)

1.一种实现低相噪微波宽频段频率合成的集成单环系统，其特征在于，包括：1. an integrated single-loop system that realizes low-phase-noise microwave broadband frequency synthesis, is characterized in that, comprises: VCO（1），用于产生10GHz～20GHz的宽频段的微波信号，并将该信号传输至功分器（2）；The VCO (1) is used to generate a microwave signal in a wide frequency band of 10GHz to 20GHz, and transmit the signal to the power divider (2); 功分器（2），将所述VCO（1）输入的微波信号分别传输至外置反馈分频器（5）和锁相环输出分频通道；a power divider (2), which transmits the microwave signal input by the VCO (1) to an external feedback frequency divider (5) and a phase-locked loop output frequency division channel respectively; 外置反馈分频器（5），将所述功分器（2）输入的微波信号进行四分频，并将产生的2.5GHz～5GHz的反馈信号输入集成小数分频器（6）中；an external feedback frequency divider (5), which divides the microwave signal input from the power divider (2) by four, and inputs the generated feedback signal of 2.5GHz to 5GHz into the integrated fractional frequency divider (6); 集成小数分频器（6），将所述外置反馈分频器（5）输入的反馈信号进行内置小数分频，并将产生的45MHz的反馈信号输入到集成鉴相器（7）中；Integrate a fractional frequency divider (6), perform built-in fractional frequency division on the feedback signal input by the external feedback frequency divider (5), and input the generated 45MHz feedback signal into the integrated phase detector (7); 集成鉴相器（7），将90MHz参考时钟输入信号进行内置分频除2后得到45MHz的参考时钟信号，并将参考时钟信号与所述集成小数分频器（6）输入的反馈信号相比较，鉴相电流经过电荷泵输出至有源环路滤波器（8）；An integrated phase detector (7), which divides the 90MHz reference clock input signal by built-in frequency division by 2 to obtain a 45MHz reference clock signal, and compares the reference clock signal with the feedback signal input by the integrated fractional frequency divider (6) , the phase detection current is output to the active loop filter (8) through the charge pump; 有源环路滤波器（8），与所述VCO（1）相连，对环路误差信号进行滤波的同时，提供一定的增益，从而将所述VCO（1）的控制电压调整到合适的范围；An active loop filter (8), connected to the VCO (1), provides a certain gain while filtering the loop error signal, so as to adjust the control voltage of the VCO (1) to an appropriate range ; 通路分频器（9），通过FPGA产生的控制信号控制分频比为1/2/4/8，将所述功分器（2）输入的微波信号分频形成1.25GHz～20GHz的宽频段信号，并输入到幅度调节装置（10）；The channel frequency divider (9) controls the frequency division ratio to be 1/2/4/8 through the control signal generated by the FPGA, and divides the frequency of the microwave signal input by the power divider (2) to form a wide frequency band of 1.25GHz to 20GHz signal, and input it to the amplitude adjustment device (10); 幅度调节装置（10），用于将所述通路分频器（9）输入的宽频段信号进行幅度调节，使其具有较好的功率平坦度。An amplitude adjustment device (10) is used to adjust the amplitude of the broadband signal input by the channel frequency divider (9), so that it has better power flatness. 2.根据权利要求1所述的实现低相噪微波宽频段频率合成的集成单环系统，其特征在于，所述功分器（2）与外置反馈分频器（5）之间连接有反馈放大器（4），所述功分器（2）与通路分频器（9）之间连接有通路放大器（3）。2. The integrated single-loop system for realizing low-phase noise microwave broadband frequency synthesis according to claim 1, characterized in that a power divider (2) and an external feedback frequency divider (5) are connected with A feedback amplifier (4), a channel amplifier (3) is connected between the power divider (2) and the channel frequency divider (9). 3.根据权利要求2所述的实现低相噪微波宽频段频率合成的集成单环系统，其特征在于，所述反馈放大器（4）和通路放大器（3）采用集成小封装、宽频带、低噪声、低功耗的放大器。3. The integrated single-loop system for realizing low-phase-noise microwave broadband frequency synthesis according to claim 2, characterized in that the feedback amplifier (4) and the channel amplifier (3) adopt an integrated small package, wideband, low Noise, low power amplifier. 4.根据权利要求1所述的实现低相噪微波宽频段频率合成的集成单环系统，其特征在于，所述有源环路滤波器（8）采用轨到轨输出型的低噪声运算放大器。4. The integrated single-loop system for realizing low-phase-noise microwave broadband frequency synthesis according to claim 1, wherein the active loop filter (8) adopts a rail-to-rail output type low-noise operational amplifier . 5.根据权利要求1所述的实现低相噪微波宽频段频率合成的集成单环系统，其特征在于，所述幅度调节装置（10）采用FPGA发送关于幅度调节的数据进入一个16位的DAC，进行D/A转换，将数字信号转换成模拟信号，控制两级运算放大器组成的控制电路，来控制输出幅度的衰减量和输入输出阻抗匹配。5. The integrated single-loop system for realizing low-phase-noise microwave broadband frequency synthesis according to claim 1, wherein the amplitude adjustment device (10) uses an FPGA to send data about the amplitude adjustment into a 16-bit DAC , carry out D/A conversion, convert digital signals into analog signals, and control the control circuit composed of two-stage operational amplifiers to control the attenuation of the output amplitude and the matching of input and output impedance.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1865880A (en) * 2006-06-15 2006-11-22 黄耀民 Measurement method and device for vehicular reaction type brake tester
CN201008145Y (en) * 2007-02-16 2008-01-16 中国科学院武汉物理与数学研究所 A Rubidium Atomic Frequency Standard Digital Phase-locked Frequency Multiplier
CN105306051A (en) * 2015-11-21 2016-02-03 扬州海科电子科技有限公司 Broadband phase-locked source with small volume and low phase noise
CN105721069A (en) * 2014-12-05 2016-06-29 成都创客之家科技有限公司 2.4G wireless signal detection system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60209329D1 (en) * 2002-11-21 2006-04-27 St Microelectronics Belgium Nv Accurate self-calibration of a multi-phase clock generating phase locked loop

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1865880A (en) * 2006-06-15 2006-11-22 黄耀民 Measurement method and device for vehicular reaction type brake tester
CN201008145Y (en) * 2007-02-16 2008-01-16 中国科学院武汉物理与数学研究所 A Rubidium Atomic Frequency Standard Digital Phase-locked Frequency Multiplier
CN105721069A (en) * 2014-12-05 2016-06-29 成都创客之家科技有限公司 2.4G wireless signal detection system
CN105306051A (en) * 2015-11-21 2016-02-03 扬州海科电子科技有限公司 Broadband phase-locked source with small volume and low phase noise

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"小数分频频率合成器的设计";宦维定;《电子工程师》;20051031;正文第40页左栏，图1 *

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