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CN106558568A - Package structure - Google Patents

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Publication number
CN106558568A
CN106558568A CN201510640033.7A CN201510640033A CN106558568A CN 106558568 A CN106558568 A CN 106558568A CN 201510640033 A CN201510640033 A CN 201510640033A CN 106558568 A CN106558568 A CN 106558568A
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China
Prior art keywords
electrode
lead frame
exposed surface
exposed
package
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Granted
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CN201510640033.7A
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Chinese (zh)
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CN106558568B (en
Inventor
蔡欣昌
李芃昕
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Anchorage Semiconductor Co ltd
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Delta Electronics Inc
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Priority to CN201510640033.7A priority Critical patent/CN106558568B/en
Publication of CN106558568A publication Critical patent/CN106558568A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49568Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for individual devices of subclass H10D
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Arrangement Of Elements, Cooling, Sealing, Or The Like Of Lighting Devices (AREA)

Abstract

A package structure includes a package body, an active device, a first lead frame and a second lead frame. The active element is packaged in the packaging body. The active device includes a first electrode and a second electrode. The first electrode is arranged on the first lead frame and is electrically connected with the first lead frame. The first lead frame has a first exposed surface. The first exposed surface and the first electrode are respectively positioned on the opposite sides of the first lead frame. The first exposed surface is exposed outside the packaging body. The second electrode is arranged on the second lead frame and is electrically connected with the second lead frame. The second lead frame has a second exposed surface. The second exposed surface and the second electrode are respectively positioned on the opposite sides of the second lead frame. The second exposed surface is exposed outside the packaging body. The shortest distance from the first electrode to the second electrode is smaller than the shortest distance from the first exposed surface to the second exposed surface.

Description

封装结构Package structure

技术领域technical field

本发明涉及一种封装结构。The invention relates to a packaging structure.

背景技术Background technique

随着信息科技迅速且蓬勃的发展,电子装置的小型化趋势蔚为潮流。因此,在电路板上,电子元件的积集度日益增加,使得电子元件的散热问题更加重要。With the rapid and vigorous development of information technology, the miniaturization trend of electronic devices has become a trend. Therefore, on the circuit board, the integration degree of electronic components is increasing day by day, which makes the problem of heat dissipation of electronic components more important.

进一步来说,功率晶体管在电源供应装置、控制设备、量测仪器、电器设备、电脑周边设备等电子装置中所常见的基础元件,而由于其主要功能为信号处理或功率驱动,且通常是处理较大功率的信号,因此所发出的热量较大,故散热的需求特别重要。Furthermore, power transistors are common basic components in electronic devices such as power supply devices, control equipment, measuring instruments, electrical equipment, and computer peripheral equipment. Since their main functions are signal processing or power driving, and are usually processing Higher power signals generate more heat, so the need for heat dissipation is particularly important.

一般来说,功率晶体管的散热通常由导线架的形状设计来实现。除了散热问题外,由于经过大功率晶体管的信号功率较大,故连接于不同电极的导线架相对容易发生短路现象。因此,导线架的设计也必须满足防短路的需求。因此,如何兼顾功率晶体管的散热与防短路需求为相关领域的重要课题之一。Generally speaking, the heat dissipation of power transistors is usually achieved by the shape design of the lead frame. In addition to the problem of heat dissipation, due to the high signal power passing through the high-power transistors, the lead frames connected to different electrodes are relatively prone to short circuits. Therefore, the design of the lead frame must also meet the requirements of short circuit protection. Therefore, how to balance heat dissipation and short-circuit protection requirements of power transistors is one of the important issues in related fields.

发明内容Contents of the invention

在本发明的一实施方式中,提供一种主动元件的散热与防短路需求可被兼顾的封装结构。In one embodiment of the present invention, a packaging structure is provided that can meet the requirements of heat dissipation and short-circuit prevention of active components.

依据本发明的一实施方式,一种封装结构包含一封装体、一主动元件、一第一导线架以及一第二导线架。主动元件封装于封装体内。主动元件包含一第一电极以及一第二电极。第一电极设置于第一导线架上,并电性连接第一导线架。第一导线架具有一第一裸露面。第一裸露面与第一电极分别位于第一导线架的相反侧。第一裸露面裸露于封装体外。第二电极设置于第二导线架上,并电性连接第二导线架。第二导线架具有一第二裸露面。第二裸露面与第二电极分别位于第二导线架的相反侧。第二裸露面裸露于封装体外。第一电极至第二电极的最短距离小于第一裸露面至第二裸露面的最短距离。According to an embodiment of the present invention, a package structure includes a package body, an active device, a first lead frame and a second lead frame. The active components are encapsulated in the package body. The active device includes a first electrode and a second electrode. The first electrode is disposed on the first lead frame and electrically connected to the first lead frame. The first lead frame has a first exposed surface. The first exposed surface and the first electrode are respectively located on opposite sides of the first lead frame. The first exposed surface is exposed outside the package body. The second electrode is disposed on the second lead frame and is electrically connected to the second lead frame. The second lead frame has a second exposed surface. The second exposed surface and the second electrode are respectively located on opposite sides of the second lead frame. The second exposed surface is exposed outside the package body. The shortest distance from the first electrode to the second electrode is smaller than the shortest distance from the first exposed surface to the second exposed surface.

于上述实施方式中,由于第一导线架与第二导线架分别具有裸露与封装体外的第一裸露面与第二裸露面,故可将主动元件的热量传导至封装体外。另外,由于第一裸露面至第二裸露面的最短距离比第一电极至第二电极的最短距离更长,因此,第一裸露面可不致于过度靠近第二裸露面。如此一来,即使主动元件的第一电极及/或第二电极传递高功率信号,而可能造成裸露于空气中的第一裸露面与第二裸露面产生电弧,但第一裸露面与第二裸露面保持够长的距离,故可防止第一裸露面与第二裸露面产生电弧,从而进一步防止该电弧造成第一电极与第二电极的短路状况。因此,于上述实施方式中,主动元件的散热与防短路需求可被兼顾。In the above embodiments, since the first lead frame and the second lead frame respectively have a first exposed surface and a second exposed surface exposed outside the package, the heat of the active device can be conducted to the package. In addition, since the shortest distance from the first exposed surface to the second exposed surface is longer than the shortest distance from the first electrode to the second electrode, the first exposed surface may not be too close to the second exposed surface. In this way, even if the first electrode and/or the second electrode of the active element transmits a high-power signal, which may cause arcing on the first exposed surface and the second exposed surface exposed in the air, the first exposed surface and the second exposed surface The distance between the exposed surfaces is long enough to prevent arcing between the first exposed surface and the second exposed surface, thereby further preventing the arc from causing a short circuit between the first electrode and the second electrode. Therefore, in the above-mentioned embodiments, the heat dissipation and short-circuit prevention requirements of the active element can be taken into account.

以上所述仅用以阐述本发明所欲解决的问题、解决问题的技术手段及其产生的功效,等等,本发明的具体细节将在下文的实施方式及相关附图中详细介绍。The above description is only used to illustrate the problem to be solved by the present invention, the technical means for solving the problem and the effects thereof, etc., and the specific details of the present invention will be introduced in detail in the following embodiments and related drawings.

附图说明Description of drawings

为让本发明的实施例能更明显易懂,所附附图的说明如下:In order to make the embodiments of the present invention more obvious and understandable, the accompanying drawings are described as follows:

图1绘示依据本发明一实施方式的封装结构的立体示意图;FIG. 1 shows a schematic perspective view of a packaging structure according to an embodiment of the present invention;

图2绘示图1中沿着2-2’线的剖面示意图;Fig. 2 depicts a schematic cross-sectional view along line 2-2' in Fig. 1;

图3绘示依据本发明另一实施方式的封装结构的剖面示意图;3 shows a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention;

图4绘示依据本发明另一实施方式的封装结构的剖面示意图;4 shows a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention;

图5绘示依据本发明另一实施方式的封装结构的立体示意图;FIG. 5 is a schematic perspective view of a packaging structure according to another embodiment of the present invention;

图6绘示图5中沿着6-6’线的剖面图;以及Fig. 6 depicts a sectional view along line 6-6' in Fig. 5; and

图7绘示依据本发明另一实施方式的封装结构的剖面示意图。FIG. 7 is a schematic cross-sectional view of a package structure according to another embodiment of the present invention.

其中,附图标记说明如下:Wherein, the reference signs are explained as follows:

100:封装体100: package body

200:主动元件200: active components

201:第一表面201: First Surface

202:第二表面202: Second Surface

210:第一电极210: first electrode

211:第一内边缘211: first inner edge

221:第二内边缘221: second inner edge

220:第二电极220: second electrode

230:第三电极230: third electrode

300、300a:第一导线架300, 300a: the first lead frame

301、301a:第一裸露面301, 301a: first exposed face

3011:第一裸露边缘3011: First Bare Edge

310a:第一埋入部310a: first embedded part

311a:内端面311a: inner end face

320a:第一裸露部320a: First exposed part

400、400a:第二导线架400, 400a: second lead frame

401、401a:第二裸露面401, 401a: second exposed face

4011:第二裸露边缘4011: Second Bare Edge

410、410a:第二埋入部410, 410a: second embedded part

411:内端面411: inner end face

420、420a:第二裸露部420, 420a: the second exposed part

500:第三导线架500: Third lead frame

501:第三裸露面501: Third Bare Face

600、600a:散热件600, 600a: radiator

601:第一导热面601: the first heat conducting surface

602、602a:第二导热面602, 602a: the second heat conducting surface

710、720:粘接层710, 720: adhesive layer

A:排列方向A: Arrangement direction

D1、D2:最短距离D1, D2: the shortest distance

L1:第一埋入长度L1: first embedding length

L2:第二埋入长度L2: Second buried length

L3:第一重叠长度L3: first overlap length

L4:第二重叠长度L4: second overlap length

O1:第一重叠区域O1: first overlapping area

O2:第二重叠区域O2: second overlap area

P1、P2:正投影P1, P2: orthographic projection

具体实施方式detailed description

以下将以附图揭露本发明的多个实施方式,为明确说明起见,许多实务上的细节将在以下叙述中一并说明。然而,熟悉本领域的技术人员应当了解到,在本发明部分实施方式中,这些实务上的细节并非必要的,因此不应用以限制本发明。此外,为简化附图起见,一些习知惯用的结构与元件在图式中将以简单示意的方式绘示。A number of embodiments of the present invention will be disclosed below with the accompanying drawings. For the sake of clarity, many practical details will be described together in the following description. However, those skilled in the art should appreciate that in some embodiments of the present invention, these practical details are not necessary and thus should not be used to limit the present invention. In addition, for the sake of simplifying the drawings, some conventional structures and components will be shown in a simple and schematic manner in the drawings.

图1绘示依据本发明一实施方式的封装结构的立体示意图。图2绘示图1中沿着2-2’线的剖面示意图。如图1及图2所示,于本实施方式中,封装结构包含封装体100、主动元件200、第一导线架300以及第二导线架400。主动元件200封装于封装体100内,而可被封装体100所保护。主动元件200包含第一电极210以及第二电极220。第一电极210设置于第一导线架300上并电性连接第一导线架300。第二电极220设置于第二导线架400上并电性连接第二导线架400。第一导线架300具有第一裸露面301。第一裸露面301与第一电极210的分别位于第一导线架300的相反侧。换句话说,第一裸露面301背向第一电极210的。第二导线架400具有第二裸露面401。第二裸露面401与第二电极220的分别位于第二导线架400的相反侧。换句话说,第二裸露面401背向第二电极220的。第一裸露面301与第二裸露面401均裸露于封装体100外。如此一来,当主动元件200在工作时,第一电极210所产生的热量可借由第一导线架300传导至第一裸露面301,而借由第一裸露面301散逸至外界环境(如空气)中;相似地,第二电极220所产生的热量可借由第二导线架400传导至第二裸露面401,而借由第二裸露面401散逸至外界环境(如空气)中。FIG. 1 is a schematic perspective view of a packaging structure according to an embodiment of the present invention. Fig. 2 is a schematic cross-sectional view along line 2-2' in Fig. 1 . As shown in FIG. 1 and FIG. 2 , in this embodiment, the package structure includes a package body 100 , an active device 200 , a first lead frame 300 and a second lead frame 400 . The active device 200 is packaged in the package body 100 and can be protected by the package body 100 . The active device 200 includes a first electrode 210 and a second electrode 220 . The first electrode 210 is disposed on the first lead frame 300 and electrically connected to the first lead frame 300 . The second electrode 220 is disposed on the second lead frame 400 and electrically connected to the second lead frame 400 . The first lead frame 300 has a first exposed surface 301 . The first exposed surface 301 and the first electrode 210 are respectively located on opposite sides of the first lead frame 300 . In other words, the first exposed surface 301 faces away from the first electrode 210 . The second lead frame 400 has a second exposed surface 401 . The second exposed surface 401 and the second electrode 220 are respectively located on opposite sides of the second lead frame 400 . In other words, the second exposed surface 401 faces away from the second electrode 220 . Both the first exposed surface 301 and the second exposed surface 401 are exposed outside the package body 100 . In this way, when the active device 200 is working, the heat generated by the first electrode 210 can be conducted to the first exposed surface 301 through the first lead frame 300, and dissipated to the external environment (such as similarly, the heat generated by the second electrode 220 can be conducted to the second exposed surface 401 through the second lead frame 400 , and dissipated to the external environment (such as air) through the second exposed surface 401 .

如图2所示,第一电极210至第二电极220定义最短距离D1,而第一裸露面301至第二裸露面401定义最短距离D2,其中最短距离D1小于最短距离D2的。如此一来,当第一电极210及/或第二电极220在传递高功率信号时,即使第一裸露面301与第二裸露面401可能因为裸露于封装体100外而产生电弧,但由于第一裸露面301至第二裸露面401的最短距离D2够长,故可有效防止电弧的产生,从而进一步避免第一电极210与第二电极220短路。因此,于本实施方式中,散热与防短路的效果可被兼顾。As shown in FIG. 2 , the first electrode 210 to the second electrode 220 define the shortest distance D1 , and the first exposed surface 301 to the second exposed surface 401 define the shortest distance D2 , wherein the shortest distance D1 is smaller than the shortest distance D2 . In this way, when the first electrode 210 and/or the second electrode 220 are transmitting high-power signals, even though the first exposed surface 301 and the second exposed surface 401 may generate arcs because they are exposed outside the package body 100 , due to the second The shortest distance D2 from the first exposed surface 301 to the second exposed surface 401 is sufficiently long, so that arc generation can be effectively prevented, thereby further avoiding the short circuit between the first electrode 210 and the second electrode 220 . Therefore, in this embodiment, the effects of heat dissipation and short-circuit prevention can be taken into account.

于部分实施方式中,主动元件200包含相对的第一表面201以及第二表面202。换句话说,第一表面201与第二表面202位于主动元件200的相反侧。第一电极210与第二电极220位于第一表面201上。换句话说,第一电极210与第二电极220位于主动元件200的相同表面上。第一电极210具有最靠近第二电极220的第一内边缘211。第二电极220具有最靠近第一电极210的第二内边缘221。第一电极210与第二电极220沿着排列方向A排列于第一表面201上。最短距离D1可为第一内边缘211至第二内边缘221沿着排列方向A所量测到的距离。第一裸露面301具有最靠近第二裸露面401的第一裸露边缘3011。第二裸露面401具有最靠近第一裸露面301的第二裸露边缘4011。最短距离D2可为第一裸露边缘3011至第二裸露边缘4011沿着排列方向A所量测到的距离。In some embodiments, the active device 200 includes a first surface 201 and a second surface 202 opposite to each other. In other words, the first surface 201 and the second surface 202 are located on opposite sides of the active device 200 . The first electrode 210 and the second electrode 220 are located on the first surface 201 . In other words, the first electrode 210 and the second electrode 220 are located on the same surface of the active device 200 . The first electrode 210 has a first inner edge 211 closest to the second electrode 220 . The second electrode 220 has a second inner edge 221 closest to the first electrode 210 . The first electrodes 210 and the second electrodes 220 are arranged along the arrangement direction A on the first surface 201 . The shortest distance D1 may be the distance measured along the arrangement direction A from the first inner edge 211 to the second inner edge 221 . The first exposed surface 301 has a first exposed edge 3011 closest to the second exposed surface 401 . The second exposed surface 401 has a second exposed edge 4011 closest to the first exposed surface 301 . The shortest distance D2 may be the distance measured along the arrangement direction A from the first exposed edge 3011 to the second exposed edge 4011 .

于部分实施方式中,如图2所示,第一电极210朝第一导线架300的正投影P1会重叠第一裸露面301。换句话说,如图2所示,部分第一裸露面301位于第一电极210的正下方。如此一来,第一电极210至第一裸露面301的热传导路径可被缩短,使得第一电极210的热量可向下传递至第一裸露面301,从而提升第一导线架300对第一电极210的散热效果。举例来说,于部分实施方式中,如图2所示,第一电极210朝第一导线架300的正投影P1可完全重叠第一裸露面301。换句话说,第一电极210朝第一导线架300的正投影P1可完全位于第一裸露面301内。如此一来,整个第一电极210位于第一裸露面301的正上方,故第一电极210的任意位置所产生的热量可向下传递至第一裸露面301,而提升第一导线架300对第一电极210的散热效果。In some implementations, as shown in FIG. 2 , the orthographic projection P1 of the first electrode 210 toward the first lead frame 300 overlaps the first exposed surface 301 . In other words, as shown in FIG. 2 , a part of the first exposed surface 301 is located directly below the first electrode 210 . In this way, the heat conduction path from the first electrode 210 to the first exposed surface 301 can be shortened, so that the heat of the first electrode 210 can be transferred downward to the first exposed surface 301, thereby lifting the first lead frame 300 to the first electrode. 210 cooling effect. For example, in some implementations, as shown in FIG. 2 , the orthographic projection P1 of the first electrode 210 toward the first lead frame 300 can completely overlap the first exposed surface 301 . In other words, the orthographic projection P1 of the first electrode 210 toward the first lead frame 300 may be completely located within the first exposed surface 301 . In this way, the entire first electrode 210 is located directly above the first exposed surface 301, so the heat generated at any position of the first electrode 210 can be transferred downward to the first exposed surface 301, thereby lifting the first lead frame 300 to The heat dissipation effect of the first electrode 210 .

于部分实施方式中,如图2所示,第二电极220朝第二导线架400的正投影P2不重叠第二裸露面401。这样的设计可在第一电极210朝第一导线架300的正投影P1重叠第一裸露面301的情况下,较佳地维持最短距离D2大于最短距离D1的关系,以助于防止第一导线架300与第二导线架400产生电弧而造成第一电极210与第二电极220短路。In some implementations, as shown in FIG. 2 , the orthographic projection P2 of the second electrode 220 toward the second lead frame 400 does not overlap the second exposed surface 401 . Such a design can preferably maintain the relationship that the shortest distance D2 is greater than the shortest distance D1 when the orthographic projection P1 of the first electrode 210 toward the first lead frame 300 overlaps the first exposed surface 301, so as to help prevent the first lead An arc is generated between the frame 300 and the second lead frame 400 to cause a short circuit between the first electrode 210 and the second electrode 220 .

于部分实施方式中,由于第二电极220朝第二导线架400的正投影P2不重叠第二裸露面401,且第一电极210朝第一导线架300的正投影P1重叠第一裸露面301,故第二导线架400对第二电极220的散热效果可能会低于第一导线架300对第一电极210的散热效果,因此,于部分实施方式中,可将主动元件200中相对高温的电极作为第一电极210,并将主动元件200中相对低温的电极作为第二电极220。举例来说,主动元件200可为金属氧化物半导体场效晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor;MOSFET),当MOSFET工作时,漏极的温度会高于源极的温度,因此,第一电极210可为漏极而第二电极220可为源极,故相对高温的漏极可设置于散热效果较高的第一导线架300上,而相对低温的源极可设置于散热效果较低的第二导线架400上。应了解到,上述MOSFET仅用以说明,而非限制本发明所记载的主动元件200,于其他实施方式中,主动元件200亦可为其他元件,例如:接面场效晶体管(JFET)、鳍式场效晶体管(FinFET)、或绝缘闸双极晶体管(IGBT)等等,但本发明并不以此为限。In some embodiments, since the orthographic projection P2 of the second electrode 220 toward the second lead frame 400 does not overlap the second exposed surface 401 , and the orthographic projection P1 of the first electrode 210 toward the first lead frame 300 overlaps the first exposed surface 301 , so the heat dissipation effect of the second lead frame 400 on the second electrode 220 may be lower than the heat dissipation effect of the first lead frame 300 on the first electrode 210, therefore, in some embodiments, the relatively high temperature of the active element 200 can be The electrode is used as the first electrode 210 , and the relatively low-temperature electrode in the active device 200 is used as the second electrode 220 . For example, the active device 200 can be a metal-oxide-semiconductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor; MOSFET). When the MOSFET works, the temperature of the drain will be higher than the temperature of the source. Therefore, the second One electrode 210 can be a drain and the second electrode 220 can be a source, so the relatively high-temperature drain can be arranged on the first lead frame 300 with a high heat dissipation effect, and the relatively low-temperature source can be arranged on the first lead frame 300 with a relatively low heat dissipation effect. on the lower second lead frame 400 . It should be understood that the above-mentioned MOSFETs are only used for illustration, rather than limiting the active device 200 described in the present invention. In other implementations, the active device 200 can also be other devices, such as: junction field effect transistor (JFET), fin Type Field Effect Transistor (FinFET), or Insulated Gate Bipolar Transistor (IGBT), etc., but the present invention is not limited thereto.

于部分实施方式中,如图1所示,封装结构还可包含第三导线架500,而主动元件200还可包含第三电极230。第三电极230位于主动元件200的第一表面201上。换句话说,第一电极210、第二电极220与第三电极230可位于主动元件200的相同表面上。第三电极230设置于第三导线架500上并电性连接第三导线架500。如此一来,第三电极230可借由第三导线架500实现散热与传递信号的效果。举例来说,主动元件200可为晶体管,而第一电极210可为晶体管的漏极;第二电极220可为晶体管的源极;第三电极230可为晶体管的闸极。In some implementations, as shown in FIG. 1 , the packaging structure may further include a third lead frame 500 , and the active device 200 may further include a third electrode 230 . The third electrode 230 is located on the first surface 201 of the active device 200 . In other words, the first electrode 210 , the second electrode 220 and the third electrode 230 may be located on the same surface of the active device 200 . The third electrode 230 is disposed on the third lead frame 500 and electrically connected to the third lead frame 500 . In this way, the third electrode 230 can achieve the effects of heat dissipation and signal transmission through the third lead frame 500 . For example, the active device 200 can be a transistor, and the first electrode 210 can be the drain of the transistor; the second electrode 220 can be the source of the transistor; and the third electrode 230 can be the gate of the transistor.

于部分实施方式中,第一导线架300、第二导线架400与第三导线架500的材质可为导电材料,以电性连接对应的电极,举例来说,此导电材料可为金属,但本发明并不以此为限。第一导线架300、第二导线架400与第三导线架500互相分隔的,以防止三者电性连接。举例来说,部分封装体100可填于第一导线架300、第二导线架400与第三导线架500之间的间隙中,而将三者隔开。于部分实施方式中,封装体100的材质可为绝缘胶材,例如:高分子胶材,但本发明不以此为限,此绝缘胶材可防止第一导线架300、第二导线架400与第三导线架500电性连接。In some embodiments, the material of the first lead frame 300 , the second lead frame 400 and the third lead frame 500 can be a conductive material to electrically connect the corresponding electrodes. For example, the conductive material can be metal, but The present invention is not limited thereto. The first lead frame 300 , the second lead frame 400 and the third lead frame 500 are separated from each other to prevent the three from being electrically connected. For example, part of the package body 100 can be filled in the gap between the first lead frame 300 , the second lead frame 400 and the third lead frame 500 to separate the three. In some embodiments, the material of the package body 100 can be an insulating adhesive material, such as polymer adhesive material, but the present invention is not limited thereto. The insulating adhesive material can prevent the first lead frame 300 and the second lead frame 400 from It is electrically connected with the third lead frame 500 .

于部分实施方式中,第一电极210与第一导线架300之间可夹有导电胶(未示于图中),因此,第一电极210可借由导电胶与第一导线架300固定并电性连接。相似地,于部分实施方式中,第二电极220与第二导线架400之间可夹有导电胶,使得第二电极220可借由导电胶与第二导线架400固定并电性连接。相似地,于部分实施方式中,第三电极230与第三导线架500之间可夹有导电胶,使得第三电极230可借由导电胶与第三导线架500固定并电性连接。应了解到,上述导电胶仅用以说明电极与导线架的连接方式,并非用以限制本发明,于其他实施方式中,亦可采用不同连接方式来连接电极与导线架,例如:可利用焊锡来连接电极与导线架,但本发明并不以此为限。In some implementations, a conductive glue (not shown in the figure) may be sandwiched between the first electrode 210 and the first lead frame 300, therefore, the first electrode 210 may be fixed to the first lead frame 300 by the conductive glue and electrical connection. Similarly, in some embodiments, conductive glue may be interposed between the second electrode 220 and the second lead frame 400 , so that the second electrode 220 may be fixed and electrically connected to the second lead frame 400 by the conductive glue. Similarly, in some embodiments, conductive glue may be sandwiched between the third electrode 230 and the third lead frame 500 , so that the third electrode 230 may be fixed and electrically connected to the third lead frame 500 through the conductive glue. It should be understood that the above-mentioned conductive glue is only used to illustrate the connection method between the electrode and the lead frame, and is not intended to limit the present invention. In other embodiments, different connection methods can also be used to connect the electrode and the lead frame, for example: solder can be used To connect the electrode and the lead frame, but the present invention is not limited thereto.

图3绘示依据本发明另一实施方式的封装结构的剖面示意图。如图3所示,本实施方式与图2所示实施方式之间的主要差异在于:第一导线架300a与前述第一导线架300不同。具体来说,第一导线架300a包含第一埋入部310a与第一裸露部320a。第一埋入部310a与第一裸露部320a沿着第一电极210与第二电极220的排列方向A所排列的,且第一埋入部310a比第一裸露部320a更靠近第二电极220。第一埋入部310a埋设于封装体100内,而无裸露于封装体100外。第一裸露面301a位于第一裸露部320a,并裸露于封装体100外。FIG. 3 is a schematic cross-sectional view of a package structure according to another embodiment of the present invention. As shown in FIG. 3 , the main difference between this embodiment and the embodiment shown in FIG. 2 is that the first lead frame 300 a is different from the aforementioned first lead frame 300 . Specifically, the first lead frame 300a includes a first embedded portion 310a and a first exposed portion 320a. The first embedded portion 310 a and the first exposed portion 320 a are arranged along the arrangement direction A of the first electrode 210 and the second electrode 220 , and the first embedded portion 310 a is closer to the second electrode 220 than the first exposed portion 320 a. The first embedding portion 310 a is embedded in the package body 100 without being exposed outside the package body 100 . The first exposed surface 301 a is located at the first exposed portion 320 a and is exposed outside the package body 100 .

第一电极210设置于第一埋入部310a与第一裸露部320a上。换句话说,第一电极210朝第一导线架300a的正投影P1会重叠第一埋入部310a与第一裸露部320a。换句话说,第一电极210朝第一导线架300a的正投影P1并非完全位于第一裸露面301a内的。由于第一电极210朝第一导线架300a的正投影P1会重叠第一埋入部310a,且第一埋入部310a埋设于封装体100内,故第一电极210朝第一导线架300a的正投影P1会重叠部分封装体100,也就是说,部分封装体100位于第一电极210的正下方,进一步来说,第一埋入部310a位于该部分封装体100与第一电极210之间。这样的设计可助于封装体100更稳固地固定第一导线架300a。The first electrode 210 is disposed on the first buried portion 310a and the first exposed portion 320a. In other words, the orthographic projection P1 of the first electrode 210 toward the first lead frame 300a will overlap the first embedded portion 310a and the first exposed portion 320a. In other words, the orthographic projection P1 of the first electrode 210 toward the first lead frame 300a is not completely located within the first exposed surface 301a. Since the orthographic projection P1 of the first electrode 210 toward the first lead frame 300a overlaps the first embedding portion 310a, and the first embedding portion 310a is embedded in the package body 100, the orthographic projection of the first electrode 210 toward the first lead frame 300a P1 overlaps part of the package body 100 , that is, part of the package body 100 is located directly below the first electrode 210 , and more specifically, the first embedded portion 310 a is located between the part of the package body 100 and the first electrode 210 . Such a design can help the package body 100 to fix the first lead frame 300a more firmly.

于部分实施方式中,如图3所示,第二导线架400包含第二埋入部410以及第二裸露部420。第二埋入部410与第二裸露部420沿着第一电极210与第二电极220的排列方向A所排列的,且第二埋入部410比第二裸露部420更靠近第一电极210。第二埋入部410埋设于封装体100内,而无裸露于封装体100外。第二裸露面401位于第二裸露部420,而裸露于封装体100外。第二电极220设置于第二埋入部410上。换句话说,第二电极220朝第二导线架400的正投影P2重叠第二埋入部410,且无重叠第二裸露部420。如此一来,第二电极220完全设置于第二埋入部410上。由于第二埋入部410埋设于封装体100内,故第二电极220朝第二导线架400的正投影P2会重叠部分封装体100,也就是说,部分封装体100位于第二电极220的正下方,进一步来说,第二埋入部410位于该部分封装体100与第二电极220之间。这样的设计可助于封装体100更稳固地固定第二导线架400。In some implementations, as shown in FIG. 3 , the second lead frame 400 includes a second buried portion 410 and a second exposed portion 420 . The second buried part 410 and the second exposed part 420 are arranged along the arrangement direction A of the first electrode 210 and the second electrode 220 , and the second buried part 410 is closer to the first electrode 210 than the second exposed part 420 . The second embedded portion 410 is embedded in the package body 100 without being exposed outside the package body 100 . The second exposed surface 401 is located at the second exposed portion 420 and is exposed outside the package body 100 . The second electrode 220 is disposed on the second buried portion 410 . In other words, the orthographic projection P2 of the second electrode 220 toward the second lead frame 400 overlaps the second buried portion 410 and does not overlap the second exposed portion 420 . In this way, the second electrode 220 is completely disposed on the second embedded portion 410 . Since the second embedding portion 410 is embedded in the package body 100 , the orthographic projection P2 of the second electrode 220 toward the second lead frame 400 will overlap part of the package body 100 , that is, part of the package body 100 is located on the front side of the second electrode 220 . Below, more specifically, the second embedded portion 410 is located between the part of the package body 100 and the second electrode 220 . Such a design can help the package body 100 to fix the second lead frame 400 more firmly.

于部分实施方式中,如图3所示,第一埋入部310a具有平行于第一电极210与第二电极220的排列方向A的第一埋入长度L1,第二埋入部410亦具有平行于排列方向A的第二埋入长度L2。第一埋入长度L1小于第二埋入长度L2。换句话说,在平行于排列方向A的维度上,第一埋入部310a比第二埋入部410更短,其可助于第一裸露面301a至第一内边缘211沿着排列方向A的最短距离,小于第二裸露面401至第二内边缘221沿着排列方向A的最短距离,使得第一导线架300a的散热效果高于第二导线架400的散热效果,以将相对易发热的漏极设置于第一导线架300a上,并将相对不易发热的源极设置于第二导线架400上。In some embodiments, as shown in FIG. 3 , the first buried portion 310a has a first buried length L1 parallel to the arrangement direction A of the first electrode 210 and the second electrode 220, and the second buried portion 410 also has a length parallel to the arrangement direction A of the first electrode 210 and the second electrode 220. The second buried length L2 in the alignment direction A. The first buried length L1 is smaller than the second buried length L2. In other words, in the dimension parallel to the arrangement direction A, the first embedded portion 310a is shorter than the second embedded portion 410, which can facilitate the shortest distance between the first exposed surface 301a and the first inner edge 211 along the arrangement direction A. The distance is less than the shortest distance from the second exposed surface 401 to the second inner edge 221 along the arrangement direction A, so that the heat dissipation effect of the first lead frame 300a is higher than that of the second lead frame 400, so that the relatively easy-to-heat drain The electrode is arranged on the first lead frame 300 a, and the source electrode which is relatively less prone to heat is arranged on the second lead frame 400 .

举例来说,第一埋入部310a具有最靠近第二埋入部410的内端面311a,第二埋入部410具有最靠近第一埋入部310a的内端面411。于部分实施方式中,第一埋入部310a的内端面311a与第一电极210的第一内边缘211可实质上对齐,故第一裸露面301a至第一内边缘211沿着排列方向A的最短距离即为第一埋入部310a的第一埋入长度L1。相似地,于部分实施方式中,第二埋入部410的内端面411与第二电极220的第二内边缘221可实质上对齐,故第二裸露面401至第二内边缘221沿着排列方向A的最短距离即为第二埋入部410的第二埋入长度L2。由于第一埋入长度L1小于第二埋入长度L2,故第一裸露面301a至第一内边缘211沿着排列方向A的最短距离,小于第二裸露面401至第二内边缘221沿着排列方向A的最短距离,以利第一导线架300a的散热效果高于第二导线架400的散热效果。For example, the first embedding portion 310 a has an inner end surface 311 a closest to the second embedding portion 410 , and the second embedding portion 410 has an inner end surface 411 closest to the first embedding portion 310 a. In some embodiments, the inner end surface 311a of the first buried portion 310a can be substantially aligned with the first inner edge 211 of the first electrode 210, so the shortest distance from the first exposed surface 301a to the first inner edge 211 along the arrangement direction A The distance is the first embedding length L1 of the first embedding portion 310a. Similarly, in some embodiments, the inner end surface 411 of the second buried portion 410 and the second inner edge 221 of the second electrode 220 can be substantially aligned, so that the second exposed surface 401 to the second inner edge 221 are along the alignment direction The shortest distance of A is the second embedding length L2 of the second embedding portion 410 . Since the first buried length L1 is less than the second buried length L2, the shortest distance from the first exposed surface 301a to the first inner edge 211 along the arrangement direction A is shorter than the shortest distance from the second exposed surface 401 to the second inner edge 221 along the The shortest distance in the arrangement direction A is to facilitate the heat dissipation effect of the first lead frame 300 a to be higher than the heat dissipation effect of the second lead frame 400 .

于部分实施方式中,如图3所示,第一电极210朝第一导线架300a的正投影P1与第一裸露面301a定义第一重叠区域O1。第一重叠区域O1具有平行于第一电极210与第二电极220的排列方向A的第一重叠长度L3。较佳来说,第一重叠长度L3与第一埋入长度L1的比值大于3,以利第一导线架300a对第一电极210的散热。In some embodiments, as shown in FIG. 3 , the orthographic projection P1 of the first electrode 210 toward the first lead frame 300 a and the first exposed surface 301 a define a first overlapping region O1 . The first overlapping region O1 has a first overlapping length L3 parallel to the arrangement direction A of the first electrodes 210 and the second electrodes 220 . Preferably, the ratio of the first overlapping length L3 to the first embedding length L1 is greater than 3, so as to facilitate the heat dissipation of the first electrode 210 by the first lead frame 300a.

图3所示的其他特征与图1及图2相似,故可参酌前述对应的叙述,而不重复叙述。Other features shown in FIG. 3 are similar to those in FIG. 1 and FIG. 2 , so reference can be made to the corresponding descriptions above without repeating the descriptions.

图4绘示依据本发明另一实施方式的封装结构的剖面示意图。如图4所示,本实施方式与图3所示实施方式之间的主要差异在于:第二电极220朝第二导线架400a的正投影P2会重叠第二裸露面401a。换句话说,部分第二裸露面401a位于第二电极220下方。如此一来,第二电极220至第二裸露面401a的热传导路径可被缩短,使得第二电极220的热量可向下传递至第二裸露面401a,从而提升第二导线架400a对第二电极220的散热效果。具体来说,第二电极220设置于第二埋入部410a与第二裸露部420a上。换句话说,第二电极220朝第二导线架400a的正投影P2不仅重叠第二埋入部410,还可重叠第二裸露部420a上的第二裸露面401a,以助于散热。FIG. 4 is a schematic cross-sectional view of a package structure according to another embodiment of the present invention. As shown in FIG. 4 , the main difference between this embodiment and the embodiment shown in FIG. 3 is that the orthographic projection P2 of the second electrode 220 toward the second lead frame 400 a overlaps the second exposed surface 401 a. In other words, part of the second exposed surface 401 a is located under the second electrode 220 . In this way, the heat conduction path from the second electrode 220 to the second exposed surface 401a can be shortened, so that the heat of the second electrode 220 can be transferred downward to the second exposed surface 401a, thereby lifting the second lead frame 400a to the second electrode. 220 cooling effect. Specifically, the second electrode 220 is disposed on the second buried portion 410a and the second exposed portion 420a. In other words, the orthographic projection P2 of the second electrode 220 toward the second lead frame 400a not only overlaps the second embedded portion 410 but also overlaps the second exposed surface 401a on the second exposed portion 420a to facilitate heat dissipation.

于部分实施方式中,如图4所示,第二电极220朝第二导线架400a的正投影P2与第二裸露面401a定义第二重叠区域O2。第二重叠区域O2具有平行于第一电极210与第二电极220的排列方向A的第二重叠长度L4。第一重叠区域O1的第一重叠长度L3大于第二重叠区域O2的第二重叠长度L4。换句话说,第一裸露面301a与第一电极210与的重叠面积大于第二裸露面401a与第二电极220的重叠面积,以利第一导线架300a对第一电极210的散热效果高于第二导线架400a对第二电极220的散热效果。In some embodiments, as shown in FIG. 4 , the orthographic projection P2 of the second electrode 220 toward the second lead frame 400 a and the second exposed surface 401 a define a second overlapping region O2 . The second overlapping region O2 has a second overlapping length L4 parallel to the arrangement direction A of the first electrodes 210 and the second electrodes 220 . The first overlapping length L3 of the first overlapping area O1 is greater than the second overlapping length L4 of the second overlapping area O2. In other words, the overlapping area of the first exposed surface 301a and the first electrode 210 is greater than the overlapping area of the second exposed surface 401a and the second electrode 220, so that the heat dissipation effect of the first lead frame 300a on the first electrode 210 is higher than that of the second exposed surface 401a. The heat dissipation effect of the second lead frame 400 a on the second electrode 220 .

图4所示的其他特征与图1至图3相似,故可参酌前述对应的叙述,而不重复叙述。Other features shown in FIG. 4 are similar to those in FIG. 1 to FIG. 3 , so reference can be made to the corresponding description above, and the description will not be repeated.

图5绘示依据本发明另一实施方式的封装结构的立体示意图。图6绘示图5中沿着6-6’线的剖面图。如图5及图6所示,本实施方式与前述实施方式之间的主要差异在于:于本实施方式中,封装结构还包含散热件600。散热件600连接主动元件200的第二表面202与第三导线架500。如此一来,主动元件200的热量不仅可借由第一表面201上的第一电极210与第二电极220传导给第一导线架300与第二导线架400,还可借由第二表面202上的散热件600传导给第三导线架500。FIG. 5 is a schematic perspective view of a packaging structure according to another embodiment of the present invention. Fig. 6 shows a cross-sectional view along line 6-6' in Fig. 5 . As shown in FIG. 5 and FIG. 6 , the main difference between this embodiment and the previous embodiments is that: in this embodiment, the packaging structure further includes a heat sink 600 . The heat sink 600 connects the second surface 202 of the active device 200 and the third lead frame 500 . In this way, the heat of the active device 200 can not only be conducted to the first lead frame 300 and the second lead frame 400 through the first electrode 210 and the second electrode 220 on the first surface 201 , but also through the second surface 202 The heat sink 600 on the top is conducted to the third lead frame 500 .

进一步来说,如图6所示,散热件600包含相对的第一导热面601以及第二导热面602。第一导热面601朝向主动元件200与第三导线架500,并设置于主动元件200与第三导线架500上。举例来说,封装结构还可包含粘接层710与720。粘接层710粘着于第一导热面601与主动元件200的第二表面202之间。粘接层720粘着于第一导热面601与第三导线架500之间。如此一来,主动元件200的第二表面202上的热量可借由散热件600传导至第三导线架500。于部分实施方式中,第三导线架500具有第三裸露面501。第三裸露面501裸露于封装体100外。如此一来,主动元件200传导至第三导线架500的热量可借由第三裸露面501散逸至外界环境(如空气)中。Further, as shown in FIG. 6 , the heat sink 600 includes a first heat conduction surface 601 and a second heat conduction surface 602 opposite to each other. The first heat conducting surface 601 faces the active device 200 and the third lead frame 500 and is disposed on the active device 200 and the third lead frame 500 . For example, the package structure may further include adhesive layers 710 and 720 . The adhesive layer 710 is adhered between the first heat conducting surface 601 and the second surface 202 of the active device 200 . The adhesive layer 720 is adhered between the first heat conducting surface 601 and the third lead frame 500 . In this way, the heat on the second surface 202 of the active device 200 can be conducted to the third lead frame 500 through the heat sink 600 . In some embodiments, the third lead frame 500 has a third exposed surface 501 . The third exposed surface 501 is exposed outside the package body 100 . In this way, the heat conducted from the active device 200 to the third lead frame 500 can be dissipated into the external environment (such as air) through the third exposed surface 501 .

图5及图6所示的其他特征与图1至图4相似,故可参酌前述对应的叙述,而不重复叙述。Other features shown in FIG. 5 and FIG. 6 are similar to those in FIG. 1 to FIG. 4 , so reference can be made to the corresponding description above, and the description will not be repeated.

图7绘示依据本发明另一实施方式的封装结构的剖面示意图。如图7所示,本实施方式与图6所示实施方式之间的主要差异在于:散热件600a的第二导热面602a裸露于封装体100外。如此一来,主动元件200传导至散热件600a的热量不仅可传导至第三导线架500,还可借由第二导热面602散逸至外界环境(如空气)中。图7所示的其他特征与图1至图6相似,故可参酌前述对应的叙述,而不重复叙述。FIG. 7 is a schematic cross-sectional view of a package structure according to another embodiment of the present invention. As shown in FIG. 7 , the main difference between this embodiment and the embodiment shown in FIG. 6 is that: the second heat conducting surface 602 a of the heat sink 600 a is exposed outside the package 100 . In this way, the heat transferred from the active component 200 to the heat sink 600 a can not only be transferred to the third lead frame 500 , but also be dissipated into the external environment (such as air) through the second heat transfer surface 602 . Other features shown in FIG. 7 are similar to those in FIG. 1 to FIG. 6 , so reference can be made to the corresponding description above, and the description will not be repeated.

虽然本发明已以实施方式揭露如上,然其并非用以限定本发明,任何熟习此技艺者,在不脱离本发明的精神和范围内,当可作各种的改动与润饰,因此本发明的保护范围当视后附的权利要求书所界定为准。Although the present invention has been disclosed above in terms of implementation, it is not intended to limit the present invention. Anyone skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall prevail as defined by the appended claims.

Claims (10)

1.一种封装结构,包含:1. A packaging structure, comprising: 一封装体;a package; 一主动元件,封装于该封装体内,该主动元件包含一第一电极以及一第二电极;An active element packaged in the package, the active element including a first electrode and a second electrode; 一第一导线架,该第一电极设置于该第一导线架上,并电性连接该第一导线架,该第一导线架具有一第一裸露面,该第一裸露面与该第一电极分别位于该第一导线架的相反侧,该第一裸露面裸露于该封装体外;以及A first lead frame, the first electrode is arranged on the first lead frame and electrically connected to the first lead frame, the first lead frame has a first exposed surface, the first exposed surface and the first exposed surface The electrodes are respectively located on opposite sides of the first lead frame, and the first exposed surface is exposed outside the package; and 一第二导线架,该第二电极设置于该第二导线架上,并电性连接该第二导线架,该第二导线架具有一第二裸露面,该第二裸露面与该第二电极分别位于该第二导线架的相反侧,该第二裸露面裸露于该封装体外;A second lead frame, the second electrode is arranged on the second lead frame and electrically connected to the second lead frame, the second lead frame has a second exposed surface, the second exposed surface and the second exposed surface The electrodes are respectively located on opposite sides of the second lead frame, and the second exposed surface is exposed outside the package; 其中该第一电极至该第二电极的最短距离小于该第一裸露面至该第二裸露面的最短距离。Wherein the shortest distance from the first electrode to the second electrode is smaller than the shortest distance from the first exposed surface to the second exposed surface. 2.如权利要求1所述的封装结构,其中该第一电极朝该第一导线架的正投影重叠该第一裸露面。2. The package structure of claim 1, wherein an orthographic projection of the first electrode toward the first lead frame overlaps the first exposed surface. 3.如权利要求1所述的封装结构,其中该第二电极朝该第二导线架的正投影不重叠该第二裸露面。3. The package structure of claim 1, wherein an orthographic projection of the second electrode toward the second lead frame does not overlap the second exposed surface. 4.如权利要求1所述的封装结构,其中该第一电极朝该第一导线架的正投影与该第一裸露面定义一第一重叠区域,该第二电极朝该第二导线架的正投影与该第二裸露面定义一第二重叠区域,该第一电极与该第二电极沿着一排列方向所排列,该第一重叠区域具有平行于该排列方向的一第一重叠长度,该第二重叠区域具有平行于该排列方向的一第二重叠长度,该第一重叠长度大于该第二重叠长度。4. The package structure according to claim 1, wherein an orthographic projection of the first electrode toward the first lead frame and the first exposed surface define a first overlapping area, and the second electrode toward the second lead frame The orthographic projection and the second exposed surface define a second overlapping area, the first electrode and the second electrode are arranged along an alignment direction, the first overlapping area has a first overlapping length parallel to the alignment direction, The second overlapping region has a second overlapping length parallel to the arrangement direction, and the first overlapping length is greater than the second overlapping length. 5.如权利要求1所述的封装结构,其中该第一电极具有最靠近该第二电极的一第一内边缘,该第二电极具有最靠近该第一电极的一第二内边缘,该第一电极与该第二电极沿着一排列方向所排列,该第一裸露面至该第一内边缘沿着该排列方向的最短距离,小于该第二裸露面至该第二内边缘沿着该排列方向的最短距离。5. The package structure according to claim 1, wherein the first electrode has a first inner edge closest to the second electrode, the second electrode has a second inner edge closest to the first electrode, the The first electrode and the second electrode are arranged along an arrangement direction, and the shortest distance from the first exposed surface to the first inner edge along the arrangement direction is smaller than the distance from the second exposed surface to the second inner edge along the arrangement direction. The shortest distance in the alignment direction. 6.如权利要求1所述的封装结构,其中该第一导线架包含一第一埋入部以及一第一裸露部,该第一电极与该第二电极沿着一排列方向所排列,该第一埋入部与该第一裸露部沿着该排列方向所排列,且该第一埋入部比该第一裸露部更靠近该第二电极,该第一电极朝该第一导线架的正投影重叠该第一埋入部与该第一裸露部,该第一埋入部埋设于该封装体内,该第一裸露面位于该第一裸露部。6. The package structure according to claim 1, wherein the first lead frame comprises a first embedded portion and a first exposed portion, the first electrode and the second electrode are arranged along an arrangement direction, the first An embedded portion and the first exposed portion are arranged along the arrangement direction, and the first embedded portion is closer to the second electrode than the first exposed portion, and the first electrode overlaps with the orthographic projection of the first lead frame The first embedded portion and the first exposed portion, the first embedded portion is embedded in the package, and the first exposed surface is located at the first exposed portion. 7.如权利要求6所述的封装结构,其中该第二导线架包含一第二埋入部以及一第二裸露部,该第二埋入部与该第二裸露部沿着该排列方向所排列,且该第二埋入部比该第二裸露部更靠近该第一电极,该第二电极朝该第二导线架的正投影重叠该第二埋入部,该第二埋入部埋设于该封装体内,该第二裸露面位于该第二裸露部,其中该第一埋入部具有平行于该排列方向的一第一埋入长度,该第二埋入部具有平行于该排列方向的一第二埋入长度,该第一埋入长度小于该第二埋入长度。7. The package structure according to claim 6, wherein the second lead frame comprises a second embedded portion and a second exposed portion, the second embedded portion and the second exposed portion are arranged along the alignment direction, and the second embedded portion is closer to the first electrode than the second exposed portion, the second electrode overlaps the second embedded portion toward the orthographic projection of the second lead frame, and the second embedded portion is embedded in the package, The second exposed surface is located at the second exposed portion, wherein the first buried portion has a first buried length parallel to the alignment direction, and the second buried portion has a second buried length parallel to the aligned direction , the first buried length is smaller than the second buried length. 8.如权利要求1所述的封装结构,其中该第一电极为一漏极,该第二电极为一源极。8. The package structure of claim 1, wherein the first electrode is a drain, and the second electrode is a source. 9.如权利要求1所述的封装结构,还包含一散热件以及一第三导线架,其中该主动元件包含一第三电极以及相对的一第一表面及一第二表面,该第一电极、该第二电极与该第三电极位于该第一表面,该第三电极设置于该第三导线架上,该散热件连接该主动元件的该第二表面与该第三导线架。9. The package structure according to claim 1, further comprising a heat sink and a third lead frame, wherein the active device comprises a third electrode and a first surface and a second surface opposite, the first electrode , the second electrode and the third electrode are located on the first surface, the third electrode is disposed on the third lead frame, and the heat sink is connected to the second surface of the active element and the third lead frame. 10.如权利要求9所述的封装结构,其中该散热件具有相对的一第一导热面以及一第二导热面,该第一导热面朝向该主动元件,该第二导热面裸露于该封装体外。10. The package structure according to claim 9, wherein the heat sink has a first heat conduction surface and a second heat conduction surface opposite, the first heat conduction surface faces the active element, and the second heat conduction surface is exposed on the package in vitro.
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