CN106549023B - Array substrate, display panel and display device - Google Patents

Abstract

In the array substrate, display panel, and display device provided by the embodiments of the present invention, the data line group located between two adjacent columns of pixel units includes a first data line and a second data line, and the first data line and the second data line are in different layers. , in adjacent data line groups, the first data line of a data line group is electrically connected to the pixel unit on the first side of the data line group, and the second data line is electrically connected to the pixel unit on the second side of the data line group; The first data line of a data line group is electrically connected to the pixel unit on the second side of the data line group, the second data line is electrically connected to the pixel unit on the first side of the data line group, and the first side is opposite to the second side The polarity of the signal transmitted by the adjacent first data line and the adjacent second data line can be reversed, so as to avoid the crosstalk caused by the signals of the same polarity transmitted by the data lines of the same layer to the common electrode.

Description

Array substrate, display panel and display device

technical field

The present invention relates to the technical field of liquid crystal display, and more specifically, to an array substrate, a display panel and a display device.

Background technique

Due to the advantages of low radiation, small size and low power consumption, liquid crystal display devices have been widely used in people's life and work, such as notebook computers, personal digital assistants, flat-screen TVs, mobile phones and other electronic devices.

There are many types of liquid crystal display devices in the prior art. In a touch display device with an embedded touch structure, it generally includes a plurality of pixel units arranged in an array, and a set of data is set between two adjacent columns of pixel units. The line group, the data line group includes a first data line and a second data line that are oppositely arranged and located on different layers, the first data line is electrically connected to the pixel unit on the first side of the data line group, and the second data line is connected to the second data line group The pixel units on both sides are electrically connected.

As shown in Figure 1, the pixel units 101 are arranged in an array, and a data line group is provided between two adjacent columns of pixel units, and the data line group includes a first data line 102 and a second data line 103 that are oppositely arranged and located on different layers. , wherein the first data line 102 is electrically connected to the pixel units on the left side of the data line group, and the second data line 103 is electrically connected to the pixel units on the right side of the data line group.

However, the display effect of the liquid crystal display device with this structure is not good.

Contents of the invention

In view of this, the present invention provides an array substrate, a display panel and a display device, which improve the display effect of the display device.

To achieve the above object, the present invention provides the following technical solutions:

An array substrate, comprising:

Substrate;

a plurality of pixel units arranged in an array on the substrate;

A plurality of data line groups located on the substrate, the data line groups include first data lines and second data lines oppositely arranged, and the first data lines and the second data lines are of different layers;

The data line group is located between two adjacent columns of pixel units, and the adjacent data line groups include two columns of the pixel units;

Among the adjacent data line groups, the first data line of a data line group is electrically connected to the pixel unit on the first side of the data line group, and the second data line is connected to the second side of the data line group. The pixel unit is electrically connected; the first data line of another data line group is electrically connected to the pixel unit on the second side of the data line group, and the second data line is electrically connected to the first side of the data line group The pixel units are electrically connected, and the first side and the second side are two opposite sides;

Wherein, the polarities of the signals transmitted by the adjacent first data lines are opposite; the polarities of the signals transmitted by the first data lines and the second data lines in the same data line group are opposite.

Optionally, orthographic projections of the first data line and the second data line in the data line group on the substrate at least partially overlap.

Optionally, the array substrate includes a common electrode layer, and the common electrode layer includes a plurality of electrode units arranged in an array, and the electrode units are used as touch electrodes in the touch sensing stage and used as the pixel electrodes in the display stage. common electrode of the unit.

Optionally, the array substrate includes touch electrode lines arranged in parallel with the first data lines, and the touch electrode lines are electrically connected to the electrode units.

Optionally, the touch electrode lines are on the same layer as the first data lines, and the touch electrode lines are located between adjacent first data lines.

Optionally, the touch electrode lines are on the same layer as the second data lines, and the touch electrode lines are located between adjacent second data lines.

Optionally, a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer, a third conductive layer and a third insulating layer are sequentially arranged between the substrate and the common electrode layer;

The first conductive layer is provided with a plurality of gates and a plurality of gate lines corresponding to the pixel units;

The first data line is provided in the second conductive layer;

The second insulating layer is provided with a plurality of first via holes penetrating through the second insulating layer;

The second data line is provided in the third conductive layer, and the second data line is electrically connected to the corresponding pixel unit through the first via hole.

Optionally, when the touch electrode lines are on the same layer as the second data lines,

The third insulating layer is provided with a plurality of second via holes penetrating through the third insulating layer;

The touch electrode lines are electrically connected to the electrode units through the second via holes.

Optionally, when the touch electrode lines are on the same layer as the first data lines;

The second insulating layer is provided with a plurality of third via holes penetrating through the second insulating layer;

The third insulating layer is provided with a plurality of fourth via holes penetrating the third insulating layer, and the third via holes are arranged opposite to the fourth via holes;

The touch electrode line is electrically connected to the electrode unit through the third via hole and the fourth via hole.

Optionally, a first semiconductor layer is included between the first insulating layer and the second conductive layer;

The first semiconductor layer is provided with an active area corresponding to the gate, and the active area is electrically connected to the first data line.

Optionally, a second semiconductor layer is included between the first conductive layer and the substrate;

The second semiconductor layer is provided with an active region corresponding to the gate;

The first insulating layer is provided with a plurality of fifth via holes penetrating through the first insulating layer;

The active area is electrically connected to the first data line through the fifth via hole.

A display panel, comprising: the above-mentioned array substrate; and a cover plate opposite to the array substrate.

Optionally, the display panel is a liquid crystal display panel, and the cover plate is a color filter substrate.

Optionally, the display panel is an OLED display panel, and the cover plate is an opposite substrate.

A display device includes: the above-mentioned display panel.

Compared with the prior art, the technical solution provided by the present invention has the following advantages:

In the array substrate, display panel, and display device provided by the embodiments of the present invention, the data line group located between two adjacent columns of pixel units includes a first data line and a second data line, and the first data line and the second data line are in different layers. , in adjacent data line groups, the first data line of a data line group is electrically connected to the pixel unit on the first side of the data line group, and the second data line is electrically connected to the pixel unit on the second side of the data line group; The first data line of a data line group is electrically connected to the pixel unit on the second side of the data line group, the second data line is electrically connected to the pixel unit on the first side of the data line group, and the first side is opposite to the second side The polarity of the signal transmitted by the adjacent first data line and the adjacent second data line can be reversed, so as to avoid crosstalk caused by signals of the same polarity transmitted by the data lines of the same layer to the common electrode.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only It is an embodiment of the present invention, and those skilled in the art can also obtain other drawings according to the provided drawings without creative work.

FIG. 1 is a schematic plan view of an array substrate in the prior art;

FIG. 2 is a schematic plan view of an array substrate in an embodiment of the present invention;

FIG. 3 is a cross-sectional view of an array substrate in an embodiment of the present invention;

FIG. 4 is a cross-sectional view of an array substrate in another embodiment provided by the present invention;

FIG. 5 is a cross-sectional view of an array substrate in another embodiment provided by the present invention;

FIG. 6 is a structural diagram of a display panel in an embodiment provided by the present invention;

FIG. 7 is a structural diagram of an OLED display panel in an embodiment provided by the present invention;

FIG. 8 is a structural diagram of a display device in an embodiment provided by the present invention.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

In the following description, a lot of specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways different from those described here, and those skilled in the art can do it without departing from the meaning of the present invention. By analogy, the present invention is therefore not limited to the specific examples disclosed below.

Secondly, the present invention is described in detail in conjunction with the schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the schematic diagrams showing the structure of the device will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the present invention. scope of invention protection. In addition, the three-dimensional space dimensions of length, width and depth should be included in actual production.

As mentioned in the background technology, in the touch display device with an in-cell touch structure, it includes a plurality of pixel units 101 arranged in an array, and a data line group is arranged between two adjacent rows of pixel units, and the data line group includes opposite The first data line 102 and the second data line 103 are arranged and located on different layers, wherein the first data line 102 is electrically connected to the pixel unit on the left side of the data line group, and the second data line 103 is electrically connected to the pixel unit on the right side of the data line group The unit is electrically connected. However, the display effect of the liquid crystal display device with this structure is not good.

The inventors found that when the touch display device with this structure adopts the column reverse driving method for display driving, multiple first data lines on the same layer are simultaneously connected to a voltage with the same polarity, such as a positive voltage, and are located on the same layer. A plurality of second data lines on the layer are simultaneously connected to a voltage of the same polarity, for example, a negative voltage, and connected to a common signal at the common electrode. At this time, the data line layer close to the common electrode layer (the conductive layer where the first data line or the second data line is located) will form a capacitor with the common electrode, and the data line layer close to the common electrode layer will be the conductive layer where the first data line is located. layer as an example, when the voltage of the first data line changes, it will affect the potential of the common electrode, causing the potential of the common electrode to rise or fall. Specifically, if the ideal potential of the common electrode is 0, when the voltages of the first data lines DATA1 and DATA3 become positive voltages, the first data lines of the entire layer act as a capacitive plate, so that the corresponding common electrodes generate positive potentials, This causes the potential of the common electrode to rise. At this time, the positive potential of the pixel electrode and the electric field generated by the common electrode will be smaller than the electric field generated by the negative potential of the pixel electrode and the common electrode. That is to say, the electric field driving the liquid crystal rotation becomes uneven, further causing the display screen The uneven brightness in the display affects the display effect of the display device.

Similarly, when the voltages of the first data lines DATA1 and DATA3 become negative voltages, the first data lines of the entire layer act as a capacitive plate, causing the corresponding common electrodes to generate negative potentials, thereby causing the potentials of the common electrodes to move down. The positive potential of the pixel electrode and the electric field generated by the common electrode are greater than the negative potential of the pixel electrode and the electric field generated by the common electrode, which affects the display effect of the display device.

Similarly, if the data line layer close to the common electrode layer is the conductive layer where the second data line is located, the same problem will also occur.

In view of this, an embodiment of the present invention provides an array substrate, including: a substrate; a plurality of pixel units arranged in an array on the substrate; a plurality of data line groups on the substrate, the data line The group includes a first data line and a second data line oppositely arranged, and the first data line and the second data line are of different layers;

The data line group is located between two adjacent columns of pixel units, and there are two columns of the pixel units between the adjacent data line groups; in the adjacent data line groups, the first data line group of a data line group A data line is electrically connected to the pixel unit on the first side of the data line group, and the second data line is electrically connected to the pixel unit on the second side of the data line group; A data line is electrically connected to the pixel unit on the second side of the data line group, the second data line is electrically connected to the pixel unit on the first side of the data line group, and the first side is connected to the second side of the data line group. The two sides are opposite sides;

Wherein, the polarities of the signals transmitted by the adjacent first data lines are opposite; the polarities of the signals transmitted by the first data lines and the second data lines in the same data line group are opposite.

In an embodiment of the present invention, the pixel unit includes at least a thin film transistor, and the thin film transistor includes at least a gate and an active area corresponding to the gate, wherein the active area can be divided into a source area and a drain area. Wherein, the gate is connected to the gate line, and the extending direction of the gate line is perpendicular to the extending direction of the data line. One of the source region or the drain region is connected to the pixel electrode of the array substrate, and the other is connected to the first data line or the second data line in the data line group.

Wherein, the data line group includes a first data line and a second data line oppositely arranged, and the first data line and the second data line are of different layers. Specifically, the first data line may be located on the upper layer of the second data line, or located on the lower layer of the second data line, those skilled in the art can make corresponding settings on the basis of the disclosure of the present invention, and the present invention does not refer to Make specific restrictions.

In the embodiment of the present invention, the data line group is located between two adjacent columns of pixel units, and there are two columns of the pixel units between the adjacent data line groups, so that one column of pixel units corresponds to one data line .

Moreover, among the adjacent data line groups, the first data line of a data line group is electrically connected to the pixel unit on the first side of the data line group, and the second data line is connected to the second data line group of the data line group. The pixel units on the two sides are electrically connected; the first data line of another data line group is electrically connected to the pixel unit on the second side of the data line group, and the second data line is electrically connected to the second data line group. The pixel units on one side are electrically connected, and the first side and the second side are two opposite sides, so that the first data lines in adjacent data line groups are alternately connected to the pixel units on different sides, and then can During the display driving process of the display device, the polarity of the signal transmitted by the adjacent first data line is reversed, that is, the positive/negative voltage of the entire surface does not change on the conductive layer where the first data line is arranged, The polarities of the signals transmitted by the first data line and the second data line in the same data line group are opposite, that is, no positive/negative voltage on the entire surface will appear on the conductive layer where the second data line is arranged. Changes, thereby avoiding the influence of the conductive layer of the first data line or the second data line on the potential of the common electrode, that is, avoiding the crosstalk caused by the same layer of data lines transmitting signals with the same polarity to the common electrode.

Furthermore, the present invention also provides a display panel and a display device including the above-mentioned array substrate, so that the polarity of the signal transmitted by the adjacent first data line or the adjacent second data line can be reversed, thereby avoiding the same-layer data The crosstalk caused by signals of the same polarity transmitted by the wires to the common electrode.

The above is the basic idea of the present application. In order to make the technical solutions provided by the embodiments of the present invention clearer, the above technical solutions of the present invention will be described in detail below.

An embodiment of the present invention provides an array substrate, as shown in FIGS. 2-3 , wherein FIG. 2 is a schematic plan view of the array substrate in this embodiment, and FIG. 3 is a cross-sectional view of the array substrate in this embodiment. It should be noted that, in order to show the electrical connection structure of the first data line 202 and the second data line 203, the first data line 202 and the second data line 203 located in different layers are simultaneously shown in FIG. A data line 202 and a second data line 203 are shown as two non-overlapping straight lines. In an actual structure, the first data line 202 and the second data line 203 are in different layers, and the first data line 202 and the second data line 203 The orthographic projections on the substrate may or may not overlap. Specifically, the array substrate includes:

The substrate 200, wherein the substrate 200 may be a glass substrate or a plastic substrate.

A plurality of pixel units 201 arranged in an array on the substrate 200 , wherein the pixel units 201 at least include a thin film transistor, and the thin film transistor at least includes a gate 204 , a source region 205 and a drain region 206 . Wherein, the gate 205 is correspondingly connected to the gate lines (GATE1, GATE2, GATE3 and GATE4), and the extension direction of the gate lines (GATE1, GATE2, GATE3 and GATE4) is the same as the extension direction of the data lines (DATA1, DATA2, DATA3 and DATA4). Direction is vertical. One of the source region 205 or the drain region 206 is connected to the pixel electrode 207 of the array substrate, and the other is connected to the first data line 202 or the second data line 203 in the data line group.

During the display driving process, the gate line is scanned row by row, so that the source and drain regions of the corresponding thin film transistor are turned on, and the data line inputs the corresponding electrical signal, so that the pixel electrode 207 electrically connected to the thin film transistor transmits the corresponding signal, Furthermore, an electric field is generated with the common electrode to drive the liquid crystal to flip.

In this embodiment, the data lines used to transmit signals are divided into first data lines 202 and second data lines 203, wherein the first data lines 202 and the second data lines 203 are of different layers; The data lines 202 and the second data lines 203 form a data line group, and multiple data line groups are located on the substrate 200 .

Specifically, the data line group is located between two adjacent columns of pixel units, and there are two columns of the pixel units between the adjacent data line groups, so that one column of pixel units corresponds to one data line.

And among the adjacent data line groups, the first data line 202 of a data line group is electrically connected to the pixel unit 201a on the first side of the data line group, and the second data line 203 is connected to the data line The pixel unit 201b on the second side of the group is electrically connected; the first data line 202 of another data line group is electrically connected to the pixel unit 201b on the second side of the data line group, and the second data line 203 It is electrically connected to the pixel unit 201a on the first side of the data line group, and the first side and the second side are two opposite sides. In this embodiment, the first side is the left side and the second side is the right side.

Taking FIG. 2 as an example, adjacent data line groups may include data line group A composed of DATA1 and DATA2 and data line group B composed of DATA3 and DATA4, wherein DATA1 and DATA3 are the first data lines 202, and DATA2 and DATA4 are The second data line 203 . In the display driving process, especially in the column-inverted driving process, the gate lines are scanned row by row, so that the source/drain regions of the corresponding thin film transistors are turned on, for example, at a certain moment, to the data line group A DATA1 inputs a positive voltage, DATA2 inputs a negative voltage, and when inputting a signal to the data line group B, it is necessary to input a negative voltage to DATA3, and a positive voltage to DATA4, so that the current polarity of any two adjacent columns of pixel units is opposite.

Since the first data line and the second data line are in different layers, in the same layer, the signal polarities transmitted by adjacent first data lines are opposite; and in the same data line group, the first data line and the second data line The polarity of the signal transmitted by the data line is opposite, thereby avoiding that the positive/negative voltage on the entire surface does not appear on the conductive layer where the first data line is arranged; the first data line and the said first data line in the same data line group The polarity of the signal transmitted by the second data line is opposite, that is, no positive positive/negative voltage will appear on the conductive layer of the second data line, thereby avoiding the common The influence of the electrode potential, that is, avoiding the crosstalk caused by the signals of the same polarity transmitted by the data lines of the same layer to the common electrodes.

Moreover, in this embodiment, in order to ensure the maximum effective display area of the display area of the array substrate, the orthographic projections of the first data line 202 and the second data line 203 in the data line group on the substrate are at least partially intersected. stack. In other embodiments of the present invention, the orthographic projections of the first data line 202 and the second data line 203 in the data line group on the substrate can also be set to completely overlap, so as to avoid a large gap between pixel units.

In this embodiment, the array substrate includes a common electrode layer, and the common electrode layer includes a plurality of electrode units 208 arranged in an array. The electrode units 208 are used as touch electrodes in the touch sensing stage, and used as as the common electrode of the pixel unit. It can be seen that, in this embodiment, the electrode unit 208 of the common electrode layer is multiplexed as the common electrode and the touch electrode at the same time, so as to avoid increasing the thickness of the array substrate while increasing the touch function.

Further, in this embodiment, the array substrate includes touch electrode lines 209 arranged in parallel with the first data lines 202 , and the touch electrode lines 209 are electrically connected to the electrode unit 208 . Wherein, the touch electrode lines 209 are used to transmit electrical signals to the electrode unit 208 .

Wherein, in this embodiment, the touch electrode lines 209 are on the same layer as the second data lines 203 , and the touch electrode lines 209 are located between adjacent second data lines 203 . Wherein, referring to FIG. 3 , it can be seen that the touch electrode lines 209 are located between two columns of pixel units 201b and 201a between adjacent data line groups.

In other embodiments of the present invention, as shown in FIG. 4 , the touch electrode lines 209 and the first data lines 202 may be arranged on the same layer, and the touch electrode lines 209 are located between adjacent first data lines 202 .

Moreover, in order to describe the structure of the array substrate in this embodiment in detail, the array substrate is described in layers, and the first conductive layer 210 and the first insulating layer are sequentially arranged between the substrate 200 and the common electrode layer. 210', the second conductive layer 220, the second insulating layer 220', the third conductive layer 230 and the third insulating layer 230'.

Wherein, the first conductive layer 210 is provided with a plurality of gates 204 and a plurality of gate lines (GATE1, GATE2, GATE3 and GATE4) corresponding to the pixel units;

Wherein, the first data lines 202 (DATA1 and DATA3) are provided in the second conductive layer 220; wherein, adjacent first data lines are respectively connected to source (drain) regions 205 (206) on different sides, in this case In the embodiment, the first data line DATA1 in the data line group A is connected to the source/drain region 205 (206) on the left side, and the first data line DATA3 in the data line group B is connected to the source/drain region 205 (206) on the right side. ).

Moreover, a first semiconductor layer 240 is included between the first insulating layer 210' and the second conductive layer 220; the first semiconductor layer 240 is provided with an active region 214 corresponding to the gate, and the active region 214 is divided into a source region 205 and a drain region 206 for forming a transistor structure.

As shown in FIG. 3 , the second insulating layer is provided with a plurality of first via holes 216 penetrating through the second insulating layer, wherein the first via holes 216 are used to electrically connect the source in the corresponding pixel unit. /drain region 205 (206) to the second data line 203.

The second data line 203 is disposed in the third conductive layer 230 , and the second data line is electrically connected to the source region or the drain region 205 ( 206 ) of the corresponding pixel unit through the first via hole 216 .

Wherein, in this embodiment, as shown in FIG. 3 , the touch electrode lines 209 are on the same layer as the second data lines 203, and the third insulating layer is provided with a plurality of holes penetrating through the third insulating layer. The second via hole 211 ; the touch electrode line 209 is electrically connected to the electrode unit 208 through the second via hole 211 . By arranging the touch electrode lines and the second data lines in the same layer, the touch electrode lines can be formed at the same time as the second data lines, thereby simplifying the process.

In other embodiments of the present invention, the touch electrode lines and the first data lines may also be set in the same layer. At this time, as shown in FIG. 4 , the second insulating layer is provided with a plurality of The third via hole 212 of the second insulating layer; the third insulating layer is provided with a plurality of fourth via holes 213 penetrating through the third insulating layer, and the third via hole 212 and the fourth via hole 213 are disposed opposite to each other; the touch electrode line 209 is electrically connected to the electrode unit 208 through the third via hole 212 and the fourth via hole 213 . Similarly, by arranging the touch electrode lines in the same layer as the first data lines, the touch electrode lines can be formed at the same time as the first data lines, thereby simplifying the process.

It should be noted that the transistors in the array substrate in this embodiment are transistors with a bottom-gate structure. In other embodiments of the present application, the transistor may also be a top-gate transistor.

Specifically, as shown in FIG. 5, a second semiconductor layer 250 is included between the first conductive layer and the substrate, and the second semiconductor layer is provided with an active region 214 corresponding to the gate; The first insulating layer is provided with a plurality of fifth via holes 215 penetrating through the first insulating layer, and the active region 214 is electrically connected to the first data line through the fifth via holes.

In the array substrate provided by the embodiment of the present invention, among the adjacent data line groups, the first data line of a data line group is electrically connected to the pixel unit on the first side of the data line group, and the second The data line is electrically connected to the pixel unit on the second side of the data line group; the first data line of another data line group is electrically connected to the pixel unit on the second side of the data line group, and the second The data lines are electrically connected to the pixel units on the first side of the data line group, and the first side and the second side are opposite sides, so that the first data lines in adjacent data line groups are alternately connected to the pixel units. For the pixel units on different sides, during the display driving process of the display device, the polarity of the signal transmitted by the adjacent first data line can be reversed, that is, the entire surface will not appear on the conductive layer where the first data line is arranged. Positive/negative voltage, the polarity of the signal transmitted by the first data line and the second data line in the same data line group is opposite, that is, no full voltage will appear on the conductive layer where the second data line is arranged. The positive/negative voltage of the surface, thereby avoiding the influence of the conductive layer of the first data line and the adjacent second data line on the potential of the common electrode, that is, avoiding the common electrode caused by the signal of the same polarity transmitted by the data line of the same layer crosstalk.

In an embodiment of the present invention, a liquid crystal display panel is provided, as shown in FIG. 6 , including the array substrate 310 in the above embodiment, and a cover plate 320 disposed opposite to the array substrate.

Wherein, in this embodiment, the display panel is a liquid crystal display panel, the cover plate 320 is a color filter substrate, and a liquid crystal layer is included between the array substrate 310 and the cover plate 320 .

In other embodiments of the present invention, an OLED display panel is provided, as shown in FIG. 7 , including the array substrate 410 in the above embodiments, and a cover plate 430 disposed opposite to the array substrate. Wherein, the cover plate is the opposite substrate 430 , and the display device 420 is included between the array substrate 410 and the opposite substrate 430 .

In the array substrate of the display panel provided by the embodiment of the present invention, among the adjacent data line groups, the first data line of a data line group is electrically connected to the pixel unit on the first side of the data line group, The second data line is electrically connected to the pixel unit on the second side of the data line group; the first data line of another data line group is electrically connected to the pixel unit on the second side of the data line group, The second data line is electrically connected to the pixel unit on the first side of the data line group, and the first side and the second side are opposite sides, so that the first data in the adjacent data line group The lines are alternately connected to the pixel units on different sides thereof, so that during the display driving process of the display device, the polarity of the signals transmitted by the adjacent first data lines can be reversed, that is, there is no Positive/negative voltages will appear on the entire surface, and the polarities of the signals transmitted by the first data line and the second data line in the same data line group are opposite, that is, on the conductive layer where the second data line is arranged There will be no positive/negative voltage on the entire surface, thereby avoiding the influence of the conductive layer of the first data line and the adjacent second data line on the potential of the common electrode, that is, avoiding the transmission of signal pairs with the same polarity by the data line of the same layer Crosstalk caused by common electrodes.

In another embodiment of the present invention, a display device is provided, as shown in FIG. 8 , comprising: the display panel 500 described in the above embodiments.

In the array substrate of the display device provided by the embodiment of the present invention, among the adjacent data line groups, the first data line of a data line group is electrically connected to the pixel unit on the first side of the data line group, The second data line is electrically connected to the pixel unit on the second side of the data line group; the first data line of another data line group is electrically connected to the pixel unit on the second side of the data line group, The second data line is electrically connected to the pixel unit on the first side of the data line group, and the first side and the second side are opposite sides, so that the first data in the adjacent data line group The lines are alternately connected to the pixel units on different sides thereof, so that during the display driving process of the display device, the polarity of the signals transmitted by the adjacent first data lines can be reversed, that is, there is no Positive/negative voltages will appear on the entire surface, and the polarities of the signals transmitted by the first data line and the second data line in the same data line group are opposite, that is, on the conductive layer where the second data line is arranged There will be no positive/negative voltage on the entire surface, thereby avoiding the influence of the conductive layer of the first data line and the adjacent second data line on the potential of the common electrode, that is, avoiding the transmission of signal pairs with the same polarity by the data line of the same layer Crosstalk caused by common electrodes.

Each embodiment in this specification is described in a progressive manner, each embodiment focuses on the difference from other embodiments, and the same and similar parts of each embodiment can be referred to each other. As for the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and for the related information, please refer to the description of the method part.

The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention will not be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (15)

1. a kind of array substrate characterized by comprising

Substrate；

The pixel unit of multiple array arrangements on the substrate；

Multiple data line groups on the substrate, the data line group include the first data line being oppositely arranged and the second number According to line, first data line and the second data line different layers；

The data line group includes the two column pictures between the adjacent data line group between adjacent two column pixel unit Plain unit；

In the adjacent data line group, first data line of a data line group and the pixel of first side of data line group Unit electrical connection, second data line are electrically connected with the pixel unit of the data line group second side；Another data line group First data line be electrically connected with the pixel unit of the data line group second side, second data line and the data The pixel unit of the first side of line group is electrically connected, and first side and described second side are opposite two sides；

Wherein, the first data line of the adjacent data line group and the sequence of the second data line are the same, and the adjacent number Refer to phase the same side according to the first side of line group；

The signal polarity of the adjacent first data line transmission is opposite；First data line in the same data line group and The signal polarity of the second data line transmission is opposite.

2. array substrate according to claim 1, which is characterized in that first data line in the data line group and The orthographic projection of second data line on the substrate is at least partly overlapping.

3. array substrate according to claim 1, which is characterized in that the array substrate includes common electrode layer, described Common electrode layer includes the multiple electrodes unit of array arrangement, and the electrode unit is used as touch control electrode in the touch sensible stage, It is used as the public electrode of the pixel unit in the display stage.

4. array substrate according to claim 3, which is characterized in that the array substrate includes and first data line The touch control electrode line of arranged in parallel, the touch control electrode line are electrically connected with the electrode unit.

5. array substrate according to claim 4, which is characterized in that the touch control electrode line and first data line are same Layer, the touch control electrode line is between adjacent first data line.

6. array substrate according to claim 4, which is characterized in that the touch control electrode line and second data line are same Layer, the touch control electrode line is between adjacent second data line.

7. array substrate according to claim 5 or 6, which is characterized in that between the substrate and the common electrode layer It is disposed with the first conductive layer, the first insulating layer, the second conductive layer, second insulating layer, third conductive layer and third insulating layer；

First conductive layer is equipped with multiple grids corresponding with the pixel unit and a plurality of grid line；

First data line is equipped in second conductive layer；

Multiple the first via holes through the second insulating layer are equipped in the second insulating layer；

Second data line is equipped in the third conductive layer, second data line passes through first via hole and corresponding picture Plain unit electrical connection.

8. array substrate according to claim 7, which is characterized in that when the touch control electrode line and second data line When same layer；

The third insulating layer is equipped with multiple the second via holes through the third insulating layer；

The touch control electrode line is electrically connected with the electrode unit by second via hole.

9. array substrate according to claim 7, which is characterized in that when the touch control electrode line and first data line When same layer；

The second insulating layer is equipped with multiple third via holes through the second insulating layer；

The third insulating layer is equipped with multiple the 4th via holes through the third insulating layer, and the third via hole and described the Four via holes are oppositely arranged；

The touch control electrode line is electrically connected with the electrode unit by the third via hole and the 4th via hole.

10. array substrate according to claim 7, which is characterized in that first insulating layer and second conductive layer Between include the first semiconductor layer；

First semiconductor layer is equipped with active area corresponding with the grid, and the active area is electrically connected with first data line It connects.

11. array substrate according to claim 7, which is characterized in that wrapped between first conductive layer and the substrate Include the second semiconductor layer；

Second semiconductor layer is equipped with active area corresponding with the grid；

First insulating layer is equipped with multiple the 5th via holes through first insulating layer；

The active area is electrically connected by the 5th via hole with first data line.

12. a kind of display panel characterized by comprising

The described in any item array substrates of claim 1~11；

The cover board being oppositely arranged with the array substrate.

13. display panel according to claim 12, which is characterized in that the display panel is liquid crystal display panel, institute Stating cover board is color membrane substrates.

14. display panel according to claim 12, which is characterized in that the display panel is OLED display panel, institute Stating cover board is counter substrate.

15. a kind of display device characterized by comprising the described in any item display panels of claim 12~14.