CN106533452B - A kind of m-ary LDPC coding method and encoder - Google Patents
A kind of m-ary LDPC coding method and encoder Download PDFInfo
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Abstract
The invention discloses a kind of m-ary LDPC coding method and encoders, it is related to m-ary LDPC in the case of given arbitrary carry system, any check matrix, coding method and encoder design；The described method includes: receiving information to be encoded, Galois Field multiplication is calculated by look-up table, result of product is added in galois field and obtains check information；The encoder includes: check matrix module, Galois field multiplying unit module, Galois field adder module, composite module, control module after memory module, transformation.It may be implemented to carry out encoder design to any m-ary LDPC through the invention, the encoder handling capacity of realization is big, resource consumption is small, and has the characteristics that novelty, creativeness and simple and practical.
Description
Technical field
It is real using look-up table that the present invention relates to m-ary LDPC coding methods and encoder more particularly to m-ary LDPC
The coding method of existing Galois Field multiplication operation and its encoder.
Background technique
LDPC (low-density checksum) code was put forward for the first time in 1962 by Gallager Lai but due to hardware item at that time
Part limitation, is ignored always, until MacKay and Neal in 1996 et al. restudies it, it is found that it has and approaches perfume (or spice)
The excellent properties of dense limit, are just recognized again.Research shows that LDPC code, when code length is longer, decoding performance is better than Turbo
Code；Non-Binary LDPC Coded is better than 2 systems in terms of error correcting capability, antiburst error ability, to the adaptability of high speed transmission system
LDPC code.
Mainly there are direct coding algorithm, near lower triangular encryption algorithm, standard for the algorithm of m-ary LDPC coding at present
Recycle RA structured coding algorithm.Direct coding algorithm principle is simple, and computation complexity is higher, but to check matrix no requirement (NR), fits
For the lesser Non-Binary LDPC Coded of check matrix dimension；Near lower triangular encryption algorithm, also referred to as RU encryption algorithm, the algorithm
It is required that check matrix have lower triangle or can abbreviation be lower triangular configuration, algorithm complexity is reduced, but the code of this kind of structure
Loss is had in performance；Quasi- circulation RA structured coding algorithm utilizes the quasi- cyclic of check matrix, is iterated calculating, should
Algorithm computation complexity further decreases, but requires have quasi- cyclic to check matrix.
Near lower triangular encryption algorithm and quasi- circulation RA structured coding algorithm require check matrix to have certain special knot
Structure is not particularly suited for all check matrixes.Application background check matrix of the invention is 64 systems, and dimension is the general of 44*88
Logical sparse matrix, and do not have lower triangle or quasi- cyclic, therefore near lower triangular encryption algorithm and quasi- circulation RA structure are compiled
Code algorithm is not applicable.
Summary of the invention
In view of this, providing a kind of be applied to commonly it is an object of the invention to avoid the deficiency in above-mentioned background technique
The m-ary LDPC encryption algorithm of sparse matrix structure.The present invention is based on direct coding algorithms, propose a kind of utilization look-up table meter
The method for calculating Galois Field multiplication operation, effectively reduces the computation complexity of direct coding algorithm, improves code efficiency.It is right
In the check matrix of 64 system 44*88, encoder hardware resource occupation are as follows: logic unit (ALUT): 1763, register
(Registers): 5173, storage unit (Block Memory Bits): 10736, handling capacity is up to bits, wherein for system
Work clock.Efficiently solve the m-ary LDPC encoded question of ordinary channel structure.
The object of the present invention is achieved like this, a kind of m-ary LDPC coding method, the information to be encoded that will be received
With the check matrix transformation results that calculate in advance in Galois fields multiplication, the multiplying of galois field using look-up table (no
With the multiplying of system, corresponding look-up table is different, need to be calculated), the result of multiplying is made into exclusive or processing by bit
(i.e. Galois field addition operation), obtained result are the check bit after encoding, and combine with information to be encoded and are encoded
Information bit afterwards.Specifically includes the following steps:
(1) memory module receives and stores information to be encoded, and information to be encoded is respectively sent to Galois Field multiplication
Device and composite module；Wherein, the storage of information to be encoded is as unit of q bit, and 2qIndicate that the corresponding system of galois field, q are
Positive integer；
(2) check matrix module sets check matrix, to check matrix HM*N=[HM*MHM(N-M)] converted
Check matrix afterwardsWherein, M, N are positive integer, and transformed check matrix is each
Capable value is stored in a storage unit, and the value in all storage units is sent to Galois field multiplying unit；
(3) Galois field multiplying unit extracts a value of same number of columns in each storage unit every time, by extraction of values with to
Encoded information carries out multiplying using look-up table described below in galois field, obtains the result of multiplying and exports extremely
Galois field adder；
(4) result of multiplying is added in galois field using the method for step-by-step exclusive or by Galois field adder, will
The result of addition is exported to composite module；
(5) result that composite module will add up is combined with information to be encoded, the information after being encoded.
Wherein, multiplying is carried out using look-up table in step (3) specifically:
Two look-up tables are designed, look-up table depth is 2q- 1, the first look-up table subtracts one with vector representation as address, corresponds to
Power be data；For second look-up table using power as address, corresponding vector representation is data；Work as xmOr hmnWhen being 0, multiplication fortune
Calculate the direct zero setting of result；Work as xmAnd hmnWhen not being 0, by xmAnd hmnIt is used as address after subtracting one respectively, is searched by the first look-up table
xmAnd hmnPower corresponding to address after subtracting one respectively, by two power moulds 2q- 1 adds, and the result of addition is as address；Pass through
Second look-up table searches vector representation corresponding to the address for the result being added, and vector representation result is the number phase of galois field two
The result multiplied；Wherein, 2qIndicate the corresponding system of galois field, xmIndicate m-th of information to be encoded, hmnIndicate check matrix mould
Nth elements in m-th of storage unit in block；M, n are positive integer.
A kind of m-ary LDPC encoder, including memory module, check matrix module, Galois field multiplying unit, Jia Luohua
Domain adder, composite module and control module；
Memory module is stored as unit of q bit wait compile under the action of control module for receiving information to be encoded
Code information, is respectively sent to Galois field multiplying unit and composite module for information to be encoded；Wherein, 2qIndicate that galois field is corresponding
System, q is positive integer；
Check matrix module is for setting check matrix, to check matrix HM*N=[HM*MHM(N-M)] converted and become
Check matrix after changingWherein, M, N are positive integer, and transformed check matrix is every
The value of a line is stored in a storage unit；And the value in each storage unit is sent to Jia Luohua under the action of control module
Domain multiplier；The check matrix module includes including multiple storage units；
Galois field multiplying unit is used to extract a value of same number of columns in each storage unit every time, by extraction of values and to
Encoded information carries out multiplying using above-described look-up table in galois field, and the result for obtaining multiplying is exported to gal
The domain Luo Hua adder；
Galois field adder is used to for the result of multiplying being added in galois field using the method for step-by-step exclusive or, will
The result of addition is exported to composite module；
The result that composite module is used to will add up under the action of control module is combined with information to be encoded, after exports coding
Information；
Control module is for controlling the storage of input data in memory module, check matrix module input Galois Field multiplication
The output of the data and encoded information of device.
Wherein, Galois field multiplying unit module includes the first look-up table, second look-up table, mould 2q- 1 adds module；xmOr hmn
When being 0, the direct zero setting of multiplication result；xmAnd hmnWhen not being 0, by xmAnd hmnIt is looked into after subtracting one respectively as address input first
Table is looked for, the first look-up table searches xmAnd hmnPower corresponding to address after subtracting one respectively will search obtained two powers point
It Shu Chu not be to mould 2q- 1 adds module；Mould 2q- 1 adds module by two power moulds 2q- 1 plus, the result that will add up as address export to
Second look-up table；Second look-up table searches vector representation corresponding to the address of addition result, and vector representation result is gal sieve
It is that the magnificent number of domain two is multiplied to be exported as a result, two are counted the result being multiplied；Wherein, 2qIndicate the corresponding system of galois field, xmIndicate the
M information to be encoded, hmnNth elements in m-th of storage unit in expression check matrix module.
The present invention has the following advantages compared to background technique:
(i) m-ary LDPC coding method proposed by the present invention realizes Galois Field multiplication operation, coding using look-up table
Device has handling capacity big, and the small advantage of resource consumption has the characteristics that novelty and creativeness.
(ii) m-ary LDPC encoder proposed by the present invention, the property encoded using LDPC, in advance by most square
Battle array operation calculates, and result is stored in memory module, saves a large amount of computing resource, has the characteristics that practical.
(iii) m-ary LDPC coding method proposed by the present invention, to check matrix no requirement (NR), without being done to check matrix
Special designing has the characteristics that adaptable.
Detailed description of the invention
Fig. 1 is the flow chart of m-ary LDPC coding method of the invention；
Fig. 2 is that m-ary LDPC encoder of the invention realizes block diagram；
Fig. 3 is that Galois field multiplying unit of the invention realizes block diagram.
Specific embodiment
Below with reference to specific implementation step and attached drawing, the present invention will be further described:
Encoder of the invention realizes block diagram as shown in Fig. 2, multiplying including memory module, check matrix module, galois field
Musical instruments used in a Buddhist or Taoist mass, Galois field adder, composite module and control module；The consumption of resource must be taken into consideration in the realization of algorithm, to guarantee meter
The timeliness of calculation, while reducing resource occupation, the form of the transformation matrix memory module calculated in advance is stored in journey by encoder
In sequence；According to this block diagram realize m-ary LDPC coding module, only need 7 system clock cycles you can get it first verification
Position calculated result, can complete entire encoding operation using N-M-1 system clock cycle.
Memory module is stored as unit of q bit wait compile under the action of control module for receiving information to be encoded
Code information, is respectively sent to Galois field multiplying unit and composite module for information to be encoded；Wherein, 2qIndicate that galois field is corresponding
System, q is positive integer；
Check matrix module is for setting check matrix HM*N=[HM*MHM(N-M)], check matrix is converted and is become
Check matrix after changingWherein, M, N are positive integer, by transformed check matrix
The value of every a line is stored in a storage unit；And the value in each storage unit is sent to gal sieve under the action of control module
Magnificent domain multiplier；The check matrix module includes including multiple storage units；
Galois field multiplying unit is used to extract a value of same number of columns in each storage unit every time, by extraction of values and to
Encoded information carries out multiplying using look-up table in galois field, and the result for obtaining multiplying is exported to Galois field addition
Device；
Galois field adder is used to for the result of multiplying being added in galois field using the method for step-by-step exclusive or, will
The result of addition is exported to composite module；
The result that composite module is used to will add up under the action of control module is combined with information to be encoded, after exports coding
Information；
Control module is for controlling the storage of input data in memory module, check matrix module input Galois Field multiplication
The output of the data and encoded information of device.
Wherein, Galois field multiplying unit includes the first look-up table, second look-up table, mould 2q- 1 adds module；xmOr hmnIt is 0
When, the direct zero setting of multiplication result；xmAnd hmnWhen not being 0, by xmAnd hmnIt is searched after subtracting one respectively as address input first
Table, the first look-up table search xmAnd hmnPower corresponding to address after subtracting one respectively will be searched two obtained powers and be distinguished
It exports to mould 2q- 1 adds module；Mould 2q- 1 adds module by two power moulds 2q- 1 plus, the result that will add up is exported as address to the
Two look-up tables；Second look-up table searches vector representation corresponding to the address of addition result, and vector representation result is Jia Luohua
It is that the number of domain two is multiplied to be exported as a result, counting the result being multiplied for two；Wherein, 2qIndicate the corresponding system of galois field, xmIndicate m
A information to be encoded, hmnNth elements in m-th of storage unit in expression check matrix module.
A kind of flow chart of m-ary LDPC coding method of the invention is as shown in Figure 1, this coding method specifically includes
Step:
(1) memory module receives and stores information to be encoded, and information to be encoded is respectively sent to Galois Field multiplication
Device and composite module；Wherein, the storage of information to be encoded is as unit of q bit, and 2qIndicate that the corresponding system of galois field, q are
Positive integer；
(2) check matrix module sets check matrix HM*N=[HM*MHM(N-M)], check matrix is converted
The value of the every a line of transformed check matrix is stored in a storage unit by check matrix afterwards, will be in all storage units
Value is sent to Galois field multiplying unit；Transformed check matrix isWherein, M, N are equal
For positive integer.
(3) Galois field multiplying unit extracts a value of same number of columns in each storage unit every time, by extraction of values with to
Encoded information carries out multiplying using look-up table in galois field, obtains the result of multiplying and export to galois field to add
Musical instruments used in a Buddhist or Taoist mass；
Galois field element can be indicated the multiplying between vector representation field element with primitive element by primitive element
Form carry out, multiplying be primitive element power mould 2q- 1 adds；The design of m-ary LDPC encoder is just for specific
System, therefore in the present invention galois field multiplying use look-up table, specific implementation as shown in figure 3, design two look into
Table is looked for, look-up table depth is 2q- 1, the first look-up table subtracts one with vector representation as address, and corresponding power is data；Second
For look-up table using power as address, corresponding vector representation is data；Work as xmOr hmnWhen being 0, the direct zero setting of multiplication result；When
xmAnd hmnWhen not being 0, by xmAnd hmnIt is used as address after subtracting one respectively, x is searched by the first look-up tablemAnd hmnAfter subtracting one respectively
Power corresponding to address, by two power moulds 2q- 1 adds, and the result of addition is as address；It is searched and is added by second look-up table
Result address corresponding to vector representation, vector representation result be galois field two number be multiplied results；Wherein, 2qTable
Show the corresponding system of galois field, xmIndicate m-th of information to be encoded, hmnIndicate m-th of storage unit in check matrix module
Middle nth elements；M, n are positive integer.
The case where basis is 0 needs special consideration, and in the case where any one multiplier is 0, calculated result directly sets 0；Gal
The domain Luo Hua multiplier only needs 6 clock cycle can be completed.
(4) result of multiplying is added in galois field using the method for step-by-step exclusive or by Galois field adder, will
The result of addition is exported to composite module；
(5) result that composite module will add up is combined with information to be encoded, the information after being encoded.
After information input to be encoded encodes computing module, it is only necessary to which 7 clock cycle, (6 clock cycle completed gal sieve
Magnificent domain multiplying, 1 clock cycle complete Galois field addition operation) calculating of 1 check information can be completed；Corresponding diagram
Composite module in 2.
Input/output relation in Fig. 2 between modules is controlled by control module, and control module controls input data
The data of matrix module input Galois field multiplying unit module after storage, memory module and transformation, and encoded information after combination
Output.
In addition to above-mentioned implementation steps, the present invention can also have other embodiments.It is all to use equivalent substitution or equivalent transformation
The technical solution of form, falls within the scope of protection required by the present invention.
Claims (2)
1. a kind of m-ary LDPC coding method, which comprises the following steps:
(1) memory module receives and stores information to be encoded, by information to be encoded be respectively sent to Galois field multiplying unit and
Composite module；Wherein, the storage of information to be encoded is as unit of q bit, and 2qIndicate the corresponding system of galois field, q is positive whole
Number；
(2) check matrix module sets check matrix, is converted to obtain transformed check matrix to check matrix, will be converted
The value of the every a line of check matrix afterwards is stored in a storage unit, and the value in all storage units is sent to Galois Field multiplication
Device；The check matrix is HM*N=[HM*MHM(N-M)], transformed check matrix isWherein, M, N are positive integer；
(3) Galois field multiplying unit extracts a value of same number of columns in each storage unit every time, by extraction of values with it is to be encoded
Information carries out multiplying using look-up table in galois field, obtains the result of multiplying and exports to Galois field addition
Device；
(4) result of multiplying is added in galois field using the method for step-by-step exclusive or by Galois field adder, will add up
Result export to composite module；
(5) result that composite module will add up is combined with information to be encoded, the information after being encoded；
Multiplying is carried out using look-up table in the step (3) specifically:
Two look-up tables are designed, look-up table depth is 2q- 1, the first look-up table subtracts one with vector representation as address, corresponding power
Secondary is data；For second look-up table using power as address, corresponding vector representation is data；Work as xmOr hmnWhen being 0, multiplying knot
The direct zero setting of fruit；Work as xmAnd hmnWhen not being 0, by xmAnd hmnIt is used as address after subtracting one respectively, x is searched by the first look-up tablemWith
hmnPower corresponding to address after subtracting one respectively, by two power moulds 2q- 1 adds, and the result of addition is as address；Pass through second
Look-up table searches vector representation corresponding to the address for the result being added, and vector representation result is that the number of galois field two is multiplied
As a result；Wherein, 2qIndicate the corresponding system of galois field, xmIndicate m-th of information to be encoded, hmnIt indicates in check matrix module
Nth elements in m-th of storage unit；M, n are positive integer.
2. a kind of m-ary LDPC encoder, which is characterized in that including memory module, check matrix module, Galois Field multiplication
Device, Galois field adder, composite module and control module；
Memory module stores letter to be encoded for receiving information to be encoded under the action of control module as unit of q bit
Breath, is respectively sent to Galois field multiplying unit and composite module for information to be encoded；Wherein, 2qIndicate galois field it is corresponding into
System, q is positive integer；
Check matrix module converts check matrix to obtain transformed check matrix, will be become for setting check matrix
The value of every a line of check matrix after changing is stored in a storage unit；And it will be in each storage unit under the action of control module
Value be sent to Galois field multiplying unit；The check matrix module includes multiple storage units；Check matrix is HM*N=
[HM*MHM(N-M)], transformed check matrix isWherein, M, N are positive integer；
Galois field multiplying unit is used to extract a value of same number of columns in each storage unit every time, by extraction of values with it is to be encoded
Information carries out multiplying using look-up table in galois field, and the result for obtaining multiplying is exported to Galois field adder；
Galois field adder is used to for the result of multiplying being added in galois field using the method for step-by-step exclusive or, will add up
Result export to composite module；
The result that composite module is used to will add up under the action of control module is combined with information to be encoded, the letter after exports coding
Breath；
Control module is used to control the storage of input data in memory module, check matrix module inputs Galois field multiplying unit
The output of data and encoded information；
Wherein, Galois field multiplying unit includes the first look-up table, second look-up table, mould 2q- 1 adds module；xmOr hmnWhen being 0, multiplication
The direct zero setting of operation result；xmAnd hmnWhen not being 0, by xmAnd hmnAfter subtracting one respectively as address input the first look-up table, first
Look-up table searches xmAnd hmnPower corresponding to address after subtracting one respectively will be searched two obtained powers and be exported respectively to mould
2q- 1 adds module；Mould 2q- 1 adds module by two power moulds 2q- 1 adds, and the result that will add up is exported to second as address and searched
Table；Second look-up table searches vector representation corresponding to the address of addition result, and vector representation result is the number of galois field two
It is being multiplied to be exported as a result, two are counted the result being multiplied；Wherein, 2qIndicate the corresponding system of galois field, xmM-th of expression wait compile
Code information, hmnNth elements in m-th of storage unit in expression check matrix module.
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| CN109951250B (en) * | 2017-12-21 | 2021-01-08 | 华为技术有限公司 | LDPC coding method and device for communication signal |
| CN108988988B (en) * | 2018-06-29 | 2020-05-19 | 华中科技大学 | RCM (Radar Cross-correlation) encoder and encoding method based on two-stage lookup table of quasi-cyclic matrix |
| CN110601699B (en) * | 2019-09-28 | 2023-03-28 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Method for realizing code rate dynamic variable multi-element LDPC code |
| CN112953563A (en) * | 2021-02-09 | 2021-06-11 | 极芯通讯技术(南京)有限公司 | Method and device for realizing high-speed parallel signal processing in Galois field encoder |
| CN114063973B (en) * | 2022-01-14 | 2022-04-22 | 苏州浪潮智能科技有限公司 | Galois Field Multiplier and Erasure Codec System |
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