[go: up one dir, main page]

CN106526995B - A kind of array substrate and display panel - Google Patents

A kind of array substrate and display panel Download PDF

Info

Publication number
CN106526995B
CN106526995B CN201610930738.7A CN201610930738A CN106526995B CN 106526995 B CN106526995 B CN 106526995B CN 201610930738 A CN201610930738 A CN 201610930738A CN 106526995 B CN106526995 B CN 106526995B
Authority
CN
China
Prior art keywords
metal routing
connecting lead
lead wire
metal
array substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610930738.7A
Other languages
Chinese (zh)
Other versions
CN106526995A (en
Inventor
刘冰萍
周秀峰
李俊谊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianma Microelectronics Co Ltd
Xiamen Tianma Microelectronics Co Ltd
Original Assignee
Tianma Microelectronics Co Ltd
Xiamen Tianma Microelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tianma Microelectronics Co Ltd, Xiamen Tianma Microelectronics Co Ltd filed Critical Tianma Microelectronics Co Ltd
Priority to CN201610930738.7A priority Critical patent/CN106526995B/en
Publication of CN106526995A publication Critical patent/CN106526995A/en
Application granted granted Critical
Publication of CN106526995B publication Critical patent/CN106526995B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13452Conductors connecting driver circuitry and terminals of panels

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The embodiment of the invention discloses a kind of array substrate and display panels.Wherein, the array substrate includes viewing area and non-display area, the non-display area is provided with a plurality of connecting lead wire, the connecting lead wire includes a plurality of first connecting lead wire, first connecting lead wire includes the first metal routing, the second metal routing and third metal routing, first metal routing, second metal routing, at least two in the third metal routing be located at different film layers.Technical solution provided in an embodiment of the present invention improves the homogeneity that signal transmits on different connecting lead wires, shows that display panel uniformly.

Description

A kind of array substrate and display panel
Technical field
The present embodiments relate to field of display technology more particularly to a kind of array substrate and display panels.
Background technique
Liquid crystal display panel has effective display area domain and non-display area.Multiple pictures are configured in effective display area domain For element to form pixel array, non-display area is then equipped with perimeter circuit.Each pixel generally comprise at least one thin film transistor (TFT) with And the pixel electrode being connect with the thin film transistor (TFT), and each pixel is by two adjacent scan lines and two adjacent numbers It is surrounded according to line.These scan lines and data line extend to non-display area from effective display area domain, and pass through non-display area Perimeter circuit be electrically connected with driving chip.Perimeter circuit is from one end of connection scan line and data line to driving chip location It concentrates and constitutes and be fanned out to cabling in domain.
Biggish resistance difference, general two sides can be had by being fanned out to the cabling of two side areas and the cabling of intermediate region in cabling The impedance of the cabling in region is greater than the impedance of the cabling of intermediate region.Cabling due to being fanned out to cabling two side areas is usually aobvious Show that area two sides provide signal, and the cabling of intermediate region is to provide display signal for viewing area intermediate region.When display panel is aobvious Diagram as when, due to being fanned out to the cabling of two sides and the cabling of intermediate region in cabling, there are biggish resistance differences, will cause aobvious Showing in Display panel image process, there is display difference in the color of image of the centre and two sides that will cause display panel viewing area, There is mura (display uneven), such as color displays occur uneven.
Summary of the invention
The present invention provides a kind of array substrate and display panel, to solve impedance contrast between the different cablings being fanned out in cabling It is different larger, occur showing non-uniform problem.
In a first aspect, the embodiment of the invention provides a kind of array substrate, including viewing area and non-display area, it is described non-aobvious Show that area is provided with a plurality of connecting lead wire;
The connecting lead wire includes a plurality of first connecting lead wire, and first connecting lead wire includes the first metal routing, the Two metal routings and third metal routing, first metal routing, second metal routing, in the third metal routing At least two be located at different film layers.
Second aspect, the embodiment of the invention also provides a kind of display panel, which includes that the present invention is any real The array substrate of example offer is provided.
Technical solution provided in an embodiment of the present invention, since the first connecting lead wire includes the first metal routing, the second metal Cabling and third metal routing, at least two in the first metal routing, the second metal routing and third metal routing are located at not Same film layer.And other connecting lead wires generally only include single metal layer cabling or including the first metal routings and the second metal Cabling.Different metal cabling in first connecting lead wire can have different in different connection types, such as the first connecting lead wire Metal routing be connected in series or in parallel, can reduce the resistance difference of the first connecting lead wire He other connecting lead wires in this way, Signal decaying and time delay of the signal when transmitting on different connecting lead wires are almost the same, improve signal on different connecting lead wires The homogeneity of transmission shows that display panel uniformly, such as keeps color displays uniform.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of array substrate provided in an embodiment of the present invention;
Fig. 2A is a kind of structural schematic diagram of connecting lead wire provided in an embodiment of the present invention;
Fig. 2 B is the structural schematic diagram of another connecting lead wire provided in an embodiment of the present invention;
Fig. 2 C is the structural schematic diagram of another array substrate provided in an embodiment of the present invention;
Fig. 3 A is the structural schematic diagram of another connecting lead wire provided in an embodiment of the present invention;
Fig. 3 B is the structural schematic diagram of another array substrate provided in an embodiment of the present invention;
Fig. 3 C is the structural schematic diagram of another connecting lead wire provided in an embodiment of the present invention;
Fig. 3 D is in Fig. 3 C along the sectional view in the direction A-A;
Fig. 3 E is in Fig. 3 C along the sectional view in the direction B-B;
Fig. 4 is a kind of structural schematic diagram of display panel provided in an embodiment of the present invention.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched The specific embodiment stated is used only for explaining the present invention rather than limiting the invention.It also should be noted that in order to just Only the parts related to the present invention are shown in description, attached drawing rather than entire infrastructure.
The embodiment of the present invention provides a kind of array substrate, which includes viewing area and non-display area, non-display area It is provided with a plurality of connecting lead wire;
Connecting lead wire includes a plurality of first connecting lead wire, and the first connecting lead wire is walked including the first metal routing, the second metal Line and third metal routing, at least two in the first metal routing, the second metal routing and third metal routing are located at difference Film layer.
It illustratively, is a kind of structural schematic diagram of array substrate provided in an embodiment of the present invention referring to Fig. 1, Fig. 1.The battle array Column substrate includes viewing area 11 and non-display area 12, and non-display area is provided with a plurality of connecting lead wire 120, a plurality of connecting lead wire 120 Including a plurality of first connecting lead wire, the first connecting lead wire includes the first metal routing, the second metal routing and third metal routing, At least two in first metal routing, the second metal routing and third metal routing are located at different film layers.
Since the first connecting lead wire includes the first metal routing, the second metal routing and third metal routing, the first metal At least two in cabling, the second metal routing and third metal routing are located at different film layers.And other connecting lead wires are general Only include single metal layer cabling or including the first metal routing and the second metal routing.Difference gold in first connecting lead wire Belonging to cabling can have metal routing different in different connection types, such as the first connecting lead wire to be connected in series or in parallel, It can reduce the resistance difference of the first connecting lead wire He other connecting lead wires in this way, signal on different connecting lead wires when transmitting Signal decaying and time delay are almost the same, improve the homogeneity that signal transmits on different connecting lead wires, show display panel Uniformly.
Optionally, present invention implementation provides a kind of array substrate, and the first connecting lead wire in the array substrate includes first Metal routing, the second metal routing and third metal routing, the first metal routing, the second metal routing and third metal routing position In different film layers, i.e. the first metal routing, the second metal routing and third metal routing are located at along array substrate thickness direction Different height.In every first connecting lead wire, in the first metal routing, the second metal routing and third metal routing two Item is connected in parallel.Illustratively, A and Fig. 2 B, Fig. 2A are a kind of structures of connecting lead wire provided in an embodiment of the present invention referring to fig. 2 Schematic diagram, Fig. 2 B are the structural schematic diagrams of another connecting lead wire provided in an embodiment of the present invention.First connection shown in figure Lead includes the first metal routing 101, the second metal routing 102 and third metal routing 103, the first metal routing 101, second Metal routing 102 and third metal routing 103 are located at different film layers, the first metal routing 101,102 and of the second metal routing It is dielectrically separated between third metal routing 103 by insulating layer 142 and insulating layer 143, the first metal routing 101 and array substrate Film layer is dielectrically separated from by insulating layer 141 where upper other elements, for example, the first metal routing 101 by insulating layer 141 with it is thin Film transistor is dielectrically separated from.In addition third metal routing 103 can also be insulated by insulating layer (not shown) and other film layers Isolation.The first metal routing 101 in first connecting lead wire is connected with the second metal routing 102,103 He of third metal routing First metal routing 101 is connected in parallel.That is the first connecting lead wire includes two sections, and first segment is the first metal routing 101 and third The parallel connection of metal routing 103, second segment are the second metal routing 102.In the first connecting lead wire, due in the first metal routing A third metal routing 103 in parallel on 101, the impedance of the first segment of connecting lead wire becomes smaller, due to the first connecting lead wire First segment and second segment are a series relationship on the whole, then the impedance of whole first connecting lead wire can become smaller.Implement in the present invention In example, in every first connecting lead wire, third metal routing can also be arranged side by side with the second metal routing.That is the one of the first connecting lead wire Section is made of the first connecting lead wire, and another section has the second connecting lead wire and third connecting lead wire to compose in parallel, and equally may be implemented Reduce the effect of the first connecting lead wire impedance.Since the impedance of the first connecting lead wire reduces, the first connecting lead wire is connect with other The resistance difference of lead is smaller, by design, the first connecting lead wire can be made equal with the impedance of other connecting lead wires.It improves The homogeneity that signal transmits on different connecting lead wires shows that display panel uniformly.
Further, in embodiments of the present invention, the impedance of the first metal routing in the first connecting lead wire is greater than second The impedance of metal routing.Wherein, generally there are two parts to form for the impedance of every metal routing, is the resistance of metal routing respectively With the capacitor of metal routing.Also there are two parts to form for the impedance of every connecting lead wire, is resistance and the company of connecting lead wire respectively Connect the capacitor of lead.Since the impedance of the first metal routing is greater than the second metal routing, third metal routing is parallel to the first company It connects on the first metal routing in lead, connects compared to the other parts that third connecting lead wire is parallel to the first connecting lead wire, first Connect lead impedance can reduce it is most.
Array substrate provided in an embodiment of the present invention may also include positioned at a plurality of signal lead of viewing area and positioned at non-aobvious Show the driving chip in area.Such as a plurality of signal lead may include for providing the multi-strip scanning line of gate drive signal, for mentioning Multiple data lines for display data signal and the touch drive signal line etc. for providing touching signals, each connecting lead wire One end connect with signal lead, the other end of each connecting lead wire is connect with driving chip, specifically can be with driving chip Pad electrical connection.Illustratively, C, Fig. 2 C are that the structure of another array substrate provided in an embodiment of the present invention is shown referring to fig. 2 It is intended to.On the basis of array substrate shown in Fig. 1, which further includes being set to the multiple data lines 110 of viewing area 11 With the driving chip for being set to non-display area 12;One end of each connecting lead wire 120 is connect with data line 110, and each connects The other end for connecing lead 120 is connect with driving chip, can be specifically electrically connected with the pad 130 of driving chip.With continued reference to figure 2C, a plurality of connecting lead wire in array substrate provided in an embodiment of the present invention includes a plurality of first connecting lead wire 121 and a plurality of Two connecting lead wires 122 (using 3 article of first connecting lead wire and the 3rd article of the second connecting lead wire as example in figure).General first connection is drawn Line 121 is located at the two side areas of entire connecting lead wire wiring area, and the second connecting lead wire 122 is located at entire connecting lead wire wiring region The intermediate region in domain.The length of first connecting lead wire 121 is greater than the length of the second connecting lead wire 122.In the prior art, due to The length of one connecting lead wire 121 is greater than the length of the second connecting lead wire 122, and the impedance of the first connecting lead wire 121 is generally higher than the The impedance of two connecting lead wires 122.In embodiments of the present invention, since the first connecting lead wire 121 is using the institute in Fig. 2 B and Fig. 2 C The structure shown, i.e. the first metal routing in the first connecting lead wire 121 are also parallel with third metal routing, the first connecting lead wire 121 impedance can become smaller, and the resistance difference of the first connecting lead wire 121 and the second connecting lead wire 122 is reduced.It, can be with by design Keep the impedance of the first connecting lead wire 121 and the second connecting lead wire 122 equal.It can make the first connecting lead wire 121 and the second connection The impedance of lead 122 is equal.The resistance difference that can solve the first connecting lead wire and the second connecting lead wire it is larger and caused by show Show uneven problem.The homogeneity that signal transmits on different connecting lead wires is improved, shows that display panel uniformly.
The embodiment of the invention also provides another array substrates.In the array substrate, the first connecting lead wire includes string At least one the first metal routings of connection connection, at least one the second metal routing and at least one third metal routings.Wherein, Two in first metal routing, the second metal routing and third metal routing are located at different film layers.
It illustratively, is the structural schematic diagram of another connecting lead wire provided in an embodiment of the present invention referring to Fig. 3 A, Fig. 3 A. The connecting lead wire is the first connecting lead wire, and the first connecting lead wire includes 101, second gold medals of concatenated first metal routing Belong to cabling 102 and a third metal routing 103.Wherein, the second metal routing 102 and third metal routing 103 are located at same Film layer, the second metal routing 102 and the first metal routing 101 are located at different film layers, pass through insulation between different metal cabling Layer 142 is dielectrically separated from, the first metal routing 101 and film layer where other elements in array substrate by insulating layer 141 insulate every From.Other second metal routing 102 and third metal routing 103 can also be dielectrically separated from by insulating layer and other film layers.Due to First metal routing 101 is located at different film layers, every first company from the second metal routing 102 and third metal routing 103 The first metal routing 101 connect in lead is connect by via hole 104 with the second metal routing 102, and the first metal routing 101 passes through Via hole 104 is connect with third metal routing 103.After being connected by via hole 104, at via hole 104 between different metal cabling Contact area reduces, and impedance increases, and the impedance of whole first connecting lead wire increases.Since the impedance of the first connecting lead wire increases, The resistance difference of first connecting lead wire and other connecting lead wires reduces, and by design, can make the first connecting lead wire and other companies The impedance for connecing lead is equal.The homogeneity that signal transmits on different connecting lead wires is improved, shows that display panel uniformly.It needs It is noted that the material of the second metal routing 102 and third metal routing 103 can be identical, and the second metal routing 102 It is arranged with 102 same layer of third metal routing, in the production process, the second metal routing 102 and third metal routing 103 can be by One of technique is formed.
Referring to Fig. 3 B, Fig. 3 B is the structural schematic diagram of another array substrate provided in an embodiment of the present invention.The array base Plate includes a plurality of first connecting lead wire 121 and a plurality of third connecting lead wire 123 (with 3 the first connecting lead wires and 3 thirds in figure Connecting lead wire is example), the length of third connecting lead wire 123 is greater than the length of the first connecting lead wire 121.General first connection is drawn Line 121 is located at the intermediate region of entire connecting lead wire wiring area, and 123 second connecting lead wire of third connecting lead wire is located at whole connect Connect the two side areas of lead wiring area.Draw conventionally, as the length of the first connecting lead wire 121 is less than third connection The length of line 123, the impedance of the first connecting lead wire 121 are less than the impedance of third connecting lead wire 123.And in the embodiment of the present invention In, the structure of the first connecting lead wire shown in Fig. 3 A can be used in the structure of the first connecting lead wire 121, the first connecting lead wire 121 Impedance increases, and the resistance difference of the first connecting lead wire 121 and third connecting lead wire 123 reduces.By design, the first company can be made The impedance of the impedance and the second connecting lead wire 123 that connect lead 121 is equal.It can solve the first connecting lead wire and third connecting lead wire Resistance difference it is larger and caused by show uneven problem.The homogeneity that signal transmits on different connecting lead wires is improved, is made Display panel is shown uniformly.
Fig. 3 C is the structural schematic diagram of another connecting lead wire provided in an embodiment of the present invention.Fig. 3 D is in Fig. 3 C along A-A The sectional view in direction, Fig. 3 E are in Fig. 3 C along the sectional view in the direction B-B.Referring to Fig. 3 C-3D, third connecting lead wire 123 includes string Join first metal routing 101 and second metal routing 102 of connection, i.e. a Duan Wei of third connecting lead wire 123 One metal routing 101, another section of third connecting lead wire 123 is the second metal routing 102, between two sections by via hole 104 into The connection of row wire jumper, the resistance difference of such two adjacent third connecting lead wires 123 is smaller, can improve display picture.
Further, in embodiments of the present invention, the different metal cabling position that adjacent contact connects in the first connecting lead wire In different film layers;The total number of the first metal routing, the second metal routing and third metal routing is big in first connecting lead wire The total number of the first metal routing and the second metal routing in third connecting lead wire.The first metal is walked in first connecting lead wire The total number of line, the second metal routing and third metal routing is greater than the total number of metal routing in third connecting lead wire, per more One metal routing needs to increase a via hole.And the increase of number of vias will increase the impedance of entire connecting lead wire.It is exemplary , referring to Fig. 3 E, the first metal routing in the first connecting lead wire, the second metal routing, third metal routing total number be 4 A, correspondingly, the quantity of via hole 104 is 3.Referring to Fig. 3 D, the first metal routing and the second metal are walked in third connecting lead wire The total number of line is 2, and correspondingly, the quantity of via hole 104 is 1.
With continued reference to Fig. 3 C-3E, it can be seen that the first metal routing 101, the second metal routing 102 and third metal are walked Arrangement mode of the line 102 in two adjacent first connecting lead wires 121 is different;First metal routing 101 and the second metal routing 102 arrangement mode in two adjacent third connecting lead wires 123 is opposite.Such wires design can make adjacent two article The adjacent segment of one connecting lead wire uses different metal routings, can reduce the interference between adjacent two the first connecting lead wires. It can also equally reduce and be interfered between adjacent two third connecting lead wires.
In addition, the embodiment of the present invention also provides a kind of display panel, referring to fig. 4, which includes that the present invention is any The array substrate 20 that embodiment provides, and the color membrane substrates 30 that are oppositely arranged with array substrate 20 and be located at array substrate 20 with Liquid crystal layer 40 between color 30 plate of film base.Wherein, the liquid crystal layer 40 includes multiple liquid crystal molecules 401.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that The invention is not limited to the specific embodiments described herein, be able to carry out for a person skilled in the art it is various it is apparent variation, It readjusts and substitutes without departing from protection scope of the present invention.Therefore, although being carried out by above embodiments to the present invention It is described in further detail, but the present invention is not limited to the above embodiments only, without departing from the inventive concept, also It may include more other equivalent embodiments, and the scope of the invention is determined by the scope of the appended claims.

Claims (9)

1. a kind of array substrate, which is characterized in that including viewing area and non-display area, the non-display area is provided with a plurality of connection Lead;
The connecting lead wire includes a plurality of first connecting lead wire and a plurality of second connecting lead wire;The length of first connecting lead wire Greater than the length of second connecting lead wire;
First connecting lead wire includes the first metal routing, the second metal routing and third metal routing, first metal Cabling, second metal routing and the third metal routing are located at different film layers;
Every first connecting lead wire includes two sections, first segment be first metal routing and the third metal routing simultaneously Connection, second segment are second metal routing, and first metal routing and second metal routing are connected in series;Described Two connecting lead wires include first metal routing and second metal routing being connected in series;
The impedance of first metal routing is greater than the impedance of second metal routing.
2. array substrate according to claim 1, which is characterized in that between the different metal cabling in the connecting lead wire It is connected by via hole.
3. array substrate according to claim 1, which is characterized in that further include a plurality of signal for being set to the viewing area Cabling, and it is set to the driving chip of the non-display area;
One end of connecting lead wire described in each is connect with a signal lead, and the other end is connect with the driving chip.
4. a kind of array substrate, which is characterized in that including viewing area and non-display area, the non-display area is provided with a plurality of connection Lead;
The connecting lead wire includes a plurality of first connecting lead wire and a plurality of third connecting lead wire;The length of the third connecting lead wire Greater than the length of first connecting lead wire;
First connecting lead wire include at least one the first metal routings being connected in series, at least one the second metal routings and At least one third metal routing, first metal routing and second metal routing are located at different layers, second gold medal Belong to cabling and the third metal routing is located on the same floor;The third connecting lead wire includes one described first be connected in series Metal routing and second metal routing;The different metal cabling position that adjacent contact connects in first connecting lead wire In different film layers.
5. array substrate according to claim 4, which is characterized in that
First metal routing described in first connecting lead wire, second metal routing and the third metal routing it is total Number is greater than the total number of the first metal routing and second metal routing described in the third connecting lead wire.
6. array substrate according to claim 4, which is characterized in that
First metal routing, second metal routing and the third metal routing are in two adjacent first connecting lead wires In arrangement mode it is different;
The arrangement mode of first metal routing and second metal routing in two adjacent third connecting lead wires is opposite.
7. according to the described in any item array substrates of claim 4-6, which is characterized in that the different metal in the connecting lead wire It is connected between cabling by via hole.
8. array substrate according to claim 4, which is characterized in that further include a plurality of signal for being set to the viewing area Cabling, and it is set to the driving chip of the non-display area;
One end of connecting lead wire described in each is connect with a signal lead, and the other end is connect with the driving chip.
9. a kind of display panel, which is characterized in that including the described in any item array substrates of claim 1-8.
CN201610930738.7A 2016-10-31 2016-10-31 A kind of array substrate and display panel Active CN106526995B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610930738.7A CN106526995B (en) 2016-10-31 2016-10-31 A kind of array substrate and display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610930738.7A CN106526995B (en) 2016-10-31 2016-10-31 A kind of array substrate and display panel

Publications (2)

Publication Number Publication Date
CN106526995A CN106526995A (en) 2017-03-22
CN106526995B true CN106526995B (en) 2019-10-22

Family

ID=58292952

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610930738.7A Active CN106526995B (en) 2016-10-31 2016-10-31 A kind of array substrate and display panel

Country Status (1)

Country Link
CN (1) CN106526995B (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI610281B (en) * 2017-03-09 2018-01-01 友達光電股份有限公司 Display panel
CN107170366B (en) * 2017-07-21 2020-04-17 厦门天马微电子有限公司 Display panel and display device
CN107479282B (en) * 2017-08-30 2020-03-31 京东方科技集团股份有限公司 Array substrate, display panel and display device
CN109976047B (en) * 2018-01-02 2021-03-16 京东方科技集团股份有限公司 Touch electrode structure, touch substrate and preparation method, display panel and device
CN109270755B (en) * 2018-09-30 2020-10-16 惠科股份有限公司 Display panel and display device
CN110262148B (en) * 2019-07-03 2022-06-03 昆山龙腾光电股份有限公司 Array substrate, display panel and display device
CN110579917B (en) * 2019-10-15 2022-03-01 上海中航光电子有限公司 Display module and display device
CN113296624B (en) * 2020-02-21 2022-12-27 华为技术有限公司 Display panel and electronic equipment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20070072127A (en) * 2005-12-30 2007-07-04 엘지.필립스 엘시디 주식회사 LCD display device
CN105518770A (en) * 2013-09-09 2016-04-20 夏普株式会社 Active matrix substrate and display device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7088323B2 (en) * 2000-12-21 2006-08-08 Lg.Philips Lcd Co., Ltd. Liquid crystal display device and method for fabricating the same
KR101213878B1 (en) * 2005-12-29 2012-12-18 엘지디스플레이 주식회사 flat panel display device and fabricating method of the same
KR101888423B1 (en) * 2011-06-10 2018-08-17 엘지디스플레이 주식회사 Flat panel display
US9190421B2 (en) * 2011-08-18 2015-11-17 Lg Display Co., Ltd. Display device and fabrication method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20070072127A (en) * 2005-12-30 2007-07-04 엘지.필립스 엘시디 주식회사 LCD display device
CN105518770A (en) * 2013-09-09 2016-04-20 夏普株式会社 Active matrix substrate and display device

Also Published As

Publication number Publication date
CN106526995A (en) 2017-03-22

Similar Documents

Publication Publication Date Title
CN106526995B (en) A kind of array substrate and display panel
US10120253B2 (en) Display device
CN209055780U (en) Array substrate and display panel
US9811227B2 (en) Array substrate and display panel
US9535302B2 (en) Display device
CN110531559B (en) Array substrate, display panel and display device
CN106444182B (en) Array substrate and display panel
CN107221536A (en) Array substrate, special-shaped display and display device
CN103217843A (en) Array substrate, manufacturing method thereof and liquid crystal panel
CN106125415B (en) pixel array and pixel structure
CN114280861B (en) Array substrate and display device
CN108108070B (en) TFT substrate and touch display panel using the same
CN107966862B (en) Display, display panel thereof and manufacturing method of display
CN111540297B (en) Display panel and display device
CN107561800B (en) Array substrate, display panel and display device
CN111430373B (en) Array substrate, display panel and display device
JP2017211981A (en) Touch panel and display device including the touch panel
CN109300921A (en) Array substrate and display panel
CN105388647A (en) Fan-out wiring structure of liquid crystal display panel and liquid crystal display panel
CN104793401A (en) Display panel and electronic equipment
CN106920815A (en) Pixel array structure, display panel and manufacturing method of pixel array structure
CN107578732A (en) Printed circuit board package and display device including the printed circuit board package
KR102415286B1 (en) Display substrate, display device, and method of manufacturing the display substrate
CN107290903B (en) Array substrate, display panel and display device
CN111540298B (en) Display panel and display device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant