CN106501056A - A kind of failure analysis method of semiconductor structure - Google Patents

Abstract

Embodiments of the present invention relate to the field of semiconductor technology, and in particular to a failure analysis method for a semiconductor structure, which is used to reveal the junction morphology of the semiconductor structure through a simple method, so as to perform failure analysis on the semiconductor structure according to the junction morphology. In the embodiment of the present invention, the semiconductor to be observed is immersed in a pretreatment solution for a first period of time to expose the doped region of the semiconductor to be observed, and the semiconductor to be observed with the exposed doped region is soaked in a dyeing solution for a second period of time. The dyeing solution includes 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid, and the volume ratio of 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid is 1:20:7, and each doping ratio of the semiconductor to be observed after the dyeing is determined. Effectively doped surfaces of impurity regions, and determine whether each doped region of the semiconductor to be observed is effective. In this way, the dyeing treatment of the doped region can be realized through the soaking process, and then the failure analysis can be performed on the semiconductor after the dyeing treatment, and the operation is convenient and simple.

Description

A Failure Analysis Method for Semiconductor Structure

technical field

Embodiments of the present invention relate to the technical field of semiconductors, and in particular, to a failure analysis method for a semiconductor structure.

Background technique

Metal-Oxid-Semiconductor (MOS) transistors are the most commonly used basic semiconductor devices in integrated circuits, because MOS transistors have low power consumption, are easy to integrate, and have good process controllability. Semiconductors composed of MOS transistors include various types, such as semiconductors composed of a single type of MOS transistors, and semiconductors composed of multiple types of MOS transistors. Doping regions are formed in semiconductor substrates by implanting dopant ions.

Semiconductor failure is usually caused by the failure of the doped region of the semiconductor. Therefore, in the prior art, the morphology of the doped region is usually revealed through a certain technology, and the failure of the semiconductor structure is analyzed through the morphology of the doped region. .

The appearance of doped region morphology mainly includes spreading resistance profile (SRP for short), secondary ion mass spectrometry (SIMS for short) test and chemical solution dyeing. Low cost and easy to operate, it is widely used in semiconductor chip production and related detection and testing fields. The principle of chemical solution dyeing is to use the dyeing solution to corrode the substrate in different doping concentration areas at different rates, and to show the morphology of the doping area.

The chemical solution dyeing process requires first cutting the failed MOS transistor into thin slices, then soaking it in a mixture of hydrofluoric acid (chemical expression HF), and finally observing it with a transmission electron microscope (TEM). The sample preparation process in this method is quite complicated, and the thickness of the thin slice also has certain strict requirements.

Contents of the invention

An embodiment of the present invention provides a failure analysis method for a semiconductor structure, which is used to reveal the morphology of the doped region of the semiconductor through a simple method, so as to perform failure analysis on the semiconductor according to the morphology of the doped region.

An embodiment of the present invention provides a failure analysis method for a semiconductor structure, including the following steps:

Soaking the semiconductor to be observed in the pretreatment solution for a first period of time to expose the doped region of the semiconductor to be observed;

Putting the semiconductor to be observed with the exposed doped region into the dyeing solution for a second period of time, so as to dye the doped region of the semiconductor to be observed; wherein, the dyed solution includes 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid, 49% The volume ratio of hydrofluoric acid, 70% nitric acid and glacial acetic acid is 1:20:7;

determining the effective doping surface of each doped region of the semiconductor to be observed after dyeing;

Whether each doped region of the semiconductor to be observed is effective is determined based on the effective doped surface of each doped region.

Preferably, after soaking the semiconductor to be observed with the exposed doped region in the dyeing solution for a second period of time, and before determining the effective doped surface of each doped region of the semiconductor to be observed after dyeing, further comprising:

Determining each doped region of the semiconductor to be observed after dyeing;

Wherein, the doping regions of different doping concentrations of the semiconductor to be observed after dyeing are corroded by the dyeing solution to different depths, and the doping regions of different doping concentrations are stepped, and each step surface corresponds to a doping region .

Preferably, determining the effective doping surface of each doped region of the semiconductor to be observed after dyeing specifically includes:

For each doped region, according to the junction morphology of the doped region corroded by the dyeing solution, determine the effective doped surface of each doped region of the semiconductor to be observed after dyeing;

Wherein, the etching depth of the effectively doped surface of each doping region is greater than the etching depth of the non-effectively doped surface of the doping region.

Preferably, according to the effectively doped surface of each doped region, it is determined whether each doped region of the semiconductor to be observed is effective, specifically referring to:

For each doped region, if the area of the effective doped surface of the doped region does not meet the preset requirement or the shape of the effective doped surface does not meet the preset requirement, it is determined that the doped region is invalid.

Preferably, determining the effective doping surface of each doped region of the semiconductor to be observed after dyeing specifically includes:

The surface of each doped region of the dyed semiconductor to be observed is observed by an optical microscope or a scanning electron microscope to determine the effective doped surface of each doped region of the dyed semiconductor to be observed.

Preferably, the semiconductor to be observed includes multiple different types of MOS transistors;

The doped region includes a well region, a lightly doped region and a heavily doped region, wherein the doping concentration of the well region is lower than that of the lightly doped region, and the doping concentration of the lightly doped region is lower than that of the heavily doped region. impurity concentration.

Preferably, the semiconductor to be observed includes a single type of MOS transistor;

The doped region includes a shallow doped region, a well region and a heavily doped region, wherein the doping concentration of the shallow doped region is lower than that of the well region, and the doping concentration of the well region is lower than that of the heavily doped region .

Preferably, the semiconductor to be observed is immersed in a pretreatment solution for a first period of time to expose the doped region of the semiconductor to be observed, specifically including:

Putting the semiconductor to be observed into the pretreatment solution and soaking it for a first period of time, so that the dielectric layer covering the doped region of the semiconductor to be observed is removed by the pretreatment solution, so that the metal layer and passivation layer covering the dielectric layer are Exfoliation, exposing the doped regions of the semiconductor to be observed.

Preferably, the pretreatment solution is 49% hydrofluoric acid.

Preferably, the first duration is 10-20 minutes;

The second duration is 15-20 seconds, or the second duration is 20-25 seconds.

In the embodiment of the present invention, the semiconductor to be observed is immersed in a pretreatment solution for a first period of time to expose the doped region of the semiconductor to be observed; the semiconductor to be observed with the exposed doped region is immersed in a dyeing solution for a second period of time, In order to dye the doped region of the semiconductor to be observed; wherein, the dyeing solution includes 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid, and the volume ratio of 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid is 1:20: 7. Determine the effective doping surface of each doped region of the semiconductor to be observed after dyeing; determine whether each doped region of the semiconductor to be observed is effective according to the effective doped surface of each doped region. In this way, the dyeing treatment of the doped region can be realized through the soaking process, and then the failure analysis can be performed on the semiconductor after the dyeing treatment, and the operation is convenient and simple. Further, since the volume ratio of the dyeing solution in the embodiment of the present invention is 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid in the ratio of 1:20:7, it can be seen that each doped region is complete in the dyed semiconductor. The shape of each doped region can be judged whether it is effective or not.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For Those of ordinary skill in the art can also obtain other drawings based on these drawings without any creative effort.

FIG. 1 is a schematic diagram of a semiconductor structure applicable to an embodiment of the present invention;

FIG. 2 is a schematic diagram of another semiconductor structure provided by an embodiment of the present invention;

3 is a schematic flowchart of a failure analysis method for a semiconductor structure provided by an embodiment of the present invention;

Fig. 4a is a schematic diagram of the semiconductor structure shown in Fig. 1 after soaking in the pretreatment solution for a first period of time;

Figure 4b is a schematic structural view of the semiconductor structure shown in Figure 4a after dyeing;

Figure 4c is a schematic diagram of the semiconductor structure seen from A in Figure 4b;

Figure 4d is a schematic diagram of the structure of the surface without effective doping in Figure 4c;

Fig. 5a is a schematic diagram of the semiconductor structure shown in Fig. 2 after soaking in the pretreatment solution for a first period of time;

Figure 5b is a schematic structural view of the semiconductor structure shown in Figure 5a after dyeing;

Fig. 5c is a schematic diagram of the semiconductor structure seen from direction B in Fig. 5b;

FIG. 5d is a schematic diagram of the structure in FIG. 5c where there is a surface that is not effectively doped.

detailed description

In order to make the object, technical solution and beneficial effects of the present invention more clear, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

FIG. 1 exemplarily shows a schematic diagram of a semiconductor structure including multiple types of MOS transistors to which the embodiment of the present invention is applicable. As shown in FIG. 1 , the semiconductor structure includes a substrate 101 , a dielectric layer 106 , a gate 105 , a metal layer 107 , and a passivation layer 108 from bottom to top. Wherein, the substrate of the semiconductor structure includes multiple MOS transistors of different types. The substrate 101 includes a doped region, and the doped region includes a first well region 104, a first heavily doped region 103, a first lightly doped region 102, a second well region 204, and a second heavily doped region 203 , the second lightly doped region 202 . Different MOS tubes are separated by MOS tube spacers 109 , and the MOS tube spacers 109 may be silicon dioxide. In Fig. 1, preferably, the first well region 104 can be a P-type well region, at this time the first heavily doped region is an N+ heavily doped region, the first lightly doped region is an N-type lightly doped region, and the second The well region 204 can be an N-type well region, in which case the second heavily doped region is a P+ heavily doped region, and the second lightly doped region is a P-type lightly doped region. The structure of the gate 105 specifically includes: a gate oxide layer, and a gate covering the upper surface of the gate oxide layer.

Fig. 2 exemplarily shows a schematic diagram of another semiconductor structure including a single type MOS transistor provided by an embodiment of the present invention. As shown in Fig. metal layer 407 . The substrate 401 includes a doped region, and the doped region includes a lightly doped region 404 , a well region 403 and a heavily doped region 402 . The embodiments of the present invention are applicable to semiconductors with any structure, and FIG. 1 and FIG. 2 are only schematic diagrams illustrating semiconductor structures, which limit the scope of application of the embodiments of the present invention.

In the embodiment of the present invention, through the failure analysis method of the semiconductor structure, since the volume ratio of the dyeing solution in the embodiment of the present invention is 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid in the embodiment of the present invention, therefore, after dyeing The doped region can show the complete doped region morphology of each region, and then it can be judged whether each doped region is effective, and then it can be judged whether each region is a failure region. Furthermore, it can also be judged whether the shape or area of the effective doped surface of each doped region meets the requirement, and then it can be judged whether each region is a failure region.

FIG. 3 exemplarily shows a schematic flowchart of a failure analysis method for a semiconductor structure provided by an embodiment of the present invention.

Based on the foregoing, an embodiment of the present invention provides a failure analysis method for a semiconductor structure, as shown in FIG. 3 , including the following steps:

Step 301, soaking the semiconductor to be observed in a pretreatment solution for a first period of time to expose the doped region of the semiconductor to be observed;

Step 302, soaking the semiconductor to be observed with the exposed doping region in a dyeing solution for a second period of time, so as to dye the doped region of the semiconductor to be observed; wherein, the dyeing solution includes 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid , the volume ratio of 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid is 1:20:7;

Step 303, determining the effective doping surface of each doped region of the semiconductor to be observed after dyeing;

Step 304, according to the effective doped surface of each doped region, determine whether each doped region of the semiconductor to be observed is effective.

In the above step 301, the semiconductor to be observed is determined first. The substrate of the semiconductor structure in the embodiment of the present invention may include a single type of MOS transistor, for example, a double-diffused metal oxide semiconductor (DMOS for short) and the like. The substrate in the embodiment of the present invention includes various types of MOS transistors, such as complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS for short).

In the above step 301, preferably, the semiconductor to be observed is immersed in the pretreatment solution for a first period of time to expose the doped region of the semiconductor to be observed, specifically including:

Putting the semiconductor to be observed into the pretreatment solution and soaking it for a first period of time, so that the dielectric layer covering the doped region of the semiconductor to be observed is removed by the pretreatment solution, so that the metal layer and passivation layer covering the dielectric layer are Exfoliation, exposing the doped regions of the semiconductor to be observed. Preferably, the pretreatment solution is 49% hydrofluoric acid. Preferably, the first duration is 10-20 minutes. In the embodiment of the present invention, preferably, the first duration is set to 10 minutes.

As shown in FIG. 1 , since the well region, the heavily doped region and the lightly doped region of the semiconductor are covered with a dielectric layer, the dielectric layer contains a gate, and the dielectric layer is covered with a metal layer and a passivation layer in turn. Now, put the semiconductor into the pretreatment solution and soak for the first time, then the dielectric layer in the semiconductor reacts with 49% hydrofluoric acid, and then the dielectric layer is removed from the semiconductor by 49% hydrofluoric acid. Because the gate, metal layer and passivation layer lose the structure of attachment, the metal layer and passivation layer are separated from the semiconductor substrate, and the well region, heavily doped region and lightly doped region in the semiconductor substrate of the dielectric layer are removed. The doped regions are exposed, as shown in Figure 4a. Fig. 4a exemplarily shows a schematic diagram of the semiconductor structure shown in Fig. 1 after soaking in the pretreatment solution for a first period of time.

In the above step 302, the semiconductor to be observed exposed to the well region, the heavily doped region and the lightly doped region is put into a staining solution of 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid with a volume ratio of 1:20:7 Soaking in the medium for a second length of time, so that the exposed well region, heavily doped region and lightly doped region of the semiconductor to be observed is dyed; preferably, the second duration is 15-20 seconds, or the second duration is 20-25 seconds, this In the embodiment of the invention, the second duration is 20 seconds as an example for introduction.

Preferably, in the embodiment of the present invention, the doping concentration of the well region is lower than that of the lightly doped region, and the doping concentration of the lightly doped region is lower than that of the heavily doped region. As shown in FIG. 4b, FIG. 4b exemplarily shows a schematic structural diagram of the semiconductor structure shown in FIG. 4a after dyeing. As shown in Figure 4b, the exposed semiconductor well region, heavily doped region and lightly doped region react with the dyeing solution respectively, and the dyeing solution corrodes the doped region, and the higher the doping concentration in a certain region , after the dyeing solution etches the region for a certain period of time, the etching depth of the region becomes deeper. As shown in Figure 4b, after dyeing, the etched depth of the well region is the shallowest, and the etched depth of the lightly doped region is the shallowest. The depth is second, the heavily doped region has the deepest corroded depth, and the doped regions with different doping concentrations are stepped, and each step surface corresponds to a doped region, as shown in Figure 4b. Step surface 200 is shown. That is to say, after the semiconductor to be observed exposing the doped region is soaked in the dyeing solution for a second period of time, the determination of each doped region of the semiconductor to be observed after dyeing Before effectively doping the surface, also include:

determining each of the doped regions of the semiconductor to be observed after dyeing;

Wherein, after dyeing, the doped regions of different doping concentrations of the semiconductor to be observed are corroded by the dyeing solution to different depths, and the doped regions of different doping concentrations are stepped, each The stepped surface corresponds to a doped region.

FIG. 4c exemplarily shows a schematic diagram of the semiconductor structure viewed from A in FIG. 4b. As shown in Figure 4c, the A-direction view in Figure 4b is viewed from above, and for each of the doped regions, according to the junction morphology of the doped regions corroded by the dyeing solution, the to-be-observed state after dyeing is determined. The effectively doped surface of each of the doped regions of the semiconductor; wherein, the etching depth of the effectively doped surface of each of the doped regions is greater than the etching depth of the non-effectively doped surface of the doped region.

That is to say, for each doped region, due to the area with high doping concentration, the corrosion rate of the dyeing solution is relatively high, so when the doped region is corroded by the dyeing solution for a certain period of time, the effective The doped surface will be etched deeper, and the surface not effectively doped will be etched shallower. In this way, the boundary division between the doped regions can be easily judged by observing the depth of each doped region. As shown in FIG. 5 c , the boundary division between the first heavily doped region 103 and the first lightly doped region 102 is relatively obvious.

Further, according to the effective doped surface of each doped region, determine whether each doped region of the semiconductor to be observed is effective, specifically refers to:

For each doped region, if the area of the effective doped surface of the doped region does not meet the preset requirements or the shape of the effective doped surface does not meet the preset requirements, then determine the doped zone failure.

Preferably, the surface of each doped region of the semiconductor to be observed after dyeing is observed by an optical microscope or a scanning electron microscope to determine the effective doping surface of each doped region of the semiconductor to be observed after dyeing, Improved ease of failure analysis of semiconductor structures.

The embodiment of the present invention can clearly present the morphology of the doped region of each doped region, and FIG. 4d exemplarily shows a schematic structural view of the surface without effective doping in FIG. 4c. As shown in Figure 4d, there are surfaces 502 that are not effectively doped in the first heavily doped region 103 and the second heavily doped region 203. The first heavily doped region 103 and the second heavily doped region 203 of the surface 502 fail. In actual operation, such situations often occur, for example, it is pre-required that the part to be doped in the first heavily doped region 103 is rectangular. However, usually after doping, the effectively doped surface may have an irregular shape, for example, the effectively doped surface lacks one or two rectangular corners, as shown in FIG. 4d. In the embodiment of the present invention, the morphology of the doped region of a single region can be completely reproduced, so that it can be seen whether the doped part of each region meets the requirements, thereby avoiding the problem in the prior art that it is only possible to roughly see whether a single region is doped. Doping is done, but there is no question of whether the doped part of the single region meets the requirements. The effective doping in the embodiment of the present invention specifically means that the doping parameters such as the doping concentration of the region meet the requirements.

The following will introduce the semiconductor structure including a single type of MOS transistor shown in FIG. 2 . The semiconductor to be observed includes a single type of MOS transistor; the doped region includes a shallowly doped region, a well region and a heavily doped region, wherein the doping concentration of the shallowly doped region is lower than that of the well region. impurity concentration, the doping concentration of the well region is lower than the doping concentration of the heavily doped region.

Put the semiconductor shown in FIG. 2 into the pretreatment solution and soak for a first period of time to expose the doped region of the semiconductor to be observed. The obtained semiconductor structure is shown in FIG. 5a. FIG. 5a schematically shows the The semiconductor structure shown is obtained after soaking the semiconductor in the pretreatment solution for a first period of time.

Put the semiconductor shown in Figure 5a into the dyeing solution and soak for a second period of time, so as to dye the doped region of the semiconductor to be observed, and obtain a schematic diagram of the semiconductor structure after dyeing, as shown in Figure 5b, which is an exemplary illustration A schematic diagram of the semiconductor structure shown in Figure 5a after dyeing is shown. Wherein, the staining solution includes 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid, and the volume ratio of the 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid is 1:20:7. After dyeing, the doped regions of different doping concentrations of the semiconductor to be observed are corroded by the dyeing solution to different depths, and the doped regions of different doping concentrations are stepped, and each step surface Corresponding to one doped region, the second stepped surface 400 as shown in FIG. 5b.

FIG. 5c exemplarily shows a schematic diagram of the semiconductor structure seen from direction B in FIG. 5b. As shown in Figure 5c, observe the B-direction view in Figure 5 from a top view, for each of the doped regions, according to the junction morphology of the doped regions corroded by the dyeing solution, determine the to-be-observed state after dyeing The effectively doped surface of each of the doped regions of the semiconductor; wherein, the etching depth of the effectively doped surface of each of the doped regions is greater than the etching depth of the non-effectively doped surface of the doped region.

FIG. 5d exemplarily shows a schematic view of the structure of the surface in FIG. 5c that is not effectively doped. As shown in FIG. 5 d , there is an undoped surface 502 in the heavily doped region 402 . At this time, it can be determined that the heavily doped region 402 is invalid based on the irregular shape.

It can be seen from the above that in the embodiment of the present invention, the semiconductor to be observed is first stripped to expose the well region, heavily doped region and lightly doped region in the semiconductor substrate, and then through The dyeing method is to dye the well region, the heavily doped region and the lightly doped region, and then perform failure analysis, which is simple in operation, good in effect and low in cost.

On the other hand, as shown in FIG. 4c, in the embodiment of the present invention, the topography of the doped region on the entire semiconductor substrate can be viewed from above, which expands the observation field and increases the importance of failure analysis.

In the third aspect, in the embodiment of the present invention, the morphology of the doped region of a single region can be completely reproduced, so that it can be seen whether the doped part of each region meets the requirements, thereby avoiding the problem of only roughly seeing in the prior art Whether a single region is doped, but there is no question of whether the doped part of the single region meets the requirements. The effective doping in the embodiment of the present invention specifically means that the doping parameters such as the doping concentration of the region meet the requirements.

While preferred embodiments of the invention have been described, additional changes and modifications to these embodiments can be made by those skilled in the art once the basic inventive concept is appreciated. Therefore, it is intended that the appended claims be construed to cover the preferred embodiment as well as all changes and modifications which fall within the scope of the invention.

Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.

Claims (10)

1. A failure analysis method for a semiconductor structure, comprising the following steps: Soaking the semiconductor to be observed in the pretreatment solution for a first period of time to expose the doped region of the semiconductor to be observed; Putting the semiconductor to be observed exposed to the doped region into a dyeing solution for a second period of time, so as to dye the doped region of the semiconductor to be observed; wherein the dyeing solution includes 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid, the volume proportion of described 49% hydrofluoric acid, 70% nitric acid and glacial acetic acid is 1:20:7; determining the effective doping surface of each of the doped regions of the semiconductor to be observed after dyeing; Whether each doped region of the semiconductor to be observed is effective is determined according to the effective doped surface of each doped region. 2. The method according to claim 1, characterized in that, after the semiconductor to be observed exposing the doped region is soaked in a dyeing solution for a second period of time, the determined semiconductor to be observed after dyeing is Before observing the effectively doped surface of each said doped region of the semiconductor, further comprising: determining each of the doped regions of the semiconductor to be observed after dyeing; Wherein, after dyeing, the doped regions of different doping concentrations of the semiconductor to be observed are corroded by the dyeing solution to different depths, and the doped regions of different doping concentrations are stepped, each The stepped surface corresponds to a doped region. 3. The method according to claim 2, wherein the determining the effective doping surface of each doped region of the semiconductor to be observed after the dyeing comprises: For each of the doped regions, according to the junction morphology of the doped regions corroded by the dyeing solution, determine the effective doped surface of each of the doped regions of the semiconductor to be observed after dyeing; Wherein, the etching depth of the effectively doped surface of each doped region is greater than the etching depth of the non-effectively doped surface of the doped region. 4. The method according to claim 3, wherein, according to the effective doped surface of each of the doped regions, it is determined whether each of the doped regions of the semiconductor to be observed is effective, Specifically refers to: For each doped region, if the area of the effective doped surface of the doped region does not meet the preset requirements or the shape of the effective doped surface does not meet the preset requirements, then determine the doped zone failure. 5. The method according to claim 1 or 3, wherein the determining the effective doping surface of each doped region of the semiconductor to be observed after the dyeing specifically comprises: Observing the surface of each doped region of the semiconductor to be observed after dyeing through an optical microscope or a scanning electron microscope to determine the effective doping surface of each doped region of the semiconductor to be observed after dyeing . 6. The method according to claim 1, wherein the semiconductor to be observed comprises a plurality of different types of MOS transistors; The doped region includes a well region, a lightly doped region and a heavily doped region, wherein the doping concentration of the well region is less than that of the lightly doped region, and the doping concentration of the lightly doped region The concentration is less than the doping concentration of the heavily doped region. 7. The method according to claim 1, wherein the semiconductor to be observed comprises a single type of MOS transistor; The doped region includes a shallow doped region, a well region and a heavily doped region, wherein the doping concentration of the shallow doped region is less than that of the well region, and the doping concentration of the well region is less than The doping concentration of the heavily doped region. 8. The method according to claim 1, wherein the step of soaking the semiconductor to be observed in the pretreatment solution for a first period of time to expose the doped region of the semiconductor to be observed specifically includes: soaking the semiconductor to be observed in the pretreatment solution for a first period of time, so that the dielectric layer covering the doped region of the semiconductor to be observed is removed by the pretreatment solution, so that the The metal layer and passivation layer above the dielectric layer fall off, exposing the doped region of the semiconductor to be observed. 9. The method of claim 1, wherein the pretreatment solution is 49% hydrofluoric acid. 10. The method according to claim 1, characterized in that, the first duration is 10-20 minutes; The second duration is 15-20 seconds, or the second duration is 20-25 seconds.