CN106340498B - A kind of encapsulating structure and its manufacturing method with electromagnetic shielding grounding function - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
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- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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Abstract
Description
技术领域technical field
本发明涉及一种具有电磁屏蔽接地功能的封装结构及其制造方法,属于半导体封装技术领域。The invention relates to a packaging structure with electromagnetic shielding and grounding functions and a manufacturing method thereof, belonging to the technical field of semiconductor packaging.
背景技术Background technique
由于射频封装结构容易受到外界的电磁干扰,当其被安装在电路板上时,应特别注意相互间的干扰,以免运作发生异常。为了达到屏蔽的效果,在芯片上方设置屏蔽组件,并将屏蔽组件接地,这样就能屏蔽芯片以免受到外界的电磁干扰。屏蔽组件接地的方式有多种,有如图1所示,在基板上方设置多个接地导体40,屏蔽层70,屏蔽层70和接地导体40接触,并接地,以此进行电磁屏蔽,该结构中接地导体是一个个放置在基板上的,作业时间较长,而且接地导体是用锡膏或者导电胶,通过回流焊或者加热固化之后形成,可能形成的高度有差异,导致切割的时候可能没有切割到相应的位置,这就会使得屏蔽层和接地导体接触不良,屏蔽层无法接地,当然影响了屏蔽功能。Since the RF package structure is susceptible to external electromagnetic interference, when it is mounted on a circuit board, special attention should be paid to mutual interference to avoid abnormal operation. In order to achieve the shielding effect, a shielding component is arranged above the chip, and the shielding component is grounded, so that the chip can be shielded from external electromagnetic interference. There are many ways to ground the shielding component. As shown in FIG. 1, a plurality of grounding conductors 40 are arranged above the substrate, and the shielding layer 70 is in contact with the grounding conductor 40, and grounded to perform electromagnetic shielding. In this structure The grounding conductors are placed on the substrate one by one, and the working time is long, and the grounding conductors are made of solder paste or conductive adhesive, which are formed after reflow soldering or heating and curing. There may be differences in the height of the formation, which may result in no cutting when cutting. To the corresponding position, this will cause poor contact between the shielding layer and the grounding conductor, and the shielding layer cannot be grounded, which of course affects the shielding function.
发明内容Contents of the invention
本发明所要解决的技术问题是针对上述现有技术提供一种具有电磁屏蔽接地功能的封装结构及其制造方法,它能够解决现有技术中接地效果不良的问题,能提高生产效率,简化工艺,起到很好的电磁屏蔽效果。The technical problem to be solved by the present invention is to provide a packaging structure with electromagnetic shielding and grounding function and its manufacturing method for the above-mentioned prior art, which can solve the problem of poor grounding effect in the prior art, improve production efficiency, simplify the process, Play a very good electromagnetic shielding effect.
本发明解决上述问题所采用的技术方案为:一种具有电磁屏蔽接地功能的封装结构,它包括基板,所述基板包括接地线路,所述基板正面贴装有板材,所述板材包括自上而下依次布置的粘性胶层、非导电介质层和铜箔层,所述铜箔层与接地线路相连接,所述板材上设置有开孔,所述开孔上方架设有芯片,所述芯片正面通过多个焊锡凸块与基板相连接,所述芯片外围包封有塑封料,所述基板侧面、板材侧面以及塑封料外表面均包覆有屏蔽金属层,所述屏蔽金属层与铜箔层侧面相连接。The technical solution adopted by the present invention to solve the above problems is: a packaging structure with electromagnetic shielding and grounding functions, which includes a substrate, the substrate includes a grounding line, and a plate is mounted on the front of the substrate, and the plate includes a top-to-bottom A viscous adhesive layer, a non-conductive medium layer, and a copper foil layer are arranged in sequence, the copper foil layer is connected to the grounding line, an opening is provided on the board, a chip is erected above the opening, and the front side of the chip is Connected to the substrate through a plurality of solder bumps, the periphery of the chip is encapsulated with a plastic encapsulant, the side of the substrate, the side of the plate and the outer surface of the plastic encapsulant are covered with a shielding metal layer, the shielding metal layer and the copper foil layer connected sideways.
所述开孔内填充有塑封料。The opening is filled with plastic sealing compound.
一种具有电磁屏蔽接地功能的封装结构的制造方法,所述方法包括以下步骤:A method for manufacturing a packaging structure with an electromagnetic shielding and grounding function, the method comprising the following steps:
步骤一、取一板材,所述板材共有三层,第一层为粘性胶,中间一层为非导电介质,最下面一层为铜箔;Step 1. Take a board. The board has three layers. The first layer is viscous glue, the middle layer is non-conductive medium, and the bottom layer is copper foil;
步骤二、将步骤一中的板材做开孔处理;Step 2. Opening the plate in step 1;
步骤三、将芯片倒置贴装于开孔处,芯片背面边缘与开孔上表面边缘贴合,芯片背面有制作好的焊锡凸块;Step 3. Mount the chip upside down on the hole, the edge of the back of the chip is attached to the edge of the upper surface of the hole, and there are solder bumps on the back of the chip;
步骤四、将整片板材与基板贴合,并通过回流焊工艺使焊锡凸块与基板电性连接,且基板上的接地线路与板材的铜箔进行电性连接,形成接地结构;Step 4, attaching the entire plate to the substrate, and electrically connecting the solder bumps to the substrate through a reflow process, and electrically connecting the grounding circuit on the substrate to the copper foil of the plate to form a grounding structure;
步骤五、芯片外围进行塑封料包封;Step 5, encapsulating the periphery of the chip with a plastic encapsulant;
步骤六、将包封后的半成品切割成单颗单元;Step 6. Cutting the encapsulated semi-finished product into single units;
步骤七、将切割后的单颗单元表面覆盖屏蔽金属层。Step 7. Cover the surface of the cut single unit with a shielding metal layer.
步骤一中的板材的四个角和边缘区域有用于识别的定位标记点。The four corners and edge areas of the board in step 1 have positioning mark points for identification.
所述定位标记点为方形、十字形或梯形。The positioning mark points are square, cross or trapezoidal.
所述开孔处理方式为镭射方式、机械冲切方式或蚀刻方式。The opening processing method is a laser method, a mechanical punching method or an etching method.
所述孔的尺寸小于目标芯片的尺寸。The size of the hole is smaller than the size of the target chip.
所述孔呈矩阵方式排列。The holes are arranged in a matrix.
所述板材与基板贴合的方式为导电胶黏合方式、焊料连接方式或机械卡接连接方式。The bonding method of the plate and the substrate is a conductive adhesive bonding method, a solder connection method or a mechanical clip connection method.
所述覆盖屏蔽金属层的方式是化学汽相沉积、化学电镀、电解电镀、喷涂、印刷或溅镀的工艺方法。The method of covering the shielding metal layer is chemical vapor deposition, chemical electroplating, electrolytic electroplating, spraying, printing or sputtering.
与现有技术相比,本发明的优点在于:Compared with the prior art, the present invention has the advantages of:
1、用于接地的铜箔被塑封料和基板之间的粘性材料粘接,避免了在切割时因切割应力导致接地铜块剥离的几率,降低了因接地不良导致屏蔽效果不良的问题;1. The copper foil used for grounding is bonded by the viscous material between the plastic sealant and the substrate, which avoids the possibility of peeling off the grounding copper block due to cutting stress during cutting, and reduces the problem of poor shielding effect caused by poor grounding;
2、采用先贴装芯片,后贴装整块铜箔,然后整体回流的方式,提升效率,从而降低了生产成本;2. Adopt the method of mounting the chip first, then mounting the whole piece of copper foil, and then reflowing the whole to improve efficiency and reduce production costs;
3、本发明还易于实现芯片底部空腔和芯片底部填充的方式,其中芯片底部的空腔方式可用于一种表面声波传感器的封装;3. The present invention is also easy to implement the cavity at the bottom of the chip and the filling method at the bottom of the chip, wherein the cavity at the bottom of the chip can be used for the packaging of a surface acoustic wave sensor;
4、整片板材和整片基板进行贴合,可简化工艺,节省材料和时间;4. The whole sheet and the whole substrate are laminated, which can simplify the process and save materials and time;
5、接地导体不需要单颗进行设置,可整体形成,提高效率,增加产品可靠性。5. The grounding conductor does not need to be set up individually, but can be formed as a whole to improve efficiency and increase product reliability.
附图说明Description of drawings
图1为现有的一种屏蔽组件接地方式的示意图。FIG. 1 is a schematic diagram of a conventional grounding method of a shielding component.
图2为本发明一种具有电磁屏蔽接地功能的封装结构的示意图。FIG. 2 is a schematic diagram of a packaging structure with electromagnetic shielding and grounding functions according to the present invention.
图3为本发明一种具有电磁屏蔽接地功能的封装结构另一实施例的示意图。FIG. 3 is a schematic diagram of another embodiment of a packaging structure with an electromagnetic shielding and grounding function according to the present invention.
图4~图10为本发明一种具有电磁屏蔽接地功能的封装结构的制造方法的各工序流程图。4 to 10 are process flow charts of a manufacturing method of a packaging structure with an electromagnetic shielding and grounding function according to the present invention.
图11、图12为本发明一种具有电磁屏蔽接地功能的封装结构的基板上每个单元接地线路设计的示意图。Fig. 11 and Fig. 12 are schematic diagrams of the design of the grounding circuit of each unit on the substrate of a package structure with electromagnetic shielding and grounding function according to the present invention.
其中:in:
基板1Substrate 1
接地线路1.1Ground Line 1.1
板材2Plate 2
粘性胶层2.1Adhesive adhesive layer 2.1
非导电介质层2.2Non-conductive dielectric layer 2.2
铜箔层2.3Copper foil layer 2.3
开孔3Hole 3
芯片4chip 4
焊锡凸块5Solder bump 5
塑封料6Plastic compound 6
屏蔽金属层7shielding metal layer 7
接地线路8。Ground line 8.
具体实施方式Detailed ways
以下结合附图实施例对本发明作进一步详细描述。The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.
如图2所示,本实施例中的一种具有电磁屏蔽接地功能的封装结构,它包括基板1,所述基板1包括接地线路1.1,所述基板1正面贴装有板材2,所述板材2包括自上而下依次布置的粘性胶层2.1、非导电介质层2.2和铜箔层2.3,所述铜箔层2.3与接地线路1.1相连接,所述板材2上设置有开孔3,所述开孔3上方架设有芯片4,所述芯片4背面通过多个焊锡凸块5与基板1相连接,所述芯片4外围包封有塑封料6,所述基板1和板材2侧面以及塑封料6外表面均包覆有屏蔽金属层7,所述屏蔽金属层7与铜箔层2.3侧面相连接。As shown in Figure 2, a packaging structure with electromagnetic shielding and grounding functions in this embodiment includes a substrate 1, the substrate 1 includes a grounding circuit 1.1, and a plate 2 is mounted on the front of the substrate 1, and the plate 2 includes a viscous adhesive layer 2.1, a non-conductive medium layer 2.2 and a copper foil layer 2.3 arranged in sequence from top to bottom, the copper foil layer 2.3 is connected to the grounding line 1.1, and the board 2 is provided with an opening 3, so A chip 4 is erected above the opening 3, the back of the chip 4 is connected to the substrate 1 through a plurality of solder bumps 5, the periphery of the chip 4 is encapsulated with a plastic encapsulant 6, the sides of the substrate 1 and the plate 2 and the plastic seal The outer surface of the material 6 is coated with a shielding metal layer 7, and the shielding metal layer 7 is connected to the side of the copper foil layer 2.3.
如图3所示,本实施例中的开孔3内填充有塑封料6。As shown in FIG. 3 , the opening 3 in this embodiment is filled with a molding compound 6 .
其制作方法如下:Its production method is as follows:
步骤一、参见图4,取一特殊的板材,其共有三层,第一层为粘性胶,中间一层为非导电介质(具有一定的弹性),最下面一层为铜箔;该板材的四个角和边缘区域有用于识别的定位标记点,该定位标记点可为方形、十字形或梯形等形状;Step 1, see Figure 4, take a special plate, which has three layers, the first layer is viscous glue, the middle layer is non-conductive medium (with certain elasticity), and the bottom layer is copper foil; The four corners and the edge area have positioning mark points for identification, which can be in the shape of square, cross or trapezoid;
步骤二、参见图5,将步骤一中的板材做开孔处理,处理方式可为镭射方式、机械冲切方式或蚀刻方式,其孔的尺寸小于芯片尺寸;Step 2. Referring to Figure 5, the plate in step 1 is processed by opening holes. The processing method can be laser method, mechanical punching method or etching method, and the size of the hole is smaller than the chip size;
所述孔呈矩阵方式排列;The holes are arranged in a matrix;
步骤三、参见图6,将芯片倒置贴装于开孔处,芯片背面边缘与孔边缘贴合,芯片背面有制作好的焊锡凸块;Step 3, see Figure 6, mount the chip upside down on the opening, the edge of the back of the chip is attached to the edge of the hole, and there are solder bumps on the back of the chip;
步骤四、参见图7,将整片板材与基板贴合,通过回流焊工艺使焊锡凸块与基板电性连接,且基板上的接地线路与板材的铜箔进行电性连接,形成接地结构;Step 4. Referring to FIG. 7 , attach the entire sheet to the substrate, electrically connect the solder bumps to the substrate through a reflow process, and electrically connect the grounding line on the substrate to the copper foil of the sheet to form a grounding structure;
所述基板上的接地线路设计可以为单颗产品线路周围连续的环形结构,参见图11;或者单颗产品线路周围分散的形状,可以为矩形,圆形,椭圆形以及不规则的形状,数量可以单个或多个,参见图12;The design of the grounding line on the substrate can be a continuous ring structure around a single product line, see Figure 11; or a scattered shape around a single product line, which can be rectangular, circular, elliptical or irregular, and the quantity Can be single or multiple, see Figure 12;
步骤五、参见图8,芯片外围进行塑封料包封;Step 5, see Figure 8, encapsulate the periphery of the chip with plastic encapsulant;
如果芯片底部需要填充的话,需要在板材上进行开槽,以便于塑封料的流动;如果芯片底部需要保持空腔结构,则无需在板材上做开槽处理;If the bottom of the chip needs to be filled, grooves need to be made on the board to facilitate the flow of the molding compound; if the bottom of the chip needs to maintain a cavity structure, there is no need to make grooves on the board;
步骤六、参见图9,将包封后的半成品切割成单颗单元,侧面露出板材;Step 6, see Figure 9, cut the encapsulated semi-finished product into a single unit, with the plate exposed on the side;
步骤七、参见图10,将切割后的单颗单元表面覆盖屏蔽金属层,屏蔽金属层可为金、银、铜、镍、铬、锡、铝等或以上多种金属材料的组合,其屏蔽接地通过板材侧面和基板的接地线路来实现,覆盖方式可以是化学汽相沉积、化学电镀、电解电镀、喷涂、印刷或溅镀等工艺方法。Step 7. Referring to Figure 10, cover the surface of the single unit after cutting with a shielding metal layer. The shielding metal layer can be gold, silver, copper, nickel, chromium, tin, aluminum, etc. or a combination of multiple metal materials. The grounding is realized through the grounding line on the side of the plate and the substrate, and the covering method can be chemical vapor deposition, chemical electroplating, electrolytic plating, spraying, printing or sputtering.
除上述实施例外,本发明还包括有其他实施方式,凡采用等同变换或者等效替换方式形成的技术方案,均应落入本发明权利要求的保护范围之内。In addition to the above-mentioned embodiments, the present invention also includes other implementations, and any technical solution formed by equivalent transformation or equivalent replacement shall fall within the protection scope of the claims of the present invention.
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101690442A (en) * | 2007-07-09 | 2010-03-31 | 大自达系统电子株式会社 | High frequency module having shielding and heat dissipating characteristics and method for manufacturing the same |
US8062930B1 (en) * | 2005-08-08 | 2011-11-22 | Rf Micro Devices, Inc. | Sub-module conformal electromagnetic interference shield |
CN103413766A (en) * | 2013-08-06 | 2013-11-27 | 江苏长电科技股份有限公司 | Etching-first-packaging-second upside-upward-installation three-dimensional system-in-package metal circuit board structure and process method |
TW201513295A (en) * | 2013-09-27 | 2015-04-01 | Azurewave Technologies Inc | Module IC package structure with electrical shielding function and method of making the same |
Family Cites Families (1)
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8062930B1 (en) * | 2005-08-08 | 2011-11-22 | Rf Micro Devices, Inc. | Sub-module conformal electromagnetic interference shield |
CN101690442A (en) * | 2007-07-09 | 2010-03-31 | 大自达系统电子株式会社 | High frequency module having shielding and heat dissipating characteristics and method for manufacturing the same |
CN103413766A (en) * | 2013-08-06 | 2013-11-27 | 江苏长电科技股份有限公司 | Etching-first-packaging-second upside-upward-installation three-dimensional system-in-package metal circuit board structure and process method |
TW201513295A (en) * | 2013-09-27 | 2015-04-01 | Azurewave Technologies Inc | Module IC package structure with electrical shielding function and method of making the same |
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