CN106300966A - A kind of for power analysis instrument power module - Google Patents
A kind of for power analysis instrument power module Download PDFInfo
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- CN106300966A CN106300966A CN201610905737.7A CN201610905737A CN106300966A CN 106300966 A CN106300966 A CN 106300966A CN 201610905737 A CN201610905737 A CN 201610905737A CN 106300966 A CN106300966 A CN 106300966A
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- 238000006243 chemical reaction Methods 0.000 claims abstract description 35
- 230000001360 synchronised effect Effects 0.000 claims description 37
- 238000005070 sampling Methods 0.000 claims description 20
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- 238000007493 shaping process Methods 0.000 claims description 16
- 230000005611 electricity Effects 0.000 claims description 12
- 230000008878 coupling Effects 0.000 claims description 5
- 238000010168 coupling process Methods 0.000 claims description 5
- 238000005859 coupling reaction Methods 0.000 claims description 5
- 230000009514 concussion Effects 0.000 abstract description 3
- 238000004146 energy storage Methods 0.000 abstract description 3
- 239000000523 sample Substances 0.000 description 16
- 238000012360 testing method Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 238000007599 discharging Methods 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from DC input or output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Power Conversion In General (AREA)
- Dc-Dc Converters (AREA)
Abstract
The present invention relates to power circuit field, particularly a kind of for power analysis instrument power module.On the one hand the power module that the present invention provides utilizes sample rate current, sampled voltage combines the sawtooth waveforms control signal that control circuit sends and produces the sawtooth waveforms being arbitrarily designated waveform, on the other hand it is provided with anti-back flow circuit in circuit for power conversion front end, effectively prevent the device infringement that reverse irrigated current causes, it is provided with dummy load circuit at circuit for power conversion outfan, when effectively solving small voltage output, owing to PWM duty cycle drops to minimum, now power supply exports if zero load, owing to energy storage inductor can not work CCM pattern, can cause that PWM's is discontinuous, cause output concussion instability, ripple becomes big problem.
Description
Technical field
The present invention relates to power supply test field, particularly a kind of for power analysis instrument power module.
Background technology
Generally, when carrying out the test relevant to DC source, engineer must collect and configure multiple stage instrument, could be complete
Become direct current supply and measuring task.When performing these complex tasks, multiple stage test instrunment may be received simultaneously, thus increase
The risk made mistakes；To this end, engineer may select the automatic test complicated more than manual test, although but automatic test task
Manual errors can be reduced, but write, with debugging routine, the research and development engineer worked overloadingly is further increased work
Amount.And the appearance of DC source analyser avoids the debugging carrying out complexity before engineer uses multiple devices and test.Electricity
Source analyser enters the electric current of DUT by its built-in electric current kinetic measurement ability measurable flow, without such as current probe
Sensor this kind of with diverter；DC source analyser is without developing control and process of measurement, and all functions and measurement are the most integrated
In same equipment, without PC, driver and software, be equivalent to relevant workload be set decrease more than 90%；
User uses direct current supply that independent test equipment then just can complete with 2 day time and measures test assignment, uses unidirectional current
Source analyser just can be able to complete in 5 minutes.And usual, DC source analyser is integrated with circuit tester module, oscillograph mould
Block, random waveform generation module, data recordin module and multiple DC power supplier, wherein, multiple have different output work
One of the DC power supplier of rate most crucial device being undoubtedly power analysis instrument, power module carries the most defeated
Going out each clock power waveform task of given voltage value or specified current flow value, it needs higher stability, and power module is also simultaneously
Need other module compatible combinations with power analysis instrument.
Summary of the invention
The goal of the invention of the present invention is for the demand of each power module stability in DC source analyser, it is provided that
A kind of working stability, it is adaptable to particular power module circuit in power analysis instrument.
To achieve these goals, the technical solution used in the present invention is:
A kind of for power analysis instrument power module, including control circuit, power conversion module, sawtooth waveforms module；
Described sawtooth waveforms module includes that current sampling circuit, voltage sample circuit, mlultiplying circuit, feedback circuit and sawtooth waveforms occur
Circuit；Described current sampling circuit, voltage sample circuit are adopted from outfan and/or the load end collection of described circuit for power conversion
Sample electric current, sampled voltage, and described sample rate current, sampled voltage are respectively sent to described mlultiplying circuit and feedback circuit；
Described power conversion module include PWM drive circuit, circuit for power conversion, commutation driver circuit, circuit of synchronous rectification and
Output filter circuit；
Described control circuit sends sawtooth waveforms and controls signal to described saw-tooth wave generating circuit to produce benchmark sawtooth waveforms, this benchmark
Sawtooth waveforms combines sample rate current and/or sampled voltage produces and specifies waveform sawtooth waveforms；Described control circuit also specifies saw by described
Tooth ripple sends to PWM drive circuit as pwm control signal, to drive described circuit for power conversion to work；Described control circuit
Also send rectification drive control signal and drive the work of described circuit of synchronous rectification；
Being additionally provided with anti-back flow circuit before described circuit for power conversion, described anti-back flow circuit is used for will be from circuit for power conversion
The current earthing poured in down a chimney is derived.
Further, described circuit for power conversion includes the first transformator, the second transformator；
Described PWM drive circuit includes first control circuit, second control circuit, the 3rd control circuit, the 4th control circuit；
Described circuit of synchronous rectification includes the first circuit of synchronous rectification, the second circuit of synchronous rectification；
Described commutation driver circuit includes the first drive circuit, the second drive circuit；
Described first control circuit, second control circuit are connected with two terminations of described first transformer primary side respectively, respectively
The former limit of the first transformator is flowed through from different directions for controlling electric current；Described 3rd control circuit, the 4th control circuit are respectively
It is connected with two terminations of described second transformer primary side, is respectively used to control electric current and flows through the second transformator from different directions
Former limit；
The secondary of described first transformator and the first circuit of synchronous rectification connect；The secondary of described second transformator and second synchronizes
Rectification circuit connects；Described first drive circuit, the second drive circuit respectively with the first circuit of synchronous rectification, the second synchronous rectification
Circuit connects；It is respectively used to control the first circuit of synchronous rectification, the break-make of the second circuit of synchronous rectification；Described first synchronization is whole
Current circuit and the second circuit of synchronous rectification are connected with an output filter circuit simultaneously；
Described first control circuit, second control circuit, the 3rd control circuit, the 4th control circuit all include two inputs,
Two inputs are respectively used to be received from the most anti-phase two-way pwm control signal that control circuit spreads out of.
Further, described first control circuit includes that a PWM driving chip, the first gate-controlled switch and second are controlled and opens
Close；
The drain electrode of described first gate-controlled switch is connected with power input, the source electrode and described second of described first gate-controlled switch can
The drain electrode of control switch connects；The source ground of described second gate-controlled switch；The first input end of a described PWM driving chip,
Second input is respectively used to receive the most anti-phase two-way pwm control signal, the first output of a described PWM driving chip
End, the second outfan connect the control end of the first gate-controlled switch, the second gate-controlled switch；Described first gate-controlled switch, second controlled
Switch connects the first termination of end and the first transformer primary side and connects；
Described second control circuit includes the 2nd PWM driving chip, the 3rd gate-controlled switch and the 4th gate-controlled switch；
The drain electrode of described 3rd gate-controlled switch is connected with power input, the source electrode and the described 4th of described 3rd gate-controlled switch can
The drain electrode of control switch connects；The source ground of described 4th gate-controlled switch；The first input end of described 2nd PWM driving chip,
Second input is respectively used to receive the most anti-phase two-way pwm control signal, the first output of described 2nd PWM driving chip
End, the second outfan connect the 3rd gate-controlled switch, the control end of the 4th gate-controlled switch；Described 3rd gate-controlled switch, the 4th controlled
Switch junction is connected with the second termination of the first transformer primary side.
Further, in described first control circuit, a described PWM driving chip and the first gate-controlled switch, second can
Also set up between control switch and include the first mu balanced circuit, the first shaping circuit；Described first gate-controlled switch also with the first peak absorbing
Circuit is attempted by between described power input and first transformer primary side the first termination；Described second gate-controlled switch is also with second
Peak absorbing circuit is attempted by between first transformer primary side the first termination and ground；
In described second control circuit, also wrap between described 2nd PWM driving chip and the 3rd gate-controlled switch, the 4th gate-controlled switch
Include the second mu balanced circuit, the second shaping circuit；Described 3rd gate-controlled switch is also attempted by described electricity with the 3rd peak absorbing circuit
Between source input and first transformer primary side the second termination；Described 4th gate-controlled switch also with the 4th peak absorbing circuit connecing
Between first transformer primary side the second termination and ground.
Further, described 3rd control circuit includes that the 3rd PWM driving chip, the 5th gate-controlled switch and the 6th are controlled and opens
Close；
The drain electrode of described 5th gate-controlled switch is connected with power input, the source electrode and the described 6th of described 5th gate-controlled switch can
The drain electrode of control switch connects；The source ground of described 6th gate-controlled switch；The first input end of described 3rd PWM driving chip,
Second input is respectively used to receive the most anti-phase two-way pwm control signal, the first output of described 3rd PWM driving chip
End, the second outfan connect the 5th gate-controlled switch, the control end of the 6th gate-controlled switch；Described 5th gate-controlled switch, the 6th controlled
Switch connects the first termination of end and the second transformer primary side and connects；
Described 4th control circuit includes the 4th PWM driving chip, the 7th gate-controlled switch and the 8th gate-controlled switch；
The drain electrode of described 7th gate-controlled switch is connected with power input, the source electrode and the described 8th of described 7th gate-controlled switch can
The drain electrode of control switch connects；The source ground of described 8th gate-controlled switch；
The first input end of described 4th PWM driving chip, the second input are respectively used to receive the most anti-phase two-way PWM control
Signal processed, the first outfan of described 4th PWM driving chip, the second outfan connect the 7th gate-controlled switch, the 8th controlled open
The control end closed；
Described 7th gate-controlled switch, the 8th gate-controlled switch junction are connected with the second termination of the second transformer primary side.
Further, in described 3rd control circuit, described 3rd PWM driving chip and the 5th gate-controlled switch, the 6th can
Also set up between control switch and include the 3rd mu balanced circuit, the 3rd shaping circuit；Described 5th gate-controlled switch also with the first peak absorbing
Circuit is attempted by between described power input and second transformer primary side the first termination；Described 6th gate-controlled switch is also with the 6th
Peak absorbing circuit is attempted by between second transformer primary side the first termination and ground；
In described 4th control circuit, also wrap between described 4th PWM driving chip and the 7th gate-controlled switch, the 8th gate-controlled switch
Include the 4th mu balanced circuit, the 4th shaping circuit；Described 7th gate-controlled switch is also attempted by described electricity with the first peak absorbing circuit
Between source input and second transformer primary side the second termination；Described 8th gate-controlled switch also with the second peak absorbing circuit connecing
Between second transformer primary side the second termination and ground.
Further, it is additionally provided with one between output and the output of described 4th control circuit of described second control circuit
Coupling transformer, for eliminating the ripple interference in two-way control circuit.
Further, described anti-back flow circuit includes detecting resistance, the 9th gate-controlled switch and the first amplifier；
First end of described detection resistance is connected with power input；The first electricity that second end of described detection resistance passes through and connects
Sense, the second inductance are connected with the gate-controlled switch in control circuit, and export electric current to it；
Second end of described detection resistance is by the first resistance, the second resistance and the first input end of the first amplifier that are sequentially connected in series
Connect；
First end of described detection resistance is connected by the second input of the 3rd resistance and the first amplifier.Described first amplifier
Outfan is connected by the control end of the 4th resistance and the 9th gate-controlled switch；
The source electrode of described 9th gate-controlled switch by the 5th resistance simultaneously with the second end of detection resistance and and connect the first inductance,
Second inductance connection；The drain electrode of described 9th gate-controlled switch is by the 6th resistance eutral grounding；
First end of described detection resistance is also by a diode and the 7th resistance of concatenation, the 8th resistance, the 9th resistance eutral grounding；
The first input end of the first amplifier is controlled also by the first electric capacity being sequentially connected in series, the second electric capacity, the tenth resistance and the 9th
The source electrode of switch connects；Second electric capacity of concatenation and the tenth resistance also with the 11st resistance connecing.
Further, be additionally provided with before described output filter circuit dummy load circuit and with described dummy load circuit；Institute
State dummy load circuit to include and the first sub-dummy load circuit of connecing and the second sub-dummy load circuit；
Described first sub-dummy load circuit includes the 21st gate-controlled switch, the second amplifier and concatenates with the 21st gate-controlled switch
The 21st resistance；
The source electrode of described 21st gate-controlled switch is connected with described 21st resistance, the source of described 21st gate-controlled switch
Pole is connected also by the reversed-phase output of the 25th resistance with described second amplifier；
The normal phase input end of described second amplifier is same with electric discharge reference input, voltage sampling input and current sample input
Time connect；
The output of described second amplifier connects the control end of described 21st gate-controlled switch by the 24th resistance；
The outfan of described second amplifier also passes sequentially through the 23rd resistance, the 21st electric capacity with self inverting input even
Connect；Described 23rd resistance, the 21st electric capacity also with the first diode connecing；The positive pole and second of described first diode
11 electric capacity connect, and negative pole and the 23rd resistance connect；
Described second sub-dummy load circuit includes the 22nd gate-controlled switch, the 3rd amplifier and concatenates with the 22nd gate-controlled switch
The 22nd resistance；
The source electrode of described 22nd gate-controlled switch is connected with described 22nd resistance, the source of described 22nd gate-controlled switch
Pole is connected also by the reversed-phase output of the 29th resistance with described 3rd amplifier；
The normal phase input end of described 3rd amplifier and normal phase input end and electric discharge reference input, voltage sampling input and electric current
Sampling input is simultaneously connected with；
The output of described 3rd amplifier connects the control end of described 22nd gate-controlled switch by the 31st resistance；
The outfan of described 3rd amplifier also passes sequentially through the 30th resistance, the 22nd electric capacity with self inverting input even
Connect；Described 30th resistance, the 22nd electric capacity also with the second diode connecing；The positive pole and the 20th of described second diode
Two electric capacity connect, and negative pole and the 30th resistance connect.
Further, also include auxiliary power circuit, for main power source being converted to the running voltage that modules needs.
In sum, owing to have employed technique scheme, the invention has the beneficial effects as follows:
On the one hand the power module that the present invention provides utilizes sample rate current, sampled voltage to combine the sawtooth waveforms control that control circuit sends
Signal processed produces the sawtooth waveforms being arbitrarily designated waveform, is on the other hand provided with anti-back flow circuit in circuit for power conversion front end, has
Effect prevents the device infringement that reverse irrigated current causes, and is provided with dummy load circuit at circuit for power conversion outfan, effectively solves little
During voltage output, owing to PWM duty cycle drops to minimum, now power supply exports if zero load, owing to energy storage inductor can not
Work to CCM pattern, can cause that PWM's is discontinuous, causes output concussion instability, and ripple becomes big problem；Meanwhile, in order to increase
Big output, the present invention provide circuit for power conversion by and two transformators connecing form, use the PWM that two-way is identical to control
Signal two transformators are controlled simultaneously (where like refer to that the signal controlling two transformators is identical, but PWM1,
PWM2 two paths of signals itself is the most anti-phase, and differs), increase output, adopt between two-way control circuit simultaneously
Eliminate ripple and noise with coupling transformer T6, improve circuit stability.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the power module that the present invention provides.
The structured flowchart of power model in Fig. 2 present invention.
Fig. 3 a is first control circuit in the present invention, second control circuit one specific embodiment structured flowchart.
Fig. 3 b is first control circuit in the present invention, another specific embodiment structured flowchart of second control circuit.
Fig. 4 a is the 3rd control circuit in the present invention, the 4th control circuit one specific embodiment structured flowchart.
Fig. 4 b is the 3rd control circuit in the present invention, another specific embodiment structured flowchart of the 4th control circuit.
Fig. 5 a is first control circuit in the present invention, the specific embodiment of second control circuit circuit diagram.
Fig. 5 b is the 3rd control circuit, the specific embodiment of the 4th control circuit circuit diagram in the present invention.
Fig. 6 is commutation driver circuit and rectification circuit circuit diagram specific embodiment in the present invention.
Fig. 7 is anti-back flow circuit circuit diagram.
Fig. 8 is the first peak absorbing circuit, the second peak absorbing circuit embodiment circuit diagram.
Fig. 9 is dummy load circuit embodiment circuit diagram.
Detailed description of the invention
Below in conjunction with the accompanying drawings, the present invention is described in detail.
In order to make the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, right
The present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, not
For limiting the present invention.
Embodiment 1: as it is shown in figure 1, the present embodiment provides one to be used for power analysis instrument power module, including controlling electricity
Road, power conversion module, sawtooth waveforms module；
Described sawtooth waveforms module includes that current sampling circuit, voltage sample circuit, mlultiplying circuit, feedback circuit and sawtooth waveforms occur
Circuit；Described current sampling circuit, voltage sample circuit are adopted from outfan and/or the load end collection of described circuit for power conversion
Sample electric current, sampled voltage, and described sample rate current, sampled voltage are respectively sent to described mlultiplying circuit and feedback circuit；
Described power conversion module include PWM drive circuit, circuit for power conversion, commutation driver circuit, circuit of synchronous rectification and
Output filter circuit；
Described control circuit sends sawtooth waveforms and controls signal to described saw-tooth wave generating circuit to produce benchmark sawtooth waveforms, this benchmark
Sawtooth waveforms combines sample rate current and/or sampled voltage produces and specifies waveform sawtooth waveforms；Described control circuit also specifies saw by described
Tooth ripple sends to PWM drive circuit as pwm control signal, to drive described circuit for power conversion to work；Described control circuit
Also send rectification drive control signal and drive the work of described circuit of synchronous rectification；
Being additionally provided with anti-back flow circuit before described circuit for power conversion, described anti-back flow circuit is used for will be from circuit for power conversion
The current earthing poured in down a chimney is derived.
As in figure 2 it is shown, described circuit for power conversion includes the first transformator, the second transformator；
Described PWM drive circuit includes first control circuit, second control circuit, the 3rd control circuit, the 4th control circuit；
Described circuit of synchronous rectification includes first circuit of synchronous rectification the 131, second circuit of synchronous rectification 132；
Described commutation driver circuit includes first drive circuit the 141, second drive circuit 142；
Described first control circuit 111, second control circuit two terminations with the described first former limit of transformator T3 respectively are connected,
It is respectively used to control electric current and flows through the former limit of the first transformator T3 from different directions；Described 3rd control circuit the 113, the 4th controls
Circuit 114 two terminations with the described second former limit of transformator T2 respectively are connected, and are respectively used to control electric current and flow from different directions
Former limit through the second transformator T2；
Secondary and first circuit of synchronous rectification 131 of described first transformator T3 connect；The secondary of described second transformator T2 with
Second circuit of synchronous rectification 132 connects；Described first drive circuit the 14141, second drive circuit 14242 is Tong Bu with first respectively
Rectification circuit the 131, second circuit of synchronous rectification 132 connects；It is same that it is respectively used to control the first circuit of synchronous rectification 131, second
The break-make of step rectification circuit 132；Described first circuit of synchronous rectification 131 and the second circuit of synchronous rectification 132 export with one simultaneously
Filter circuit 15 connects；
Described first control circuit 111, second control circuit the 112, the 3rd control circuit the 113, the 4th control circuit 114 all include
Two inputs, two inputs are respectively used to receive the most anti-phase two-way pwm control signal.
Fig. 6 gives drive circuit and rectification circuit circuit diagram specific embodiment in the present embodiment, and in figure, first drives electricity
Road 14141 includes that the first driver U2, the second drive circuit 14242 include the second driver U3, U2, U3 have respectively two defeated
Going out end, control the 12nd gate-controlled switch Q20, the 13rd gate-controlled switch Q21 in the first circuit of synchronous rectification 131 respectively, second is same
Tenth gate-controlled switch Q18, break-make Q19 of the 11st gate-controlled switch in step rectification circuit 132.
As shown in Fig. 3 b, Fig. 5 a, described first control circuit 111 includes a PWM driving chip U16, first controlled opens
Close Q10 and the second gate-controlled switch Q11；
The drain electrode of described first gate-controlled switch Q10 is connected with power input, the source electrode of described first gate-controlled switch Q10 is with described
The drain electrode of the second gate-controlled switch Q11 connects；The source ground of described second gate-controlled switch Q11；A described PWM driving chip
The first input end of U16, the second input are respectively used to receive the most anti-phase two-way pwm control signal, and a described PWM drives
Dynamic first outfan of chip U16, the second outfan connect the first gate-controlled switch Q10, the control end of the second gate-controlled switch Q11；
Described first gate-controlled switch Q10, the second gate-controlled switch Q11 connect first termination on end and the first former limit of transformator T3 and connect；
Described second control circuit 112 includes the 2nd PWM driving chip U10, the 3rd gate-controlled switch Q12 and the 4th gate-controlled switch
Q13；
The drain electrode of described 3rd gate-controlled switch Q12 is connected with power input, the source electrode of described 3rd gate-controlled switch Q12 is with described
The drain electrode of the 4th gate-controlled switch Q13 connects；The source ground of described 4th gate-controlled switch Q13；Described 2nd PWM driving chip
The first input end of U10, the second input are respectively used to receive the most anti-phase two-way pwm control signal, and described 2nd PWM drives
Dynamic first outfan of chip U10, the second outfan connect the 3rd gate-controlled switch Q12, the control end of the 4th gate-controlled switch Q13；
Described 3rd gate-controlled switch Q12, the 4th gate-controlled switch Q13 junction are connected with second termination on the first former limit of transformator T3.
As shown in Fig. 4 b, Fig. 5 b, described 3rd control circuit 113 includes the 3rd PWM driving chip U17, the 5th controlled opens
Close Q14 and the 6th gate-controlled switch；
The drain electrode of described 5th gate-controlled switch Q14 is connected with power input, the source electrode of described 5th gate-controlled switch Q14 is with described
The drain electrode of the 6th gate-controlled switch connects；The source ground of described 6th gate-controlled switch；The of described 3rd PWM driving chip U17
One input, the second input are respectively used to receive the most anti-phase two-way pwm control signal, described 3rd PWM driving chip
First outfan of U17, the second outfan connect the 5th gate-controlled switch Q14, the control end of the 6th gate-controlled switch；Described 5th can
Control switch Q14, the 6th gate-controlled switch connect first termination on end and the second former limit of transformator T2 and connect；
Described 4th control circuit 114 includes the 4th PWM driving chip U6, the 7th gate-controlled switch Q16 and the 8th gate-controlled switch
Q17；The drain electrode of described 7th gate-controlled switch Q16 is connected with power input, the source electrode of described 7th gate-controlled switch Q16 is with described
The drain electrode of the 8th gate-controlled switch Q17 connects；The source ground of described 8th gate-controlled switch Q17；Described 4th PWM driving chip U6
First input end, the second input be respectively used to receive the most anti-phase two-way pwm control signal, described 4th PWM drives
First outfan of chip U6, the second outfan connect the 7th gate-controlled switch Q16, the control end of the 8th gate-controlled switch Q17；Described
7th gate-controlled switch Q16, the 8th gate-controlled switch Q17 junction are connected with second termination on the second former limit of transformator T2.
From Fig. 5 a, Fig. 5 b it will be seen that the output of second control circuit 112 is with described 4th control circuit 114
A coupling transformer T6 it is additionally provided with, for eliminating the ripple interference in two-way control circuit between output；Concrete, by the
The first transformator T3 is accessed behind one rich limit of the electric current coupled transformator T6 of four gate-controlled switch Q13；And it is controlled through the 8th
The electric current of switch Q16 accesses the second transformator T2 behind another rich limit of over-coupled transformer T6.
As it is shown in fig. 7, described circuit for power conversion also includes anti-back flow circuit, it is defeated that described anti-back flow circuit is arranged on power supply
Enter between end and each gate-controlled switch；Described anti-back flow circuit includes detecting resistance, the 9th gate-controlled switch and the first amplifier.
First end of described detection resistance R266 is connected with power input；Second end of described detection resistance R266 passes through
And it is the first inductance L11, the second inductance L12 connect and the first gate-controlled switch in control circuit, the 3rd gate-controlled switch, the 5th controlled
Switch, the 7th gate-controlled switch connect；Second end of described detection resistance R266 by the first resistance R268 of being sequentially connected in series, second
The first input end of resistance R271 and the first amplifier connects；First end of described detection resistance R66 by the 3rd resistance R273 with
Second input of the first amplifier connects.The outfan of described first amplifier passes through the 4th resistance R272 and the 9th gate-controlled switch
The control end of Q20 connects；The source electrode of described 9th gate-controlled switch Q20 passes through the 5th resistance R269 simultaneously with detection resistance R226's
Second end and and connect the first inductance L11, second inductance L12 connect；The drain electrode of described 9th gate-controlled switch Q20 is by the 6th electricity
Resistance R274 ground connection；First end of described detection resistance R266 also by a diode D47 and the 7th resistance R276 of concatenation, the 8th
Resistance R277, the 9th resistance R278 ground connection；The first input end of the first amplifier U34 is also by the first electric capacity being sequentially connected in series
C198, the second electric capacity C199, the source electrode of the tenth resistance R270 and the 9th gate-controlled switch Q20 connect；Second electric capacity C199 of concatenation
And the tenth resistance R270 also with the 11st resistance R267 connecing.
In other embodiment, before described output filter circuit 15, it is additionally provided with dummy load circuit as shown in Figure 9
17 and with described dummy load circuit 17 discharge circuit 18 that connects.
Described dummy load circuit 17 includes and the first sub-dummy load circuit of connecing and the second sub-dummy load circuit；
Described first sub-dummy load circuit includes the 21st gate-controlled switch Q1, the second amplifier U1 and controlled with the 21st Q1 opens
Close the 21st resistance R1 of concatenation；The source electrode of described 21st gate-controlled switch Q1 is connected with described 21st resistance R1,
The source electrode of described 21st gate-controlled switch Q1 is also by the reversed-phase output of the 25th resistance R5 Yu described second amplifier U1
Connect；The normal phase input end of described second amplifier U1 and normal phase input end and electric discharge reference input, voltage sampling input and
Current sample input is simultaneously connected with；The output of described second amplifier U1 connects the described 21st by the 24th resistance R4
The control end of gate-controlled switch Q1；The outfan of described second amplifier U1 also passes sequentially through the 23rd resistance R3, the 21st electricity
Hold C1 to be connected with self inverting input；Described 23rd resistance R3, the 21st electric capacity C1 are also with the first diode D1 also
Connect；The positive pole of described first diode D1 and the 21st electric capacity C1 connect, and negative pole and the 23rd resistance R3 connect.
Described second sub-dummy load circuit includes the 22nd gate-controlled switch U2, the 3rd amplifier U2 and controlled with the 22nd
22nd resistance R2 of switch U2 concatenation；The source electrode of described 22nd gate-controlled switch U2 is with described 22nd resistance R2 even
Connecing, the source electrode of described 22nd gate-controlled switch U2 is also by the anti-phase output of the 29th circuit R9 Yu described 3rd amplifier U2
End connects；The normal phase input end of described 3rd amplifier U2 and normal phase input end and electric discharge reference input, voltage sampling input
And current sample input is simultaneously connected with；The output of described 3rd amplifier U2 connects described second by the 31st circuit R11
The control end of 12 gate-controlled switch U2；The outfan of described 3rd amplifier U2 also pass sequentially through the 30th circuit R10, the 22nd
Electric capacity C2 is connected with self inverting input；Described 30th circuit R10, the 22nd electric capacity C2 are also with the second diode D2 also
Connect；The positive pole of described second diode D2 and the 22nd electric capacity C2 connect, and negative pole and the 30th circuit R10 connect.During work,
Described dummy load circuit 17 is by electric discharge reference, voltage sampling, current sampling co-controlling, during this is because, small voltage exports,
Owing to PWM duty cycle drops to minimum, now power supply output is if zero load, owing to energy storage inductor can not work CCM mould
Formula, can cause that PWM's is discontinuous, causes output concussion instability, and ripple becomes big.By arranging dummy load circuit at power source internal
17, the constant-current discharge circuit being made up of amplifier as shown in Figure 9, make power supply when zero load exports, internal fictitious load guarantee PWM
Control continuously.The size of discharge current is by reference of discharging, voltage sampling, current sampling co-controlling.Time unloaded, mainly by inside
Discharge current is by reference control of discharging, when output voltage increases or after outside access load, voltage sampling and current sampling is total to
With controlling.After load increases to a certain degree, internal load quits work.Power supply voltage stabilizing when zero load so can be allowed defeated
Go out, output when not affecting fully loaded.
Circuit for power conversion for voltage analysis instrument voltage module is become by the first transformator, two power of the second transformator
Changing module composition, two power conversion modules, by controlling with identical pwm signal (PWM1 and PWM2), make two groups of power conversions
Device possesses identical conversion power, exports after transformer secondary output synchronous rectification after direct parallel filtering；
In the present invention, PWM1 and the PWM2 control that two changed power modules produce by same voltage, current sample feedback control
System, in the case of power conversion A and B possesses identical transform power, has identical output voltage, thus realizes changer A
Current-sharing with B exports；Primary A and B of two transformators is coupled by coupling transformer, with eliminate the ripple in circuit and
Noise；Synchronous rectification signal SYNCA and SYNCB sequential strictly coordinate PWM1 and PWM2 to realize two groups of transducer synchronous rectifications.
Embodiment 2: as shown in Fig. 3 a, Fig. 4 a, the present embodiment is with embodiment 1 difference, first control circuit 111
In, also set up between a described PWM driving chip U16 and the first gate-controlled switch Q10, the second gate-controlled switch Q11 that to include first steady
Volt circuit the 1112, first shaping circuit 1113；Described first gate-controlled switch Q10 is also attempted by with the first peak absorbing circuit 1116
Between described power input and the first termination, the first former limit of transformator T3；Described second gate-controlled switch Q11 also with the second spike
Absorbing circuit 1117 is attempted by between first the first termination, the former limit of transformator T3 and ground；
In described second control circuit 112, described 2nd PWM driving chip U10 and the 3rd gate-controlled switch Q12, the 4th controlled open
Close and also include second mu balanced circuit the 1114, second shaping circuit 1115 between Q13；Described 3rd gate-controlled switch Q12 is also with the 3rd
Peak absorbing circuit 1126 is attempted by between described power input and the second termination, the first former limit of transformator T3；Described 4th can
Control switch Q13 is also attempted by between first the second termination, the former limit of transformator T3 and ground with the 4th peak absorbing circuit 1127.
In described 3rd control circuit 113, described 3rd PWM driving chip U17 and the 5th gate-controlled switch Q14, the 6th can
Also set up between control switch and include the second mu balanced circuit the 1122, the 3rd shaping circuit 1123；Described 5th gate-controlled switch Q14 is also with
Five peak absorbing circuits 1136 are attempted by between described power input and the first termination, the second former limit of transformator T2；Described 6th
Gate-controlled switch is also attempted by between second the first termination, the former limit of transformator T2 and ground with the 6th peak absorbing circuit 1137；
In described 4th control circuit 114, described 4th PWM driving chip U6 and the 7th gate-controlled switch Q16, the 8th gate-controlled switch
The 4th mu balanced circuit the 1124, the 4th shaping circuit 1125 is also included between Q17；Described 7th gate-controlled switch Q16 is also sharp with the 7th
Peak absorbing circuit 1146 is attempted by between described power input and the second termination, the second former limit of transformator T2；Described 8th controlled
Switch Q17 is also attempted by between second the second termination, the former limit of transformator T2 and ground with the 8th peak absorbing circuit 1147.Described
One shaping circuit, the second shaping circuit, the 3rd shaping circuit, the 4th shaping circuit are for the pwm control signal that will pass through
Rise along becoming precipitous, thus accelerate corresponding gate-controlled switch response speed.
Fig. 8 gives first control circuit 111 circuit diagram specific embodiment, it will be seen that above-mentioned first from figure
Peak absorbing circuit the 1116, second peak absorbing circuit 1117 all include and two resistance connecing and with this and two resistance connecing
One electric capacity of concatenation, equally, other peak absorbing circuits not providing physical circuit figure are also same layouts.
The power module that the present embodiment provides can realize peak power output 300W, and output voltage is between 0 ~ 20V, defeated
Going out electric current 0 ~ 50A, program control range of voltages is 10mV ~ 20.4V, electric current 50mA ~ 51A, and minimum program control resolution voltage is 2mV, electricity
Stream is 20mA, output ripple and noise≤5mVp-p(20Hz～20MHz), voltage loads effect (reduce to by maximum load voltage
1V/ line)≤± 2mV, voltage source effect≤± 0.5mV.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all essences in the present invention
Any amendment, equivalent and the improvement etc. made within god and principle, should be included within the scope of the present invention.
Claims (10)
1. for a power analysis instrument power module, including control circuit, power conversion module, sawtooth waveforms module；
Described sawtooth waveforms module includes that current sampling circuit, voltage sample circuit, mlultiplying circuit, feedback circuit and sawtooth waveforms occur
Circuit；Described current sampling circuit, voltage sample circuit are adopted from outfan and/or the load end collection of described circuit for power conversion
Sample electric current, sampled voltage, and described sample rate current, sampled voltage are respectively sent to described mlultiplying circuit and feedback circuit；
Described power conversion module include PWM drive circuit, circuit for power conversion, commutation driver circuit, circuit of synchronous rectification and
Output filter circuit；
Described control circuit sends sawtooth waveforms and controls signal to described saw-tooth wave generating circuit to produce benchmark sawtooth waveforms, this benchmark
Sawtooth waveforms combines sample rate current and/or sampled voltage produces and specifies waveform sawtooth waveforms；Described control circuit also specifies saw by described
Tooth ripple sends to PWM drive circuit as pwm control signal, to drive described circuit for power conversion to work；Described control circuit
Also send rectification drive control signal and drive the work of described circuit of synchronous rectification；
It is characterized in that, be additionally provided with anti-back flow circuit before described circuit for power conversion, described anti-back flow circuit is for will be from
The current earthing that circuit for power conversion pours in down a chimney is derived.
Power module the most according to claim 1, it is characterised in that described circuit for power conversion include the first transformator,
Second transformator；
Described PWM drive circuit includes first control circuit, second control circuit, the 3rd control circuit, the 4th control circuit；
Described circuit of synchronous rectification includes the first circuit of synchronous rectification, the second circuit of synchronous rectification；
Described commutation driver circuit includes the first drive circuit, the second drive circuit；
Described first control circuit, second control circuit are connected with two terminations of described first transformer primary side respectively, respectively
The former limit of the first transformator is flowed through from different directions for controlling electric current；Described 3rd control circuit, the 4th control circuit are respectively
It is connected with two terminations of described second transformer primary side, is respectively used to control electric current and flows through the second transformator from different directions
Former limit；
The secondary of described first transformator and the first circuit of synchronous rectification connect；The secondary of described second transformator and second synchronizes
Rectification circuit connects；Described first drive circuit, the second drive circuit respectively with the first circuit of synchronous rectification, the second synchronous rectification
Circuit connects；It is respectively used to control the first circuit of synchronous rectification, the break-make of the second circuit of synchronous rectification；Described first synchronization is whole
Current circuit and the second circuit of synchronous rectification are connected with an output filter circuit simultaneously；
Described first control circuit, second control circuit, the 3rd control circuit, the 4th control circuit all include two inputs,
Two inputs are respectively used to be received from the most anti-phase two-way pwm control signal that control circuit spreads out of.
Power module the most according to claim 2, it is characterised in that described first control circuit includes that a PWM drives
Chip, the first gate-controlled switch and the second gate-controlled switch；
The drain electrode of described first gate-controlled switch is connected with power input, the source electrode and described second of described first gate-controlled switch can
The drain electrode of control switch connects；The source ground of described second gate-controlled switch；The first input end of a described PWM driving chip,
Second input is respectively used to receive the most anti-phase two-way pwm control signal, the first output of a described PWM driving chip
End, the second outfan connect the control end of the first gate-controlled switch, the second gate-controlled switch；Described first gate-controlled switch, second controlled
Switch connects the first termination of end and the first transformer primary side and connects；
Described second control circuit includes the 2nd PWM driving chip, the 3rd gate-controlled switch and the 4th gate-controlled switch；
The drain electrode of described 3rd gate-controlled switch is connected with power input, the source electrode and the described 4th of described 3rd gate-controlled switch can
The drain electrode of control switch connects；The source ground of described 4th gate-controlled switch；The first input end of described 2nd PWM driving chip,
Second input is respectively used to receive the most anti-phase two-way pwm control signal, the first output of described 2nd PWM driving chip
End, the second outfan connect the 3rd gate-controlled switch, the control end of the 4th gate-controlled switch；Described 3rd gate-controlled switch, the 4th controlled
Switch junction is connected with the second termination of the first transformer primary side.
Power module the most according to claim 3, it is characterised in that in described first control circuit, a described PWM drives
Dynamic also setting up between chip and the first gate-controlled switch, the second gate-controlled switch includes the first mu balanced circuit, the first shaping circuit；Described
One gate-controlled switch be also attempted by with the first peak absorbing circuit described power input and first transformer primary side the first termination it
Between；Described second gate-controlled switch is also attempted by between first transformer primary side the first termination and ground with the second peak absorbing circuit；
In described second control circuit, also wrap between described 2nd PWM driving chip and the 3rd gate-controlled switch, the 4th gate-controlled switch
Include the second mu balanced circuit, the second shaping circuit；Described 3rd gate-controlled switch is also attempted by described electricity with the 3rd peak absorbing circuit
Between source input and first transformer primary side the second termination；Described 4th gate-controlled switch also with the 4th peak absorbing circuit connecing
Between first transformer primary side the second termination and ground.
Power module the most according to claim 2, it is characterised in that described 3rd control circuit includes that the 3rd PWM drives
Chip, the 5th gate-controlled switch and the 6th gate-controlled switch；
The drain electrode of described 5th gate-controlled switch is connected with power input, the source electrode and the described 6th of described 5th gate-controlled switch can
The drain electrode of control switch connects；The source ground of described 6th gate-controlled switch；The first input end of described 3rd PWM driving chip,
Second input is respectively used to receive the most anti-phase two-way pwm control signal, the first output of described 3rd PWM driving chip
End, the second outfan connect the 5th gate-controlled switch, the control end of the 6th gate-controlled switch；Described 5th gate-controlled switch, the 6th controlled
Switch connects the first termination of end and the second transformer primary side and connects；
Described 4th control circuit includes the 4th PWM driving chip, the 7th gate-controlled switch and the 8th gate-controlled switch；
The drain electrode of described 7th gate-controlled switch is connected with power input, the source electrode and the described 8th of described 7th gate-controlled switch can
The drain electrode of control switch connects；The source ground of described 8th gate-controlled switch；
The first input end of described 4th PWM driving chip, the second input are respectively used to receive the most anti-phase two-way PWM control
Signal processed, the first outfan of described 4th PWM driving chip, the second outfan connect the 7th gate-controlled switch, the 8th controlled open
The control end closed；
Described 7th gate-controlled switch, the 8th gate-controlled switch junction are connected with the second termination of the second transformer primary side.
Power module the most according to claim 5, it is characterised in that in described 3rd control circuit, described 3rd PWM drives
Dynamic also setting up between chip and the 5th gate-controlled switch, the 6th gate-controlled switch includes the 3rd mu balanced circuit, the 3rd shaping circuit；Described
Five gate-controlled switches be also attempted by with the first peak absorbing circuit described power input and second transformer primary side the first termination it
Between；Described 6th gate-controlled switch is also attempted by between second transformer primary side the first termination and ground with the 6th peak absorbing circuit；
In described 4th control circuit, also wrap between described 4th PWM driving chip and the 7th gate-controlled switch, the 8th gate-controlled switch
Include the 4th mu balanced circuit, the 4th shaping circuit；Described 7th gate-controlled switch is also attempted by described electricity with the first peak absorbing circuit
Between source input and second transformer primary side the second termination；Described 8th gate-controlled switch also with the second peak absorbing circuit connecing
Between second transformer primary side the second termination and ground.
Power module the most according to claim 2, it is characterised in that the output of described second control circuit and the described 4th
A coupling transformer it is additionally provided with, for eliminating the ripple interference in two-way control circuit between the output of control circuit.
Power module the most according to claim 1, it is characterised in that
Described anti-back flow circuit includes detecting resistance, the 9th gate-controlled switch and the first amplifier；
First end of described detection resistance is connected with power input；The first electricity that second end of described detection resistance passes through and connects
Sense, the second inductance are connected with the gate-controlled switch in control circuit, and export electric current to it；
Second end of described detection resistance is by the first resistance, the second resistance and the first input end of the first amplifier that are sequentially connected in series
Connect；
First end of described detection resistance is connected by the second input of the 3rd resistance and the first amplifier；Described first amplifier
Outfan is connected by the control end of the 4th resistance and the 9th gate-controlled switch；
The source electrode of described 9th gate-controlled switch by the 5th resistance simultaneously with the second end of detection resistance and and connect the first inductance,
Second inductance connection；The drain electrode of described 9th gate-controlled switch is by the 6th resistance eutral grounding；
First end of described detection resistance is also by a diode and the 7th resistance of concatenation, the 8th resistance, the 9th resistance eutral grounding；
The first input end of the first amplifier is controlled also by the first electric capacity being sequentially connected in series, the second electric capacity, the tenth resistance and the 9th
The source electrode of switch connects；Second electric capacity of concatenation and the tenth resistance also with the 11st resistance connecing.
Power module the most according to claim 1, it is characterised in that be additionally provided with false negative before described output filter circuit
Carry circuit and with described dummy load circuit；Described dummy load circuit include and the first sub-dummy load circuit of connecing and the second son false negative
Carry circuit；
Described first sub-dummy load circuit includes the 21st gate-controlled switch, the second amplifier and concatenates with the 21st gate-controlled switch
The 21st resistance；
The source electrode of described 21st gate-controlled switch is connected with described 21st resistance, the source of described 21st gate-controlled switch
Pole is connected also by the reversed-phase output of the 25th resistance with described second amplifier；
The normal phase input end of described second amplifier is same with electric discharge reference input, voltage sampling input and current sample input
Time connect；
The output of described second amplifier connects the control end of described 21st gate-controlled switch by the 24th resistance；
The outfan of described second amplifier also passes sequentially through the 23rd resistance, the 21st electric capacity with self inverting input even
Connect；Described 23rd resistance, the 21st electric capacity also with the first diode connecing；The positive pole and second of described first diode
11 electric capacity connect, and negative pole and the 23rd resistance connect；
Described second sub-dummy load circuit includes the 22nd gate-controlled switch, the 3rd amplifier and concatenates with the 22nd gate-controlled switch
The 22nd resistance；
The source electrode of described 22nd gate-controlled switch is connected with described 22nd resistance, the source of described 22nd gate-controlled switch
Pole is connected also by the reversed-phase output of the 29th resistance with described 3rd amplifier；
The normal phase input end of described 3rd amplifier and normal phase input end and electric discharge reference input, voltage sampling input and electric current
Sampling input is simultaneously connected with；
The output of described 3rd amplifier connects the control end of described 22nd gate-controlled switch by the 31st resistance；
The outfan of described 3rd amplifier also passes sequentially through the 30th resistance, the 22nd electric capacity with self inverting input even
Connect；Described 30th resistance, the 22nd electric capacity also with the second diode connecing；The positive pole and the 20th of described second diode
Two electric capacity connect, and negative pole and the 30th resistance connect.
Power module the most according to claim 1, it is characterised in that also include auxiliary power circuit, for by main power source
Be converted to the running voltage that modules needs.
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| CN201610905737.7A CN106300966B (en) | 2016-10-18 | 2016-10-18 | One kind being used for power analysis instrument power module |
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