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CN106298791A - Programmable non-volatile memory and the utilization on semiconductor storage unit thereof - Google Patents

Programmable non-volatile memory and the utilization on semiconductor storage unit thereof Download PDF

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Publication number
CN106298791A
CN106298791A CN201610828469.3A CN201610828469A CN106298791A CN 106298791 A CN106298791 A CN 106298791A CN 201610828469 A CN201610828469 A CN 201610828469A CN 106298791 A CN106298791 A CN 106298791A
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CN
China
Prior art keywords
programmable non
volatile memory
semiconductor memory
selector
memory
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Application number
CN201610828469.3A
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Chinese (zh)
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CN106298791B (en
Inventor
李学良
西里奥·艾·珀里亚科夫
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SICHUAN HONGXINWEI TECHNOLOGY Co Ltd
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SICHUAN HONGXINWEI TECHNOLOGY Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Semiconductor Memories (AREA)

Abstract

A kind of repeatable programming nonvolatile memory, writes the life-span to improve data and keeps the life-span, using ion conductor as ion memory storage.This ion conductor doping alkali ion and there is the resistance heater being adjacent.Can be applicable to repeatable programming nonvolatile semiconductor device.When it is applied to semiconductor memory, the PN junction of the most described semiconductor memory terminates the part of the P-type conduction side on surface, covers the ion conductor thin film doped with alkali ion as ion storage device, and has the resistance heating layer being adjacent.

Description

Programmable non-volatile memory and the utilization on semiconductor storage unit thereof
Technical field
The present invention relates generally to the nonvolatile memory with the repeatable programming of ion storage, particularly relate to a kind of profit With the nonvolatile semiconductor memory of the repeatable programming of ion storage, be suitable to the high density of repeatable programming and depositing of capacity Storage application.More particularly, it relates to have flash memory structure, unconfined write the life-span (as reprogramming cycle count) and prolongation number According to the memory device in holding life-span, the most at high temperature.
Background technology
The development of the repeatable programming nonvolatile semiconductor memory being currently known, either inversion of phases, conductive bridge Type, ferroelectric type, floating gate type or resistor-type.With memory density, retentivity, remanent magnetism, write-read erasing speed and operating temperature range Etc. comparing, write erasing cycle count or write the important indicator that the life-span is reliability, it is accordingly required in particular to noting.
In floating gate type memory, flash memory and other kinds of memorizer make use of tunneling effect, such as on April 8th, 1975 United States Patent (USP) US3877054, erasing operation will cause the degeneration of gate insulator and the decline of reliability, on August 1st, 2006 United States Patent (USP) US7085161 propose to utilize wear leveling technology and circulating technology to alleviate.The longevity write by conducting bridge direct type memorizer Life aspect may be also facing to similar restriction, such as United States Patent (USP) US2016/081518 on July 23rd, 2016, meanwhile, and another Aspect, ferroelectric type memorizer, such as United States Patent (USP) US5969981 on October 19th, 1999, the Russian Patent on July 6th, 1972 SU434871, has height and writes the life-span, but its read operation has destructiveness, need follow-up storage Refresh Data.Along with phase transformation The development of type memorizer, Chinese patent CN101000944 or the U.S. on 11 days April nineteen ninety-five such as on January 10th, 2006 are special Profit US5406509, the resistor-type memory that phase transformation is relevant, such as United States Patent (USP) US8520245 on August 27th, 2013, it is shown that Height writes life parameter.They also indicate that the partial power in write operation and erasing operation consumes the most important, and they are the most at last Become the restriction writing life parameter.
Therefore, it is still necessary to programmable non-volatile memory has height and writes life-span and the erasing operation of lower powered write-read.
Summary of the invention
The present invention provides a kind of programmable non-volatile memory and at semiconductor memory based on above-mentioned technical problem Utilization on part.
A kind of programmable non-volatile memory, comprises ion conductor, it is characterised in that: as described in ion storage device Ion conductor doping alkali ion, and there is the resistance heater being adjacent.
As preferably, described ion conductor doping Na.
As preferably, described memorizer is semiconductor memory, and at least, the PN junction of described semiconductor memory terminates surface The part of P-type conduction side, cover described ion conductor thin film and there is the resistance heating layer being adjacent.
As preferably, described thin film is alumina silicate glass thin film.
As preferably, described resistance heating layer is Ti-N-Si thin film.
As preferably, the p-type side of described semiconductor memory is used for being connected to BIT line, the N-type of described semiconductor memory Selector ground connection is passed through in side, and described selector is connected to ENABLE line by WORD line traffic control, described resistance heating layer.
As preferably, the p-type side of described semiconductor memory is used for being connected to BIT line, the N-type of described semiconductor memory Side is connected to WORD line by selector, and described resistance heating layer is connected to ENABLE line.
As preferably, described semiconductor memory is connected with switching device, and the N-shaped side of described semiconductor device is by selecting Device is connected to WORD line, and described resistance heating layer is connected to ENABLE line.
As preferably, described selector is transistor, the N-type side of the described semiconductor memory gold by described selector Belonging to pole and be connected to WORD line and ground, described resistance heating layer is connected to ENABLE line.
As preferably, by the reverse biased on the ENABLE signal on ENABLE line and described PN junction, perform write operation.
As preferably, by the reverse biased on described PN junction, perform write operation.
As preferably, by the ENABLE signal of input on described ENABLE line, perform erasing operation.
As preferably, described memorizer is diode.
As preferably, described memorizer is transistor.
As preferably, described selector is diode.
Owing to the write and erase operation of data is the most only based only on the lossless promotion aluminosilicate as ion storage device Quick diffusion ion in glassy layer carries out suitable redistribution, and the present invention has and high writes the life-span, meanwhile, and temperature-driven Write enable and ensure that at a temperature of the operation of 85 DEG C or lower, at least 104Hour high data keep the life-span.
Accompanying drawing explanation
The semiconductor memory apparatus of Fig. 1 present invention based on diode;
The semiconductor memory apparatus of Fig. 2 present invention based on transistor;
The semiconductor memory apparatus of Fig. 3 present invention writes the typical performance of erasure sequence;
One basic unit of storage of Fig. 4 semiconductor storage unit of the present invention.
Detailed description of the invention
Below in conjunction with accompanying drawing, embodiments of the present invention are described in detail.
Embodiment one
Fig. 1 is the most basic embodiment of the memory element of the present invention, a diode, comprises resistivity and is about 1 Ω cm, Thickness is of about the substrate of 1 μm.The anode region 1-1 of p-type silicon layer and the cathode chamber 1-2 of n-type silicon layer is formed respectively in substrate. On the termination surface of the pn-junction that alumina silicate glass layer 1-3 is formed between the anode region 1-1 of p-type and the cathode chamber 1-2 of N-shaped, And doping content is 8*1016-2*1017cm-3Na.The thick Ti-N-Si resistance heater 1-4 of 0.5um it is coated with above it, Hard contact 1-5,1-6 are connected with anode region 1-1 and cathode chamber 1-2 respectively.Utilize the mesa technology method of standard and technology with Structure described in formation.
In concrete operations, utilize the resistance heater 1-4 covered up that alumina silicate glass layer 1-3 is heated, to increase Adding the mobility of wherein Na ion, the electric field being applied simultaneously between contact 1-5,1-6 promotes the redistribution of described ion, promotees It is made to pile up at the negative bias of the near interface of the anode region 1-1 of the p-type of alumina silicate glass layer 1-3.When the electric charge piled up be enough to When the anode region 1-1 of p-type forms the reverse-biased layer of secondary table of N-shaped, the resistivity of diode is compared original state and is declined 3-4 quantity Level.Under zero-bias conditions, heating alumina silicate glass layer 1-3 again so that diode recovery is to initial condition.Due to data Write and erase operation be the most only based only on lossless promote as in the alumina silicate glass layer 1-3 of ion storage device quick The suitable redistribution of diffusion ion, the present invention has and high writes the life-span (Fig. 3), and meanwhile, writing of temperature-driven makes can ensure that , at a temperature of the operation of 85 DEG C or lower, at least 104Hour high data keep the life-span.
Fig. 4 is the basic application of the present embodiment, BIT/Y line be connected to contact 1-5, contact 1-6 by selector (as MOSFET) ground connection.Write operation needs in advance the resistance heater network of whole memory block to be applied ENABLE signal, and WRITE believes Number applied by selector.ENABLE signal can certainly be provided by other selector, so that it is guaranteed that RAM type operation, But this will cause the corresponding increase of memory element volume.Erasing operation needs only to apply ENABLE signal, but, one In a little embodiments, it is also possible to the energizing signal of the WRITE signal applied by synchronization promotes erasing operation.
Embodiment two
Fig. 2 is another basic embodiment of the memory element of the present invention, and a MOS transistor comprises resistivity and is about 1 Ω cm, thickness is of about the p-type silicon substrate 2-1 of 1 μm, and the source area 2-2 of the N-shaped being formed on substrate 2-1 and leakage Polar region 2-3.Aluminum silicate salt deposit 2-4(gate insulator) about 0.5 μ m-thick, doping content is 8*1016-2*1017cm-3Na, and And a part of overlay area 2-1,2-2,2-3.The resistance heater 2-6 that metal pole 2-5 with Ti-N-Si makes is positioned at aluminum silicate On salt deposit 2-4, hard contact 2-7,2-8 connect source area 2-2 and drain region 2-3, the SiO of 0.8 μ m-thick respectively2Layer 2-9, covers The remainder of lid substrate 2-1 top surface.Described structure can be formed by mesa technology method and technology.
In concrete operations, the resistance heater 2-6 covered up is utilized aluminum silicate salt deposit 2-4 to be heated, to increase it The mobility of middle Na ion, Na ion redistributes in aluminum silicate salt deposit 2-4 under the biasing of metal pole 2-5, is formed at base The accumulation of the positive charge of the near interface of end 2-1, and cause loss, ultimately result in time top layer upset and conduct electricity for N-shaped, and source Resistance between polar region 2-2 and drain region 2-3 is compared the decline of original state and is up to 3-4 the order of magnitude.Again heat aluminum silicate Salt deposit 2-4 so that diode recovery is to initial condition.Owing to the write and erase operation of data is the most only based only on lossless promotion As the suitable redistribution of the quick diffusion ion in the aluminum silicate salt deposit 2-4 of ion storage device, the present invention has high Write the life-span.
The basic application in memory arrays of the MOS transistor of the present invention, substantially similar with Fig. 4, only need to do phase The change answered.
It is understandable that in other embodiments, such as switching device, four-layer diode or breakdown diode, Ke Yizuo For any one selector of the cross-point arrangement of memory array, or suitably select with other as storage device itself Device combines, such as diode.The present invention can also be by not having the device of PN junction, as implemented based on charge coupled device.It addition, May by introduce any opposite polarity static electric charge amendment ion conductor, therefore allow the recruiting mutually of individual memory cells Put, or the modifier amendment of dielectric constant or pcrmeability.Other possible application can utilize the redistribution of moving iron The change of the dielectric constant, refractive index or the permeability that cause, stores data by capacitive character, rotation or optical read-out.This area Technical staff, for reaching specific purpose, it is also possible to the basic skills of the present invention is carried out other suitably change and amendments.Therefore The basic scheme of the present invention, simply comprise utilize ion conductor as ion storage device, this ion conductor doping alkali ion, And there is resistance heater positioned adjacent.When it is applied to semiconductor memory, the most described semiconductor memory PN junction terminate the part of P-type conduction side on surface, cover the ion conductor thin film doped with alkali ion as ion storage Device, and there is the resistance heating layer being adjacent.

Claims (15)

1. a programmable non-volatile memory, comprises ion conductor, it is characterised in that: as described in ion storage device from Sub-conductor doping alkali ion, and there is the resistance heater being adjacent.
A kind of programmable non-volatile memory the most according to claim 1, it is characterised in that: described ion conductor adulterates Na。
A kind of programmable non-volatile memory the most according to claim 1 and 2, it is characterised in that: described memorizer is Semiconductor memory, at least, the PN junction of described semiconductor memory terminates the part of the P-type conduction side on surface, cover described from Sub-conductor thin film and there is the resistance heating layer being adjacent.
A kind of programmable non-volatile memory the most according to claim 3, it is characterised in that: described thin film is aluminum silicate Salt glass film.
A kind of programmable non-volatile memory the most according to claim 4, it is characterised in that: described resistance heating layer is Ti-N-Si thin film.
A kind of programmable non-volatile memory the most according to claim 3, it is characterised in that: described semiconductor memory P-type side be used for being connected to BIT line, the N-type side of described semiconductor memory pass through selector ground connection, described selector is by WORD Line traffic control, described resistance heating layer is connected to ENABLE line.
A kind of programmable non-volatile memory the most according to claim 3, it is characterised in that: described semiconductor memory P-type side be used for being connected to BIT line, the N-type side of described semiconductor memory is connected to WORD line, described resistance by selector Zone of heating is connected to ENABLE line.
A kind of programmable non-volatile memory the most according to claim 7, it is characterised in that: described semiconductor memory Connecting with switching device, the N-shaped side of described semiconductor device is connected to WORD line by selector, and described resistance heating layer connects To ENABLE line.
A kind of programmable non-volatile memory the most according to claim 6, it is characterised in that: described selector is crystal Pipe, the N-type side of described semiconductor memory is connected to WORD line and ground by the metal pole of described selector, and described resistance heats Layer is connected to ENABLE line.
A kind of programmable non-volatile memory the most according to claim 3, it is characterised in that: by ENABLE line ENABLE signal and described PN junction on reverse biased, perform write operation.
11. a kind of programmable non-volatile memories according to claim 3, it is characterised in that: by described PN junction Reverse biased, perform write operation.
12. a kind of programmable non-volatile memories according to claim 3, it is characterised in that: by described ENABLE The ENABLE signal of input on line, performs erasing operation.
13. a kind of programmable non-volatile memories according to claim 3, it is characterised in that: described memorizer is two Pole is managed.
14. a kind of programmable non-volatile memories according to claim 3, it is characterised in that: described memorizer is brilliant Body pipe.
15. a kind of programmable non-volatile memories according to claim 6, it is characterised in that: described selector is two Pole is managed.
CN201610828469.3A 2016-09-19 2016-09-19 Programmable non-volatile memory and its utilization on semiconductor storage unit Expired - Fee Related CN106298791B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62205598A (en) * 1986-03-05 1987-09-10 Hitachi Ltd Information storage/reproduction method and information storage carrier
US20120235108A1 (en) * 2009-02-04 2012-09-20 John Smythe Method of forming memory cell using gas cluster ion beams
US20130082229A1 (en) * 2011-09-30 2013-04-04 Industrial Technology Research Institute Mixed ionic-electronic conduction memory cell
US20140131653A1 (en) * 2012-11-13 2014-05-15 Feng-Ming Lee Unipolar programmable metallization cell

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62205598A (en) * 1986-03-05 1987-09-10 Hitachi Ltd Information storage/reproduction method and information storage carrier
US20120235108A1 (en) * 2009-02-04 2012-09-20 John Smythe Method of forming memory cell using gas cluster ion beams
US20130082229A1 (en) * 2011-09-30 2013-04-04 Industrial Technology Research Institute Mixed ionic-electronic conduction memory cell
US20140131653A1 (en) * 2012-11-13 2014-05-15 Feng-Ming Lee Unipolar programmable metallization cell

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