CN106298722B - A kind of encapsulating structure and manufacturing method of high current power semiconductor - Google Patents
A kind of encapsulating structure and manufacturing method of high current power semiconductor Download PDFInfo
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- CN106298722B CN106298722B CN201610852313.9A CN201610852313A CN106298722B CN 106298722 B CN106298722 B CN 106298722B CN 201610852313 A CN201610852313 A CN 201610852313A CN 106298722 B CN106298722 B CN 106298722B
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
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- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
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Abstract
The present invention relates to the encapsulating structures and manufacturing method of a kind of high current power semiconductor, including cooling fin, semiconductor chip, plastic-sealed body and load Ji Dao, load Ji Dao is connect with cooling fin, on the third electrode welding at the semiconductor chip back side to the first surface of load Ji Dao, it is characterized in that, the positive first electrode of semiconductor chip and first conductive metal sheet one end are welded, second electrode and second conductive metal sheet one end are welded, the first surface of load Ji Dao is packaged in plastic-sealed body, semiconductor chip, the welding ends of first and second conductive metal sheets, cooling fin, the second surface of load Ji Dao, the other end of first and second conductive metal sheets is exposed outside plastic-sealed body as pin；The present invention uses conductive metal sheet, directly with the electrode welding of semiconductor chip, both to reduce device packaged resistance as pin, increases device overcurrent capability, and enhance the heat-sinking capability of device, reduces packaging thermal resistance, improves the reliability that device encapsulates.
Description
Technical field
The present invention relates to package structure of semiconductor device, especially a kind of high current encapsulating structure of power semiconductor part,
Belong to the manufacturing technology field of semiconductor devices.
Background technique
High current high power semiconductor device is evolving, and silicon substrate grooved semiconductor chip has entered the 1mR epoch,
The large percentage for the overall resistance that the packaged resistance of the encapsulating structure of conventional semiconductor devices accounts for has been more than chip itself sometimes
Internal resistance, in addition, the packaging thermal resistance of semiconductor devices is larger, packaging thermal resistance determines the loss of device maximum power, if can be effective
Packaging thermal resistance and dead resistance are reduced, then MOSFET and IGBT device current capacity and power are obtained with promotion.Therefore, it removes
Improvement is developed outside new MOSFET and igbt chip structure design and processes technology, encapsulation technology, the technique of semiconductor devices
It is played an increasingly important role with method.
The encapsulation of traditional semiconductor devices MOSFET and IGBT product generally utilizes gold thread, silver alloy wire, copper wire, palladium copper
Line, aluminum steel weld semiconductor chip 2 and pin as lead, so that electrical connection is realized, as shown in Figure 1, but using metal
There are many defect (by taking aluminum steels as an example) for 6 welding manner of line:
1, in order to meet high voltage or High-current output, the emitter of IGBT and the source electrode of MOSFET are passed through frequently with a plurality of thick
Aluminum steel is welded as connecting wire；The electric current that its grid is born is smaller, frequently with thinner gold thread, copper wire, alloy wire or aluminum steel
As connecting wire；In this way for same packing forms, it is necessary to use different metal lead wires, need according to metal lead wire
Type selects the lead frame or soldering appliance of different electroplated layers, and aluminum steel machine equipment itself is expensive, so will cause
The waste and high production cost of raw material；
2, some MOSFET and IGBT are directed to, chip is divided into several parts by gate bar grid by chip surface,
In view of the uniformity of power device routing, the position of the design limitation of lead frame lead welding and angle, be will cause in addition
It has no idea to weld aluminum steel wire jumper；
3, since aluminum steel is difficult to balling-up, generally cold wedge bonding, wedge bonding is the magnetic by energy converter in hyperfrequency
It is flexible rapidly to generate elastic vibration under the induction of field, make steel mouth (Wedge tool) corresponding vibration, while application is certain on steel mouth
Pressure, then steel mouth under the collective effect of both power, drive aluminum steel rub rapidly by the aluminum metallization layer surface of welding zone
It wipes, so that aluminum steel and surface of metal electrode generate plastic deformation, reaches welding effect, will increase core after the multiple wedge bonding of same chip
Occur secretly splitting the chance with crater inside piece, in addition, thickness is larger for steel mouth (Wedge tool), and the area of pin welding section has
It limits, it is difficult in the same area multiple welding in actual production, and rosin joint is easily caused, influence the yield and product reliability of encapsulation；
Based on the above aluminum steel welding manner, there are problems, and big factory is by improving welding procedure or using metal tape 7 both at home and abroad
It constantly carries out optimizing and improving instead of the methods of metal wire 6, to solve the problems, such as that 6 welded bands of metal wire are come, reduce simultaneously
Device encapsulates dead resistance and thermal resistance.
" high-performance high current VDMOS power device chip two point welding envelope as described in Chinese patent CN202871801U
The aluminium sealing wire mentioned in assembling structure " carries out wire jumper technology, in this way, the parasitic resistance values of encapsulation can be reduced 10%
More than, but the problem of bringing is that the reduction of device efficiency and this kind of method can not be suitable for all MOSFET and IGBT device
Encapsulation.
" encapsulation of vertical conduction circuit small pieces designs " as described in Chinese patent CN101183669A, in the encapsulation patent
It is middle using aluminium strip instead of the welding of more aluminum steels, welded relative to aluminum steel, the efficiency of board is obviously improved, but this kind
Method is very high to the angle requirement of turning back of aluminium strip, and not every existing encapsulating structure is suitable for aluminium strip welding.
If Fig. 2 is the internal structure chart that conventional package SOP-8 uses metal tape 7 to weld, metal tape 7 herein is aluminium strip,
Its first and second pad is located at 2 top of semiconductor chip, and third pad is located on the pin of lead frame；When first
After position of the pad on chip determines, second and third pad must be along the direction routing of the first pad, can only
Allow the bending angle of very little smaller than aluminum steel, and excessive soldering angle be easy to cause aluminium strip to tear, technological limits are larger.
Such as United States Patent (USP) US6040626, a kind of semiconductor packages is disclosed, is connected in MOSFET chip surface using mixing
Mode is connect, source electrode is connected with grid using sealing wire using low-resistance metal band connection.However, the dielectric layer due to chip exists
It is easily damaged in sealing wire treatment process, may cause and occur short circuit phenomenon in the chip, while which will be in grid routing
Leading cleaning process causes the stability of grid routing to be difficult to control, and using this method to the metal layer of chip surface
It should be suitble to routing that can infiltrate again with scolding tin, the requirement to the metal layer of chip surface is high.
Such as Japan Patent JP2000-287385, a kind of encapsulation of semiconductor devices is disclosed, is distinguished on the surface MOSFET
Two major-minor metal tapes not of uniform size are welded, bridge the grid and lead frame of MOSFET respectively with the two metal tapes, are leaked
Pole and lead frame.Although the characteristic and reliability of product are obviously improved, need to be connected to metal tape the part of frame
Special designing is carried out, and is easy to cause some deformations than relatively thin frame, causes flash occur during subsequent encapsulating, most
Important is this mode still will cause it is some because lead frame welding caused by resistance and heating conduction loss.
As described above, the encapsulation of high current high power semiconductor device, there are problems, conventional package is using gold
Belong to line or metal tape welds semiconductor devices and pin, this construction packages dead resistance and packaging thermal resistance are larger, shadow
The electrology characteristic and hot property of packaging are rung, and reliability is more low.
Summary of the invention
The present invention encapsulates existing problems for high current high power semiconductor device, provides a kind of high current power
The encapsulating structure and manufacturing method of semiconductor devices, the structure using conductive metal sheet as pin directly with semiconductor chip
Electrode welding can reduce device packaged resistance and parasitic inductance, increase device overcurrent capability, and can enhance the heat dissipation of device
Ability reduces packaging thermal resistance, improves the reliability of device encapsulation.
To realize the above technical purpose, the technical scheme is that a kind of encapsulation of high current power semiconductor
Structure, including cooling fin, semiconductor chip, plastic-sealed body and load Ji Dao, the semiconductor chip include positive first electrode,
The third electrode at the opposite back side of second electrode and front, the load Ji Dao include first surface and opposite with first surface
Second surface, the load Ji Dao are the metal material of conductive and heat-conductive, and connect with cooling fin, the semiconductor chip back side
On third electrode welding to the first surface of load Ji Dao, which is characterized in that the positive first electrode of semiconductor chip with
One end of first conductive metal sheet is welded, and one end of second electrode and the second conductive metal sheet is welded, encapsulation in the plastic-sealed body
There are the welding ends of the first surface of load Ji Dao, semiconductor chip, the first conductive metal sheet and the second conductive metal sheet, cooling fin
It is exposed outside plastic-sealed body with the second surface of load Ji Dao, the other end conduct of the first conductive metal sheet and the second conductive metal sheet
Pin stretches out outside plastic-sealed body.
Further, first conductive metal sheet and the second conductive metal sheet are copper sheet, alcu alloy film, iron nickel sheet, aluminium
Piece or aluminum alloy sheet.
Further, first conductive metal sheet and the second conductive metal sheet with a thickness of 0.1mm ~ 5mm.
Further, the semiconductor chip is MOSFET chip, igbt chip or the SIC chip of silicon substrate.
Further, the applicable packing forms of the encapsulating structure are TO-220, TO-251, TO-262, TO-3P, TO-
247, TO-264, TO-252, TO-263, SOP-8 or DFN.
Further, the load Ji Dao is one or more, and electric insulation between multiple load bases island, each load
Semiconductor chip is welded on Ji Dao, each positive electrode of semiconductor chip is welded with conductive metal sheet.
Simultaneously to realize the above technical purpose, the present invention also provides a kind of encapsulating structures of high current power semiconductor
Manufacturing method, characterized in that include the following steps:
Step 1 provides semiconductor chip and load Ji Dao, the front of the semiconductor chip be equipped with first electrode and
Second electrode, the back side are equipped with third electrode, and the load Ji Dao includes first surface and the second surface opposite with first surface,
Load Ji Dao is connect with cooling fin；
The third electrode at the semiconductor chip back side is welded to the of load Ji Dao by the first welding material by step 2
On one surface；
Step 3 provides two conductive metal sheets, and one end of the first conductive metal sheet is welded by the second welding material
Onto the positive first electrode of semiconductor chip, one end of the second conductive metal sheet is welded to by the second welding material and is partly led
In the second electrode of body chip front side；
Step 4 first surface, the semiconductor chip, first of the plastic-sealed body package load Ji Dao with insulation performance
The other end of one end of conductive metal sheet and the second conductive metal sheet, the first conductive metal sheet and the second conductive metal sheet is as half
The pin of conductor device extends outside plastic-sealed body.
Further, the first conductive metal sheet in step 3 and the second conductive metal sheet are welded on semiconductor chip simultaneously
On positive electrode.
Further, first welding material and the second welding material be conductivity type epoxyn, soldering paste or
Preforming weld tabs, welding manner is Diffusion Welding, solder connects, be sintered or eutectic welds.
Further, first conductive metal sheet and the second conductive metal sheet are connected by support member, the support
Component is removed by way of being punched or cutting after removing or encapsulate before plastic-sealed body encapsulating.
Compared with conventional semiconductor devices encapsulating structure, the invention has the following advantages that
1. the present invention using conductive metal sheet as packaging pin directly with the electrode welding of semiconductor chip,
Semiconductor chip electrode and pin are welded using metal wire or metal tape instead of traditional, the packaged resistance of the encapsulating structure is bright
It is aobvious to reduce, while conductive metal sheet acts also as heat conductor dissipation heat, reduces packaging thermal resistance；
2. process of the invention is simple, processing efficiency is significantly improved, while improving the reliability of product；
3. structure of the invention is easy to encapsulate, it can be achieved that encapsulation interconnected is processed and formed at one time.
Detailed description of the invention
Fig. 1 is the internal structure chart of conventional package TO-220 metal wire bonding.
Fig. 2 is the internal structure chart of conventional package SOP-8 metal welding.
Fig. 3 is the front view of the encapsulation of the embodiment of the present invention 1 100.
Fig. 4 is the rearview of the encapsulation of the embodiment of the present invention 1 100.
Fig. 5 is the perspective view of the encapsulation of the embodiment of the present invention 1 100.
Fig. 6 is the decomposition view of the encapsulation of the embodiment of the present invention 1 100.
Fig. 7 is the front view of the encapsulation of the embodiment of the present invention 2 200.
Fig. 8 is the rearview of the encapsulation of the embodiment of the present invention 2 200.
Fig. 9 is the internal structure chart of the encapsulation of the embodiment of the present invention 2 200.
Figure 10 is the exploded view of the encapsulation of the embodiment of the present invention 2 200.
The side view of the encapsulation of Figure 11 embodiment of the present invention 2 200.
The external side view of the encapsulation of Figure 12 embodiment of the present invention 3 300.
Figure 13 is that the embodiment of the present invention 3 encapsulates 300 Figure 12 along the sectional view of A-A.
Figure 14 is the internal structure chart of the encapsulation of the embodiment of the present invention 4 400.
Figure 15 is the side view of the encapsulation of the embodiment of the present invention 4 400.
Figure 16 is the rearview of the encapsulation of the embodiment of the present invention 5 500.
Figure 17 is the internal structure chart of the encapsulation of the embodiment of the present invention 5 500.
Detailed description of the invention: 1- cooling fin, 2- semiconductor chip, 3- plastic-sealed body, the first welding material of 4-, 5- second weld material
Material, 6- metal wire, 7- metal tape, the welding section 8-, 9- first electrode pin, 10 second electrode pins, the first conductive metal of 11-
Piece, the second conductive metal sheet of 12-, 13- load Ji Dao, 14- third electrode pin, 21- first electrode, 22- second electrode, 23-
Third electrode, 131- first surface, 132- second surface, the first metal salient point of 112-, 121- bending part, the second metal of 122-
Salient point.
Specific embodiment
Below with reference to specific drawings and examples, the invention will be further described.
The present invention is not limited to the following embodiments and the accompanying drawings, and each figure of institute's reference is to be able to this hair in the following description
Bright content is understood and is synoptically indicated to shape, size and positional relationship.That is, the present invention is not limited to each figures
Shape, size shown in illustrating and positional relationship.
For MOSFET semiconductor chip, the first electrode 21 is grid, and second electrode 22 is source electrode, third electrode 23
For drain electrode；For IGBT semiconductor chip, the first electrode 21 is grid, and second electrode 22 is emitter, third electrode 23
For collector, the above are known to industry technical staff, details are not described herein again.
Embodiment 1 is 100 paster type encapsulation forms of encapsulation, and Fig. 3 and Fig. 4 are respectively the front view and rearview for encapsulating 100,
As can be seen from the figure there are two pins, respectively the first conductive metal sheet 11 and the second conductive metal for the tool of semiconductor packages 100
Piece 12, the exposed cooling fin 1 in 3 bottom of plastic-sealed body are connected to load base island 13, it is believed that are the same components, and are identical
Material, identical processing technology are all thermally conductive and conductive metal material, for example, copper, copper alloy, iron nickel, aluminium, aluminium alloy or its
Its conductive material, it is understood that be exactly a component, the call and relationship about cooling fin 1 and load base island 13 are work in the industry
Known to journey technical staff, excessive narration is not done herein；
Fig. 5 is the perspective structure figure for encapsulating 100, can better illustrate the internal structure of encapsulation 100, can see in conjunction with figure
Out, one end of the positive first electrode 21 of the semiconductor chip 2 and the first conductive metal sheet 11 is welded, second electrode 22 and the
One end of two conductive metal sheets 12 is welded, and first surface 131, the semiconductor core on load base island 13 are packaged in the plastic-sealed body 3
The welding ends of piece 2, the first conductive metal sheet 11 and the second conductive metal sheet 12, the second surface of cooling fin 1 and load base island 13
132 is exposed outside plastic-sealed body 3, and the other end of the first conductive metal sheet 11 and the second conductive metal sheet 12 is respectively as semiconductor core
The first electrode 21 of piece 2 and the pin of second electrode 22 stretch out the third electrode 23 at 2 back side of semiconductor chip outside plastic-sealed body 3
It is formed and is electrically connected with load base island 13 and cooling fin 1, cooling fin 1 is usually soldered on pcb board in application process, is served as and is partly led
The pin of the third electrode 23 of body chip 2.
Fig. 6 be encapsulate 100 exploded view, which show the embodiment of the present invention encapsulation 100 inside respectively form between
Relationship illustrates the manufacturing method of semiconductor devices 100 with regard to this figure below:
Step 1 provides semiconductor chip 2 and load base island 13, and the front of the semiconductor chip 2 is equipped with the first electricity
Pole 21 and second electrode 22, the back side are equipped with third electrode 23, and load base island 13 includes first surface 131 and and first surface
131 opposite second surfaces 132, load base island 13 are connect with cooling fin 1；
The third electrode 23 at 2 back side of semiconductor chip is welded to load Ji Dao by the first welding material 4 by step 2
On 13 first surface 131；
Specifically, it (such as point tin, draws tin, silk-screen printing etc.) in several ways the first welding material 4 is arranged in load
On the first surface 131 on base island 13, then by picking up it is placed with equipment the third electrode 23 at 2 back side of semiconductor chip is placed on the
On one welding material 4, and pass through the welding manners such as Diffusion Welding, solder, eutectic weldering or sintering for third electrode 23 and load
Base island 13 welds together, and the first welding material 4 can be the Ag of 95.5% Pb, 2% Sn and 2.5% soldering paste formed or pre-
Molding weld tabs, or conductivity type epoxyn has lead or lead-free solder material；
Step 3 provides two conductive metal sheets, and one end of the first conductive metal sheet 11 is passed through the second welding material 5
It is welded in the positive first electrode 21 of semiconductor chip 2, one end of the second conductive metal sheet 12 is passed through into the second welding material 5
It is welded in the positive second electrode 22 of semiconductor chip 2；
Specifically, it is welded using mode same with step 2, the second welding material 5 can be using the first welding material
Expect that 4 same high-temperature solders, in this way welding first electrode 21, second electrode 22 and third electrode 23 can be completed with a step, be saved
The time of encapsulation, reduce packaging technology；Second welding material 5 can also be using solder, such as 88% Pb, 10%
The soldering paste or unleaded SAC305 metal alloy that Sn, 2% Ag are formed, the solder of such semiconductor chip front and back because
Fusing point is different, it is necessary to it is welded by temperature different twice, these are all known to the engineers and technicians of the industry,
So not described in detail herein.
First conductive metal sheet 11 is connected with the second conductive metal sheet 12 by support member, and the first conductive gold is prevented
When belonging to piece 11 and the second conductive metal sheet 12 while being welded on semiconductor chip 2 not in the same plane, it can simplify simultaneously
Technique.
Step 4 first surface 131, the semiconductor chip on the package of the plastic-sealed body 3 load base island 13 with insulation performance
2, one end of the first conductive metal sheet 11 and the second conductive metal sheet 12, the first conductive metal sheet 11 and the second conductive metal sheet 12
The other end extend outside plastic-sealed body 3 as the pin of semiconductor devices；
The plastic-sealed body 3 can be any thermoplastic material appropriate or thermosetting material, and be formed by multiple technologies,
Such as the technologies such as compression forming, injection moulding, powder compacting or fluid molding.
Step 5 completes the device after plastic packaging solidifies, and extra support member is removed by way of being punched or cutting,
Form single semiconductor devices.
Embodiment 2 is 200 inline package forms of encapsulation, and Fig. 7 and Fig. 8 are respectively the front view and rearview for encapsulating 200,
From the point of view of front view, with traditional TO-220 without any difference, but from the point of view of rearview, the present embodiment encapsulation 200 and biography
Unite TO-220(such as Fig. 1) comparison, encapsulate 200 third electrode pin 14 directly connect with load base island 13 and in it is same put down
Face, and the third electrode pin 14 of tradition TO-220 is drawn by the welding section 8 of lead frame, and load base island 13 and third electricity
Pole pin 14 exposes the part outside plastic-sealed body not in one plane.
As shown in Figures 9 and 10, respectively encapsulation 200 internal structure and exploded view, to simplify the explanation for the sake of, have been omitted from
Welding material, the first conductive metal sheet 11 are welded as pin and semiconductor chip 2 positive first electrode 21, and second is conductive
Sheet metal 12 is welded as pin and second electrode 22, and the of the third electrode 23 at 2 back side of semiconductor chip and load base island 13
One surface 131 welding, third electrode pin 14 connect with load base island 13 extraction semiconductor chip 2 third electrode 23, first
The other end of conductive metal sheet 11, the other end of the second conductive metal sheet 12, load base island 13, cooling fin 1 and third electrode draw
Foot 14 is in same plane after packaging, and thickness is identical, that is, the usually described isotypic framework, sees Figure 11 (special-shaped frame
Can refer to the side view of Figure 15), and conventional package TO-220 mainly uses gold thread, copper wire, alloy wire aluminum steel or aluminium strip etc. by drawing
Line mode is welded, and the welding section 8 on the electrode and lead frame of semiconductor chip 2 is connected by metal lead wire, sees Fig. 1；
In view of the power requirement of different components is different, the thickness of conductive metal sheet can be any of 0.1mm ~ 5mm in the present embodiment
Range needs to lead to guarantee that conductive metal sheet is placed on behind the front of semiconductor chip with load base island 13 in same plane
The preparatory bending of electric metal piece has a certain degree, and is similarly and guarantees that there is certain peace at the edge of conductive metal sheet and semiconductor chip
Full electrical separation is also required for bending between conductive metal sheet welding portion and pin extension.
Embodiment 3 is that 300 inline package forms of encapsulation are reduced and tied to further improve the heat dissipation performance of encapsulation 200
Thermal resistance between shell, promoted current capacity, reduce power loss, we plastic-sealed body 3 is carried out it is thinned, by the second conductive metal sheet
12 bending part 121 exposes outside plastic-sealed body 3, as shown in Figure 12 and Figure 13, for the outside drawing and cross-sectional view of encapsulation 300, knot
Structure is substantially similar to encapsulation 200, and the main distinction is that the thickness of plastic-sealed body 3 only has original 1/5 ~ 1/2.The dress of 300 structural bases
The second surface 132 on chip base island 13 and a part of cooling fin 1 are exposed outside plastic-sealed body 3, and second conductive metal sheet 12 on top is curved
Folding part points 121 is also exposed outside plastic-sealed body 3, has achieved the effect that two-side radiation, and device thermal resistance is by 0.7 ° of conventional package TO-220
C/W is reduced to 0.45 °C/W, and therefore, the packing forms that such volume for reducing capsulation material exposes conductive metal sheet are suitable for this
Invent the structure in all embodiments.
Embodiment 4 is 400 inline package forms of encapsulation, for another encapsulation knot of alternative tradition TO-220 encapsulation
Structure, shape and tradition TO-220 are completely the same, and as shown in figure 14, for the internal structure chart of encapsulation 400, semiconductor chip 2 is still
It is welded on the first surface 131 on load base island 13 by the way of encapsulation 100, the first conductive metal sheet 11 and the second conductive gold
Belong to piece 12 to be still respectively welded in the positive first electrode 21 of semiconductor chip 2 and second electrode 22 by the way of encapsulation 100,
Because being direct plugging-in device, intermediate third electrode pin 14, intermediate third electrode pin have been had more compared to encapsulation 100
14 will be welded by modes such as Diffusion Welding, solder and sintering convenient for the end of welding and the first surface 131 on load base island 13
It connects and links together, the third electrode 23 for same 2 back side of semiconductor chip forms electric path, while drawing third electrode
23。
As shown in figure 15, it is the side view of encapsulation 400, encapsulates 400 load base island 13, cooling fin 1, the first conductive metal
Piece 11, the second conductive metal sheet 12 and third electrode pin 14 are split type structure, and it is special-shaped which offers a saving traditional TO-220
The cost of frame, load base island 13, cooling fin 1 can be with the first conductive metal sheets 11, the second conductive metal sheet 12, third electrode
Thickness as pin 14, or different thickness, the first conductive metal sheet 11, the second conductive metal sheet 12 and third electricity
Pole pin 14 with a thickness of 0.5mm, load base island 13 and cooling fin 1 with a thickness of 1.3mm, both guaranteed dissipating for packaging in this way
Hot property and electric conductivity, and can be mutually compatible with traditional packaging appearance, accomplish the without differences replacement of application end.
Embodiment 5 is 500 paster type encapsulation forms of encapsulation, and Figure 16 is the rearview for encapsulating 500, and corresponding tradition is common
DFN packing forms, plastic-sealed body 3 are wrapped in the first surface 131 on load base island 13, and the second surface 132 on load base island 13 exposes
It is used as cooling fin 1 outside plastic-sealed body 3, while being connected with third electrode pin 14, four there are also a row exposed outside plastic-sealed body 3 draw
Foot is the pin terminal of the first conductive metal sheet 11, the second conductive metal sheet 12 composition；
It as shown in figure 17, is the internal structure chart after 500 removal plastic-sealed body 3 of encapsulation, for ease of description, encapsulation 500 is not
Show welding material, the first conductive metal sheet 11 and the second conductive metal sheet 12 as pin still using encapsulation 100 by the way of
Be respectively welded in the positive first electrode 21 of semiconductor chip 2 and second electrode 22, conductive metal sheet with a thickness of 0.154mm,
The electrode welding of one end and semiconductor chip 2, welding ends by punching mode generate it is multiple for welding the first metals it is convex
Point 112 and the second metal salient point 122, the other end extend outside plastic-sealed body 3, are formed with the pin portions of conductive path.
The first conductive metal sheet 11 and the second conductive metal sheet 12 can be any shape, any ruler in the embodiment of the present invention
Very little conductive material, part of the conductive metal sheet in plastic-sealed body 3 are formed by bending salient point, and the size of salient point is no more than half
Conductive metal sheet is welded on the electrode of semiconductor chip 2 by salient point, extends plastic packaging by the area of 2 electrode of conductor chip
Pin after conductive metal sheet rib cutting forming outside body 3 as electrode is drawn, and realizes interconnection package by this method, described second leads
Electric metal piece 12 is used as pin, and width can increase or reduce according to the practical overcurrent size of chip, and width is no more than and partly leads
The width of body chip 2.
In embodiments of the present invention the material of the first electrode of semiconductor chip 2 can be AlCu, AlSiCu, AlSi,
The metal component of TiNiAg, NiPdAu, NiAu, second electrode can be identical with first electrode, can also be different, semiconductor core
The metal component of the third electrode at 2 back side of piece is generally TiNiAg.
The present invention and its embodiments have been described above, description is not limiting, it is shown in the drawings also only
It is one of embodiments of the present invention, actual structure is not limited to this.All in all if the ordinary skill people of this field
Member is enlightened by it, without departing from the spirit of the invention, is not inventively designed similar to the technical solution
Frame mode and embodiment, be within the scope of protection of the invention.
Claims (10)
1. a kind of encapsulating structure of high current power semiconductor, including cooling fin (1), semiconductor chip (2), plastic-sealed body
(3) and load Ji Dao (13), the semiconductor chip (2) include positive first electrode (21), second electrode (22) and front
The third electrode (23) at the opposite back side, the load Ji Dao (13) include first surface (131) and with first surface (131) phase
Pair second surface (132), the load Ji Dao (13) is the metal material of conductive and heat-conductive, and is connect with cooling fin (1), described
The third electrode (23) at semiconductor chip (2) back side is welded on the first surface (131) of (13) load Ji Dao, and feature exists
In one end of the positive first electrode of the semiconductor chip (2) (21) and the first conductive metal sheet (11) is welded, second electrode
(22) it is welded with the one end of the second conductive metal sheet (12), the first table of load Ji Dao (13) is packaged in the plastic-sealed body (3)
Face (131), semiconductor chip (2), the first conductive metal sheet (11) and the second conductive metal sheet (12) welding ends, cooling fin
(1) and the second surface (132) of load Ji Dao (13) it is exposed plastic-sealed body (3) outside, the first conductive metal sheet (11) and second is led
The other end of electric metal piece (12) stretches out plastic-sealed body (3) outside as pin；
The encapsulating structure is inline package form, and third electrode pin (14) directly connect and is in load Ji Dao (13)
Same plane has a certain degree the preparatory bending of conductive metal sheet, after conductive metal sheet is placed on the front of semiconductor chip
With load Ji Dao (13) in same plane, the other end of the first conductive metal sheet (11), the second conductive metal sheet (12) it is another
End, load Ji Dao (13), cooling fin (1) and third electrode pin (14) are in same plane after packaging, and thickness is identical；The
The bending part (121) of two conductive metal sheets (12) exposes plastic-sealed body (3) outside.
2. the encapsulating structure of a kind of high current power semiconductor according to claim 1, it is characterized in that: described first
Conductive metal sheet (11) and the second conductive metal sheet (12) are copper sheet, alcu alloy film, iron nickel sheet, aluminium flake or aluminum alloy sheet.
3. the encapsulating structure of a kind of high current power semiconductor according to claim 1, it is characterized in that: described first
Conductive metal sheet (11) and the second conductive metal sheet (12) with a thickness of 0.1mm ~ 5mm.
4. the encapsulating structure of a kind of high current power semiconductor according to claim 1, it is characterized in that: described half
Conductor chip (2) is MOSFET chip, igbt chip or the SIC chip of silicon substrate.
5. a kind of encapsulating structure of high current power semiconductor according to claim 1, feature
Be: the applicable packing forms of the encapsulating structure are TO-220, TO-251, TO-262, TO-3P, TO-247, TO-264,
TO-252, TO-263, SOP-8 or DFN.
6. a kind of encapsulating structure of high current power semiconductor according to claim 1, feature
Be: the load Ji Dao (13) is one or more, and electric insulation between multiple load Ji Dao (13), each load base
It is welded on island (13) semiconductor chip (2), the positive electrode of each semiconductor chip (2) is welded with conductive metal sheet.
7. a kind of manufacturing method of the encapsulating structure of high current power semiconductor according to claim 1, feature
It is to include the following steps:
Step 1 provides semiconductor chip (2) and load Ji Dao (13), and the front of the semiconductor chip (2) is equipped with the first electricity
Pole (21) and second electrode (22), the back side be equipped with third electrode (23), the load Ji Dao (13) include first surface (131) and
The second surface (132) opposite with first surface (131), load Ji Dao (13) are connect with cooling fin (1)；
The third electrode (23) at semiconductor chip (2) back side is welded to load base by the first welding material (4) by step 2
On the first surface (131) on island (13)；
Step 3 provides two conductive metal sheets, and one end of the first conductive metal sheet (11) is passed through the second welding material (5)
It is welded in semiconductor chip (2) positive first electrode (21), one end of the second conductive metal sheet (12) is passed through into the second weldering
Material (5) is connect to be welded in semiconductor chip (2) positive second electrode (22)；
Step 4 first surface (131), the semiconductor core of plastic-sealed body (3) package load Ji Dao (13) with insulation performance
One end of piece (2), the first conductive metal sheet (11) and the second conductive metal sheet (12), the first conductive metal sheet (11) and second are led
The other end of electric metal piece (12) extends plastic-sealed body (3) outside as the pin of semiconductor devices.
8. a kind of manufacturing method of high current encapsulating structure of power semiconductor part according to claim 7, it is characterized in that:
It is positive that the first conductive metal sheet (11) and the second conductive metal sheet (12) in step 3 are welded on semiconductor chip (2) simultaneously
On electrode.
9. a kind of manufacturing method of high current encapsulating structure of power semiconductor part according to claim 7, it is characterized in that:
First welding material (4) and the second welding material (5) are conductivity type epoxyn, soldering paste or preforming weldering
Piece, welding manner is Diffusion Welding, solder connects, be sintered or eutectic welds.
10. a kind of manufacturing method of high current encapsulating structure of power semiconductor part according to claim 7, feature
Be: first conductive metal sheet (11) is connected with the second conductive metal sheet (12) by support member, and the support member exists
It is removed by way of being punched or cutting after removing or encapsulate before plastic-sealed body (3) encapsulating.
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| CN109755305A (en) * | 2017-11-02 | 2019-05-14 | 华润微电子（重庆）有限公司 | A kind of IGBT conjunction Feng Danguan |
| CN110070406A (en) * | 2018-01-23 | 2019-07-30 | 长芯半导体有限公司 | Client chip fast custom method |
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| CN109545697B (en) * | 2018-12-26 | 2024-06-18 | 桂林电子科技大学 | Semiconductor packaging method and semiconductor packaging structure |
| CN109727943A (en) * | 2019-02-27 | 2019-05-07 | 无锡新洁能股份有限公司 | A semiconductor device packaging structure with low thermal resistance and its manufacturing method |
| CN110010577A (en) * | 2019-04-08 | 2019-07-12 | 深圳市鹏源电子有限公司 | In-line power devices, semiconductor assemblies, in-wheel motor drives or automotive drives and new energy vehicles |
| US12125770B2 (en) | 2019-04-08 | 2024-10-22 | Shenzhenshi Pengyuan Electronics Co., Ltd. | In-line power device, semiconductor assembly, in-wheel motor driver or vehicle driver and new-energy vehicle |
| CN109860127B (en) * | 2019-04-10 | 2024-08-27 | 马鞍山市槟城电子有限公司 | Chip package and packaging technology thereof |
| CN110890336A (en) * | 2019-12-06 | 2020-03-17 | 无锡电基集成科技有限公司 | Semiconductor device packaging structure |
| CN111477555A (en) * | 2020-05-18 | 2020-07-31 | 佛山市蓝箭电子股份有限公司 | Packaging process of bump type bridging power device |
| CN112701094A (en) * | 2020-12-15 | 2021-04-23 | 杰群电子科技（东莞）有限公司 | Power device packaging structure and power electronic equipment |
| CN115995433B (en) * | 2023-03-23 | 2023-06-23 | 深圳平创半导体有限公司 | Power semiconductor device packaging structure and preparation method thereof |
| CN221948132U (en) * | 2023-08-04 | 2024-11-01 | 苏州快可光伏电子股份有限公司 | A bypass module, junction box and photovoltaic module |
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