CN106289970B - A kind of chip external force resistance test device and its test method - Google Patents
A kind of chip external force resistance test device and its test method Download PDFInfo
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- CN106289970B CN106289970B CN201610614003.3A CN201610614003A CN106289970B CN 106289970 B CN106289970 B CN 106289970B CN 201610614003 A CN201610614003 A CN 201610614003A CN 106289970 B CN106289970 B CN 106289970B
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- 238000012360 testing method Methods 0.000 title claims abstract description 36
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- 239000000758 substrate Substances 0.000 claims abstract description 88
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- 238000005259 measurement Methods 0.000 claims abstract description 6
- 239000004065 semiconductor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000009530 blood pressure measurement Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N3/00—Investigating strength properties of solid materials by application of mechanical stress
- G01N3/08—Investigating strength properties of solid materials by application of mechanical stress by applying steady tensile or compressive forces
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N2203/00—Investigating strength properties of solid materials by application of mechanical stress
- G01N2203/003—Generation of the force
- G01N2203/005—Electromagnetic means
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Abstract
The embodiment of the invention discloses a kind of chip external force resistance test devices, comprising: chip fixation member, external force apply component and thrust measurement component；Wherein, the chip is fixed in the chip fixation member, and the external force applies the side that component is located at the chip substrate face, and it is plane that the external force, which applies side of the component towards the chip substrate face, and the plane is parallel with the chip substrate face；The external force applies component and connects the thrust measurement component, the external force applies component and is used to push to when being driven the chip substrate face, and the thrust measurement component, which is used to measure the external force application component, which pushes the chip substrate face to, makes the chip be applied to the thrust size on the external force application component when being damaged fracture.The invention also discloses a kind of chip external force resistance test methods.Chip external force resistance device and method provided in an embodiment of the present invention can test out influence of the chip mill line to chip external force resistance ability, and test data is more accurate.
Description
Technical Field
The invention relates to the technical field of chip external force resistance measurement, in particular to a chip external force resistance testing device and a testing method thereof.
Background
In a semiconductor Wafer (Wafer) module, a Wafer needs to be thinned and scribed into individual chips, and in the thinning process, textures with different depths are generated on the back surfaces (also called substrate surfaces) of the chips, which may result in poor physical external force resistance of the chips. The conventional mechanical strength test is a point pressure test, which applies pressure to a certain point of the chip. The traditional point pressure test method is as follows: firstly, horizontally placing a chip on a platform; an external force of a certain force is applied to a certain point above the chip and maintained for a certain time, and then the external force is removed and whether the chip is damaged or not is checked, as shown in fig. 1. The disadvantages of this point pressure measurement method are: 1. the flatness requirement on the platform is high, and if the flatness of the platform is not enough, the deviation of the tested data is large; 2. if the chip area is large, only the point is stressed, and the accuracy of the test data is not enough; 3. the method cannot test the influence degree of the texture on the external force resistance of the chip. Therefore, the conventional method cannot effectively test the influence degree of the texture on the back surface of the chip on the physical external force resistance of the chip.
Disclosure of Invention
The embodiment of the invention provides a chip external force resistance testing device and a testing method thereof, which are used for solving the problem that the influence degree of the texture on the back surface of a chip on the physical external force resistance of the chip cannot be effectively tested by the conventional method for testing the physical external force resistance of the chip.
In order to achieve the above object, an embodiment of the present invention provides a device for testing external force resistance of a chip, where the device includes: a chip fixing member, an external force applying member and a thrust measuring member; wherein,
the chip is fixed on the chip fixing component, the external force applying component is positioned on one side of the chip substrate surface, one side of the external force applying component facing the chip substrate surface is a plane, and the plane is parallel to the chip substrate surface;
the external force applying component is connected with the thrust measuring component, the external force applying component is used for pushing to the chip substrate surface when being driven, and the thrust measuring component is used for measuring the magnitude of the thrust acting on the external force applying component when the external force applying component pushes to the chip substrate surface to damage and break the chip.
Optionally, a width of a plane of the external force applying component facing the chip substrate surface is greater than a width of the chip substrate surface, and an end of the plane of the external force applying component facing the chip substrate surface, which is close to a middle portion of the chip substrate surface, is straight.
Optionally, the apparatus further comprises: a stepping motor;
the area of the chip substrate surface in contact with the external force applying component is larger than or equal to one third of the area of the chip substrate surface, and the external force applying component is driven by the stepping motor to push the chip substrate surface until the chip is damaged and broken.
Optionally, the apparatus further comprises: a positioning member;
the external force applying component comprises a push broach, the chip is vertically fixed on the chip fixing component, and the height of the lower edge of the push broach is limited by the positioning component.
Optionally, wherein the height of the lower edge of the push broach is less than or equal to two-thirds of the height of the chip.
The embodiment of the invention also provides a chip external force resistance testing method, which comprises the following steps:
fixing the chip on a chip fixing member;
arranging an external force applying component on one side of the chip substrate surface, wherein one side of the external force applying component facing the chip substrate surface is a plane, and the plane is parallel to the chip substrate surface;
connecting the external force applying part to a thrust force measuring part, and pushing the external force applying part to the chip substrate surface until the chip is damaged and broken;
and acquiring the magnitude of the thrust acting on the external force application component when the chip is broken through the thrust measurement component.
Optionally, a width of a plane of the external force applying component facing the chip substrate surface is set to be larger than a width of the chip substrate surface, and an end of the plane of the external force applying component facing the chip substrate surface, which is close to a middle portion of the chip substrate surface, is set to be straight.
Optionally, wherein an area of the chip substrate surface in contact with the external force applying component is greater than or equal to one third of an area of the chip substrate surface, and the external force applying component is driven by a stepping motor to push towards the chip substrate surface until the chip is damaged and broken.
Optionally, the external force applying component includes a push-type broach for vertically fixing the chip on the chip fixing device, and the height of the lower edge of the push-type broach is limited by the positioning component.
Optionally, wherein a height of a lower edge of the push broach is set to be less than or equal to two-thirds of the height of the chip.
The device and the method for testing the external force resistance of the chip provided by the embodiment of the invention can test the influence of the grinding lines of the chip on the external force resistance of the chip, and the test data is more accurate.
Drawings
FIG. 1 is a schematic diagram of a prior art chip site pressure test method;
fig. 2 is a schematic front view of a chip external force resistance testing apparatus according to a first embodiment of the present invention;
FIG. 3 is a left side view of the testing apparatus according to the first embodiment;
FIG. 4 is a schematic front view of a chip anti-force testing apparatus according to a second embodiment of the present invention;
FIG. 5 is a left side view of the testing apparatus of the second embodiment;
FIG. 6 is a schematic front view of a device for testing external force resistance of a chip according to a third embodiment of the present invention;
FIG. 7 is a left side view of the testing apparatus of the third embodiment;
FIG. 8 is a diagram showing the relationship between the chip holding and pushing members according to the fourth embodiment;
FIG. 9 is a flowchart illustrating a method according to an embodiment of the present invention.
Description of reference numerals: 1-chip mounting component; 2-positioning means for an external force applying means (e.g., a push-type broach); 3-substrate side of chip.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The technical solution of the present invention will be described in more detail with reference to the accompanying drawings and examples.
It should be noted that, if not conflicting, the embodiments of the present invention and the features of the embodiments may be combined with each other within the scope of protection of the present invention. Additionally, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.
A chip anti-external force type apparatus implementing various embodiments of the present invention will now be described with reference to the accompanying drawings. In the following description, suffixes such as "module", "component", or "unit" used to denote elements are used only for facilitating the explanation of the present invention, and have no specific meaning in themselves. Thus, "module" and "component" may be used in a mixture.
The embodiment of the invention provides a chip external force resistance testing device, which comprises: a chip fixing member, an external force applying member and a thrust measuring member; wherein,
the chip is fixed on the chip fixing component, the external force applying component is positioned on one side of the chip substrate surface, one side of the external force applying component facing the chip substrate surface is a plane, and the plane is parallel to the chip substrate surface;
the external force applying component is connected with the thrust measuring component, the external force applying component is used for pushing to the chip substrate surface when being driven, and the thrust measuring component is used for measuring the magnitude of the thrust acting on the external force applying component when the external force applying component pushes to the chip substrate surface to damage and break the chip.
Optionally, a width of a plane of the external force applying component facing the chip substrate surface is greater than a width of the chip substrate surface, and an end of the plane of the external force applying component facing the chip substrate surface, which is close to a middle portion of the chip substrate surface, is straight.
Optionally, the apparatus further comprises: a stepping motor; the area of the chip substrate surface in contact with the external force applying component is larger than or equal to one third of the area of the chip substrate surface, and the external force applying component is driven by the stepping motor to push the chip substrate surface until the chip is damaged and broken.
Optionally, the apparatus further comprises: a positioning member; the external force applying component comprises a push broach, the chip is vertically fixed on the chip fixing component, the positioning component is arranged above the chip fixing component, and the height of the lower edge of the push broach is limited by the positioning component.
Optionally, wherein the height of the lower edge of the push broach is less than or equal to two-thirds of the height of the chip.
The chip external force resistance device provided by the embodiment of the invention can test the influence of chip grinding lines on the chip external force resistance, and the test data is more accurate.
The invention is illustrated in detail below by means of a few specific examples.
The first embodiment,
The invention can be realized by a push broach. As shown in fig. 2 and 3, the chip to be tested is vertically fixed on the chip fixing member 1, and the chip fixing device may be a chip fixing platform, a chip fixing component, or the like, as long as the chip can be vertically fixed.
In this embodiment, for convenience of illustration, as shown in fig. 2, the front surface of the vertically fixed chip faces the reader, the push-type broach is located on the back surface 3 (substrate surface) of the chip, and the width of the push-type broach is greater than that of the chip; the height of the push broach is positioned by the height ruler or the height positioning part 2.
Preferably, in the chip fixing part for fixing the chip to be tested at about one third of the height, the height of the lower edge of the push broach is limited at about two thirds of the height of the chip by the height ruler, so that the contact area between the push broach and the substrate surface of the chip is about equal to one third of the substrate surface of the chip when the push broach pushes the substrate surface of the chip.
The push broach is connected with a thrust measuring component (not shown in the figure), and is gradually pushed to the substrate surface (namely the texture surface) of the chip by a stepping motor (not shown in the figure) until the chip is damaged and broken, and the thrust applied to the push broach is obtained, so that the capability of resisting the external force of the texture of the substrate surface of the chip can be obtained.
Example II,
As an alternative to the first embodiment, as shown in fig. 4 and 5, the pusher may be replaced with an external force application member having another shape as long as the side facing the chip substrate surface 3 is a flat surface whose lower edge is flat, and the height of the lower edge of the external force application member is positioned by the height positioning member 2. The chip is still vertically fixed on the chip fixing member 1, similarly to the first embodiment.
Example III,
Fig. 6 and 7 show another arrangement of the positioning member 2 for positioning the height of the external force application member (or push-broach), which is otherwise the same as the first and second embodiments and will not be described again.
Example four,
Fig. 8 shows another way of fixing the chip, and a schematic view of the pushing direction of the external force applying part (or pusher). Unlike the above embodiments, the chip may be horizontally fixed on the chip fixing member, the portion of the chip substrate surface extending into the fixing member occupies about one third of the area of the chip substrate surface, and the external force applying member or the push-type broach may be pushed toward the chip from top to bottom, and the portion of the external force applying member or the push-type broach in contact with the chip is a flat surface and occupies about one third of the area of the chip substrate surface. Under the drive of the stepping motor, the external force applying component or the push broach is gradually pushed to the substrate surface of the chip until the chip is damaged and broken, and the acting force applied to the external force applying component or the push broach at the moment is measured, so that the capability of resisting the external force of the substrate surface texture of the chip can be obtained.
Correspondingly, the invention also provides a chip external force resistance testing method, which comprises the following steps:
step 10: fixing the chip on a chip fixing device;
step 11: arranging an external force applying component on one side of the chip substrate surface, wherein one side of the external force applying component facing the chip substrate surface is a plane, and the plane is parallel to the chip substrate surface;
step 12: connecting the external force applying part to a thrust force measuring part, and pushing the external force applying part to the chip substrate surface until the chip is damaged and broken;
step 13: and the magnitude of the thrust applied to the external force applying component when the chip is damaged and broken is obtained through the thrust measuring component.
Optionally, in step 12, the width of the plane of the external force applying component facing the chip substrate surface is set to be larger than the width of the chip substrate surface, and one end of the plane of the external force applying component facing the chip substrate surface close to the middle of the chip substrate surface is set to be straight.
Optionally, in step 12, the area of the chip substrate surface in contact with the external force applying component is greater than or equal to one third of the area of the chip substrate surface, and the external force applying component is driven by a stepping motor to push towards the chip substrate surface until the chip is damaged and broken.
Optionally, the external force applying component comprises a push-type broach, and the step 10 comprises: and vertically fixing the chip on a chip fixing device, and limiting the height of the lower edge of the push broach through a positioning part.
Optionally, the height of the lower edge of the push broach is set to be less than or equal to two thirds of the height of the chip.
The chip external force resistance testing method provided by the embodiment of the invention can test the influence of chip grinding lines on the external force resistance of the chip, and the testing data is more accurate.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (6)
1. An apparatus for testing the resistance of a semiconductor wafer chip to external forces, the apparatus comprising: a chip fixing component, an external force applying component, a thrust measuring component and a positioning component; wherein,
one end of the chip is vertically fixed on the chip fixing component, the other end of the chip is not fixed on the chip fixing component, the external force applying component is positioned on one side of the chip substrate surface, one side of the external force applying component facing the chip substrate surface is a plane, and the plane is parallel to the chip substrate surface; the area of the chip substrate surface in contact with the external force applying component is more than or equal to one third of the area of the chip substrate surface;
the external force applying component is connected with the thrust measuring component, the external force applying component is used for horizontally pushing the chip substrate surface when being driven, and the thrust measuring component is used for measuring the magnitude of the thrust acting on the external force applying component when the external force applying component pushes the chip substrate surface to damage and break the chip;
the external force applying component comprises a push broach, and the height of the lower edge of the push broach is limited by the positioning component;
the width of the plane of the external force applying component facing to the chip substrate surface is larger than that of the chip substrate surface, and one end of the plane of the external force applying component facing to the chip substrate surface, close to the middle of the chip substrate surface, is straight.
2. The apparatus of claim 1, further comprising: a stepping motor;
the external force applying component is driven by the stepping motor to push the chip substrate surface until the chip is damaged and broken.
3. The apparatus of claim 1, wherein,
the height of the lower edge of the push broach is less than or equal to two thirds of the height of the chip.
4. A method for testing the external force resistance of a semiconductor wafer chip is characterized by comprising the following steps:
vertically fixing one end of the chip on a chip fixing component, wherein the other end of the chip is not fixed on the chip fixing component;
arranging an external force applying component on one side of the chip substrate surface, wherein one side of the external force applying component facing the chip substrate surface is a plane, and the plane is parallel to the chip substrate surface; the area of the chip substrate surface in contact with the external force applying component is more than or equal to one third of the area of the chip substrate surface;
connecting the external force applying component to a thrust measuring component, and horizontally pushing the external force applying component to the chip substrate surface until the chip is damaged and broken;
acquiring the magnitude of a thrust acting on the external force application component when the chip is broken through the thrust measurement component;
the external force applying component comprises a push broach, and the height of the lower edge of the push broach is limited by a positioning component;
the width of the plane of the external force applying component facing to the chip substrate surface is larger than that of the chip substrate surface, and one end of the plane of the external force applying component facing to the chip substrate surface, close to the middle of the chip substrate surface, is straight.
5. The method of claim 4, wherein,
and driving the external force applying component to push the chip substrate surface by adopting a stepping motor until the chip is damaged and broken.
6. The method of claim 4, wherein,
and setting the height of the lower edge of the push broach to be less than or equal to two thirds of the height of the chip.
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| CN111426554B (en) * | 2020-03-23 | 2021-10-08 | 天津大学 | A semiconductor chip high temperature shear test fixture |
| CN114034540B (en) * | 2021-06-21 | 2024-05-17 | 重庆康佳光电科技有限公司 | Chip performance testing method and device |
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Effective date of registration: 20211027 Address after: 100094 No. 6 Yongjia North Road, Beijing, Haidian District Patentee after: DATANG MICROELECTRONICS TECHNOLOGY Co.,Ltd. Patentee after: DATANG SEMICONDUCTOR DESIGN Co.,Ltd. Address before: 300110 2505 COFCO Plaza, No. 2, nanmenwai street, Nankai District, Tianjin Patentee before: Xin Xin finance leasing (Tianjin) Co.,Ltd. |