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CN106206332A - A kind of manufacture method of integrated circuit package structure - Google Patents

A kind of manufacture method of integrated circuit package structure Download PDF

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Publication number
CN106206332A
CN106206332A CN201610558795.7A CN201610558795A CN106206332A CN 106206332 A CN106206332 A CN 106206332A CN 201610558795 A CN201610558795 A CN 201610558795A CN 106206332 A CN106206332 A CN 106206332A
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CN
China
Prior art keywords
hole
electromagnetic
encapsulating material
encapsulation
temporary base
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Granted
Application number
CN201610558795.7A
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Chinese (zh)
Other versions
CN106206332B (en
Inventor
王培培
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Shandong Core Electronics Co Ltd
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Individual
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Priority to CN201610558795.7A priority Critical patent/CN106206332B/en
Publication of CN106206332A publication Critical patent/CN106206332A/en
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Publication of CN106206332B publication Critical patent/CN106206332B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561Batch processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)

Abstract

The invention provides the manufacture method of a kind of integrated circuit package structure, it is included in electromagnetic chip and forms the first through hole corresponding to the position of multiple electrodes, forms the second through hole in the border around electromagnetic chip;Carry out packaging body described in singulation along the center of the second through hole by laser, and the width of described second through hole 5 after cutting is more than the width of the first through hole;Obtaining encapsulating monomer, wherein, the second through hole includes some that be connected respectively, that be electrically isolated from each other with multiple described electrodes.The present invention passes through area and the thickness of Control peripheral circuit layer, forms the preferable packaging body of electronic shield, without being further added by the components such as electro-magnetic shielding cover in follow-up integrated antenna package, reduces encapsulation volume, enhance the motility of encapsulation.

Description

A kind of manufacture method of integrated circuit package structure
Technical field
The present invention relates to integrated antenna package field, be specifically related to the manufacture method of a kind of integrated circuit package structure.
Background technology
In integrated antenna package, due to electromagnetic radiation or the electromagnetic radiation in the external world of electronic device own, often lead Causing the jitter of integrated circuit, circuit malfunction, in prior art, is by easily by electromagnetic interference or send the half of electromagnetic wave Conductor element is encapsulated in specific integrated circuit, and this packaging body is being given electronic shield, and the component of its shielding is often one Individual metal cover body, such packaging body volume is relatively big and encapsulation is the most nimble.
Summary of the invention
Based on the problem solved in above-mentioned encapsulation, the invention provides the manufacture method of a kind of integrated circuit package structure, It comprises the following steps:
(1) temporary base of a large area hard is provided;
(2) being fixed on by electromagnetic component on described temporary base, this electromagnetic component is easily by electromagnetic interference or send electromagnetic wave Semiconductor element, its fixed form can be fixed by fixing glue;
(3) the first encapsulating material is set on described temporary base, and electromagnetic component is completely covered;
(4) after solidifying described encapsulating material, thinning described encapsulating material to suitable thickness but do not spill described electromagnetic component;
(5) form the first through hole at electromagnetic chip corresponding to the position of multiple electrodes, form the around the border of electromagnetic chip Two through holes, the sectional area of described first through hole is identical with the area of described electrode;
(6) form conductive material on top of the encapsulation material, and fill full described first and second through holes, the most only etch encapsulating material On the first conductive material, formed electrical connection the first and second through holes line layer.
(7) remove temporary base 1, carry out packaging body described in singulation by laser along the center of the second through hole, and The width of described second through hole 5 after cutting is more than the width of the first through hole.
(8) obtain encapsulating monomer, wherein, that the second through hole includes being connected with multiple described electrodes respectively, be electrically isolated from each other Some;
(9) provide one to have reeded heat-radiating substrate, coat one layer of thermal conductive insulation glue at bottom portion of groove, utilize this heat conductive insulating Encapsulation monomer solid is scheduled on bottom portion of groove by glue, and utilizes the second encapsulating material to fill and seal described encapsulation monomer;
(10) lead at the third through-hole filling deviateing the described electromagnetic chip center position boring formation described line layer of exposure Isoelectric substance is to form the outer terminal that connects, and is coupled with other electronic components by outer even terminal, forms integrated circuit package structure;
It is characterized in that: the width of the second through hole after cutting is for more than or equal to 1mm.
Present invention also offers the manufacture method of another kind of integrated circuit package structure, it comprises the following steps:
(1) temporary base of a large area hard is provided;
(2) being fixed on by electromagnetic component on described temporary base, this electromagnetic component is easily by electromagnetic interference or send electromagnetic wave Semiconductor element, its fixed form is fixed by fixing glue;
(3) the first encapsulating material is set on described temporary base, and electromagnetic component is completely covered;
(4) after solidifying described encapsulating material, thinning described encapsulating material to suitable thickness but do not spill described electromagnetic component;
(5) form the first through hole at electromagnetic chip corresponding to the position of multiple electrodes, form the around the border of electromagnetic chip Two through holes, the sectional area of described first through hole is identical with the area of described electrode;
(6) form conductive material on top of the encapsulation material, and fill full described first and second through holes, the most only etch encapsulating material On the first conductive material, formed electrical connection the first and second through holes line layer;
(7) remove temporary base 1, carry out packaging body described in singulation by laser along the center of the second through hole, and cut After the width of described second through hole 5 more than the width of the first through hole.
(8) obtain encapsulating monomer, wherein, that the second through hole includes being connected with multiple described electrodes respectively, be electrically isolated from each other Some;
(9) provide one to have reeded heat-radiating substrate, coat one layer of thermal conductive insulation glue at bottom portion of groove, utilize this heat conductive insulating Encapsulation monomer solid is scheduled on bottom portion of groove by glue, and utilizes the second encapsulating material to fill and seal described encapsulation monomer.
(10) deviateing the third through-hole of the described electromagnetic chip center position boring formation described line layer of exposure and filling out Fill the second conductive material and connect outward terminal to be formed, and be coupled with other electronic components by outer even terminal, form integrated circuit Encapsulating structure;
It is characterized in that: the area of the lateral parts that described second through hole fills described first conductive material accounts for described encapsulation monomer The 50%-90% of lateral area.
Wherein, fixing glue includes pressure-sensitive solidification glue, heat-curable glue, optic-solidified adhesive, silicone grease, epoxy resin etc..
Wherein, described temporary base is ceramic substrate, silicon substrate or plastic base.
Wherein, other electronic components described include controller, MOS transistor, resistance etc..
Advantages of the present invention is as follows:
The present invention passes through area and the thickness of Control peripheral circuit layer (the second through hole), forms the preferable packaging body of electronic shield, Without being further added by the components such as electro-magnetic shielding cover in follow-up integrated antenna package, reduce encapsulation volume, enhance the spirit of encapsulation Activity.
Accompanying drawing explanation
Fig. 1-8,10-11 are the process schematic of the manufacture method of the integrated circuit package structure of the present invention;
Fig. 9 is the top view that Fig. 8 encapsulates monomer.
Detailed description of the invention
Seeing Fig. 1-11, present invention firstly provides the method for packing of a kind of integrated circuit, concrete steps will entered as follows Line description, the position noun such as upper and lower, left and right appeared in description, side is both with respect to the position relationship in schematic diagram.
Seeing Fig. 1, it is provided that a temporary base 1, this substrate is large area hard substrate, such as ceramic substrate, silicon substrate, moulds Material substrate etc..
Seeing Fig. 2, be fixed on temporary base 1 by electromagnetic component 2, this electromagnetic component is easily by electromagnetic interference or send The semiconductor element of electromagnetic wave, such as RF element, photodetector, sensor, photelectric receiver etc., its fixed form can be passed through Fixing glue is fixed, and this fixing glue includes pressure-sensitive solidification glue, heat-curable glue, optic-solidified adhesive, silicone grease, epoxy resin etc..
Seeing Fig. 3, arrange encapsulating material 3, and electromagnetic component 2 is completely covered on temporary base 1, this encapsulating material is permissible It is the encapsulants such as polyimides, heat reactive resin or light-cured resin.
Seeing Fig. 4, after solidifying described encapsulating material 3, thinning described encapsulating material 3 to suitable thickness but does not spill institute State electromagnetic component 2.
Seeing Fig. 5, the position corresponding to electrode at electromagnetic chip 2 forms the first through hole 4, at all casts around electromagnetic chip 2 Becoming the second through hole 5, the sectional area of described first through hole 4 is identical with the area of described electrode, and the width of described second through hole 5 is more than The width of the first through hole 4, size is more than 2mm width, so can more preferably stop interference or other groups of Electromagnetic Interference of electromagnetic wave Part.
See Fig. 6, encapsulating material 3 forms conductive material 6, and fill full described first and 5 second through holes 4,5, so After only etch the conductive material 6 on encapsulating material 3, form the line layer of electrical connection the first and second through holes, described conductive material Can be prevented from the material that electromagnetic wave penetrates, such as metal etc..
See Fig. 7, remove temporary base 1, carry out encapsulating described in singulation along the center of the second through hole 5 by laser 7 Body, described laser may be replaced by the width of described second through hole 5 after machine cuts, and cutting still greater than the first through hole The width of 4, the width of the second through hole 5 after cutting is more than or equal to 1mm.
Seeing Fig. 8, obtain encapsulating monomer 100, its top view is as it is shown in figure 9, four the most corresponding four first of electrodes lead to Hole 4, four the second through holes 5 of surrounding around the side of described electromagnetic component 2, and, the second through hole 5 includes respectively with described four Four parts that individual electrode is connected, that be electrically isolated from each other, certainly, the difference of its electromagnetic component, number of poles, the first through hole 4 and The number of the second through hole 5 is the most different, but in any case, described second through hole fills the area of the lateral parts of conductive material 6 Account for the 50%-90% of described encapsulation monomer 100 lateral area, only in this way could preferably play the effect of electromagnetic shielding.
See Figure 10, it is provided that one has reeded heat-radiating substrate 8, and this heat-radiating substrate 8 can be ceramic substrate, macromolecule Heat-radiating substrates etc., coat one layer of thermal conductive insulation glue 9 at bottom portion of groove, utilize this thermal conductive insulation glue 9 to be fixed on by encapsulation monomer 100 Bottom portion of groove, and utilize encapsulating material 10 to fill and seal described encapsulation monomer 100.
With reference to Figure 11, formed in the position boring of deviation chip center and expose the through hole of described line layer and fill conducting objects Matter is to form the outer terminal 11 that connects, and is coupled with other electronic components by outer even terminal, and other electronic components described include control Device processed, MOS transistor, resistance etc..
The present invention passes through area and the thickness of Control peripheral circuit layer (the second through hole), forms electronic shield and preferably encapsulates Body, without being further added by the components such as electro-magnetic shielding cover in follow-up integrated antenna package, reduces encapsulation volume, enhances encapsulation Motility.
It is last that it is noted that obviously above-described embodiment is only for clearly demonstrating example of the present invention, and also The non-restriction to embodiment.For those of ordinary skill in the field, can also do on the basis of the above description Go out change or the variation of other multi-form.Here without also cannot all of embodiment be given exhaustive.And thus drawn What Shen went out obviously changes or changes among still in protection scope of the present invention.

Claims (5)

1. a manufacture method for integrated circuit package structure, it comprises the following steps:
(1) temporary base of a large area hard is provided;
(2) being fixed on by electromagnetic component on described temporary base, this electromagnetic component is easily by electromagnetic interference or send electromagnetic wave Semiconductor element, its fixed form can be fixed by fixing glue;
(3) the first encapsulating material is set on described temporary base, and electromagnetic component is completely covered;
(4) after solidifying described encapsulating material, thinning described encapsulating material to suitable thickness but do not spill described electromagnetic component;
(5) form the first through hole at electromagnetic chip corresponding to the position of multiple electrodes, form the around the border of electromagnetic chip Two through holes, the sectional area of described first through hole is identical with the area of described electrode;
(6) form conductive material on top of the encapsulation material, and fill full described first and second through holes, the most only etch encapsulating material On the first conductive material, formed electrical connection the first and second through holes line layer;
(7) remove temporary base 1, carry out packaging body described in singulation by laser along the center of the second through hole, and cut After the width of described second through hole 5 more than the width of the first through hole;
(8) obtain encapsulating monomer, wherein, that the second through hole includes being connected with multiple described electrodes respectively, be electrically isolated from each other many Individual part;
(9) provide one to have reeded heat-radiating substrate, coat one layer of thermal conductive insulation glue at bottom portion of groove, utilize this heat conductive insulating Encapsulation monomer solid is scheduled on bottom portion of groove by glue, and utilizes the second encapsulating material to fill and seal described encapsulation monomer;
(10) lead at the third through-hole filling deviateing the described electromagnetic chip center position boring formation described line layer of exposure Isoelectric substance is to form the outer terminal that connects, and is coupled with other electronic components by outer even terminal, forms integrated circuit package structure;
It is characterized in that: the width of the second through hole after cutting is for more than or equal to 1mm.
2. a manufacture method for integrated circuit package structure, it comprises the following steps:
(1) temporary base of a large area hard is provided;
(2) being fixed on by electromagnetic component on described temporary base, this electromagnetic component is easily by electromagnetic interference or send electromagnetic wave Semiconductor element, its fixed form is fixed by fixing glue;
(3) the first encapsulating material is set on described temporary base, and electromagnetic component is completely covered;
(4) after solidifying described encapsulating material, thinning described encapsulating material to suitable thickness but do not spill described electromagnetic component;
(5) form the first through hole at electromagnetic chip corresponding to the position of multiple electrodes, form the around the border of electromagnetic chip Two through holes, the sectional area of described first through hole is identical with the area of described electrode;
(6) form conductive material on top of the encapsulation material, and fill full described first and second through holes, the most only etch encapsulating material On the first conductive material, formed electrical connection the first and second through holes line layer;
(7) remove temporary base 1, carry out packaging body described in singulation by laser along the center of the second through hole, and cut After the width of described second through hole 5 more than the width of the first through hole;
(8) obtain encapsulating monomer, wherein, that the second through hole includes being connected with multiple described electrodes respectively, be electrically isolated from each other many Individual part;
(9) provide one to have reeded heat-radiating substrate, coat one layer of thermal conductive insulation glue at bottom portion of groove, utilize this heat conductive insulating Encapsulation monomer solid is scheduled on bottom portion of groove by glue, and utilizes the second encapsulating material to fill and seal described encapsulation monomer;
(10) formed and expose the third through-hole of described line layer and fill the deviateing the boring of described electromagnetic chip center position Two conductive materials are to form the outer terminal that connects, and are coupled with other electronic components by outer even terminal, form integrated antenna package Structure;
It is characterized in that: the area of the lateral parts that described second through hole fills described first conductive material accounts for described encapsulation monomer The 50%-90% of lateral area.
The manufacture method of integrated circuit package structure the most according to claim 1 and 2, it is characterised in that: fixing glue includes Pressure-sensitive solidification glue, heat-curable glue, optic-solidified adhesive, silicone grease, epoxy resin etc..
LED encapsulation structure the most according to claim 1 and 2, it is characterised in that: described temporary base is ceramic substrate, silicon Substrate or plastic base.
LED encapsulation structure the most according to claim 1 and 2, it is characterised in that: other electronic components described include controlling Device, MOS transistor, resistance etc..
CN201610558795.7A 2016-07-17 2016-07-17 A kind of manufacturing method of integrated circuit package structure Expired - Fee Related CN106206332B (en)

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111373525A (en) * 2017-12-14 2020-07-03 株式会社自动网络技术研究所 Circuit structure and electrical junction box
CN111490019A (en) * 2020-04-24 2020-08-04 济南南知信息科技有限公司 Integrated circuit structure and manufacturing method thereof
CN111863719A (en) * 2020-07-28 2020-10-30 南通通富微电子有限公司 Chip interconnection method
CN111863717A (en) * 2020-07-28 2020-10-30 南通通富微电子有限公司 Chip interconnection method
CN111863791A (en) * 2020-07-28 2020-10-30 南通通富微电子有限公司 Semiconductor packaging body and chip packaging body
CN111883439A (en) * 2020-07-28 2020-11-03 南通通富微电子有限公司 Chip packaging method
CN113380638A (en) * 2021-05-21 2021-09-10 苏州通富超威半导体有限公司 Method for setting through hole on packaging body and method for preparing packaging body
CN114402708A (en) * 2020-04-24 2022-04-26 宏启胜精密电子(秦皇岛)有限公司 Circuit board and method for manufacturing the same
CN118038766A (en) * 2024-04-12 2024-05-14 常州明耀半导体科技有限公司 LED display and manufacturing method thereof

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Publication number Priority date Publication date Assignee Title
CN1156949A (en) * 1995-11-16 1997-08-13 松下电器产业株式会社 Printed circuit board and its mounting body
CN1914727A (en) * 2004-02-13 2007-02-14 株式会社村田制作所 Electronic component and method for manufacturing the same
CN202443968U (en) * 2012-01-16 2012-09-19 日月光半导体制造股份有限公司 Semiconductor Package Structure
CN105140207A (en) * 2011-01-31 2015-12-09 株式会社东芝 Semiconductor device
CN105489593A (en) * 2015-12-24 2016-04-13 合肥祖安投资合伙企业(有限合伙) Electromagnetic shield packaging assembly and manufacturing method therefor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1156949A (en) * 1995-11-16 1997-08-13 松下电器产业株式会社 Printed circuit board and its mounting body
CN1914727A (en) * 2004-02-13 2007-02-14 株式会社村田制作所 Electronic component and method for manufacturing the same
CN105140207A (en) * 2011-01-31 2015-12-09 株式会社东芝 Semiconductor device
CN202443968U (en) * 2012-01-16 2012-09-19 日月光半导体制造股份有限公司 Semiconductor Package Structure
CN105489593A (en) * 2015-12-24 2016-04-13 合肥祖安投资合伙企业(有限合伙) Electromagnetic shield packaging assembly and manufacturing method therefor

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111373525B (en) * 2017-12-14 2023-07-18 株式会社自动网络技术研究所 Circuit structure and electrical junction box
CN111373525A (en) * 2017-12-14 2020-07-03 株式会社自动网络技术研究所 Circuit structure and electrical junction box
CN114402708A (en) * 2020-04-24 2022-04-26 宏启胜精密电子(秦皇岛)有限公司 Circuit board and method for manufacturing the same
CN111490019A (en) * 2020-04-24 2020-08-04 济南南知信息科技有限公司 Integrated circuit structure and manufacturing method thereof
CN114402708B (en) * 2020-04-24 2024-10-15 宏启胜精密电子(秦皇岛)有限公司 Circuit board and manufacturing method thereof
CN111863719B (en) * 2020-07-28 2022-07-19 南通通富微电子有限公司 Chip interconnection method
CN111883439A (en) * 2020-07-28 2020-11-03 南通通富微电子有限公司 Chip packaging method
CN111863717B (en) * 2020-07-28 2022-07-15 南通通富微电子有限公司 Chip interconnection method
CN111863791A (en) * 2020-07-28 2020-10-30 南通通富微电子有限公司 Semiconductor packaging body and chip packaging body
CN111883439B (en) * 2020-07-28 2022-07-26 南通通富微电子有限公司 Chip packaging method
CN111863717A (en) * 2020-07-28 2020-10-30 南通通富微电子有限公司 Chip interconnection method
CN111863719A (en) * 2020-07-28 2020-10-30 南通通富微电子有限公司 Chip interconnection method
CN113380638A (en) * 2021-05-21 2021-09-10 苏州通富超威半导体有限公司 Method for setting through hole on packaging body and method for preparing packaging body
CN118038766A (en) * 2024-04-12 2024-05-14 常州明耀半导体科技有限公司 LED display and manufacturing method thereof

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