CN106159057B - LED chip and preparation method thereof - Google Patents

Abstract

The invention provides an LED chip and a manufacturing method thereof. The manufacturing method includes: providing a substrate, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer; forming a first and a second transparent conductive layer; forming a work function greater than the transparent conductive layer The silver-containing metal reflective layer of the layer, wherein the metal reflective layer positioned on the first transparent conductive layer is a P electrode, and the metal reflective layer positioned on the second transparent conductive layer is an N electrode; the LED chip includes a substrate, an N-type semiconductor layer , an active layer and a P-type semiconductor layer, the first and second transparent conductive layers; the metal reflective layer, wherein the metal reflective layer positioned on the first transparent conductive layer is a P electrode, and the metal reflective layer positioned on the second transparent conductive layer For the N electrode. The beneficial effect of the present invention is to reduce the barrier height between the P, N type semiconductor layer and the metal reflective layer, thereby reducing the ohmic contact between the P, N type semiconductor layer and the metal reflective layer, and reducing the working time of the LED chip. voltage to increase the luminous efficiency of the LED chip.

Description

LED chip and manufacturing method thereof

technical field

The invention relates to the technical field of LED manufacturing, in particular to an LED chip and a manufacturing method thereof.

Background technique

A light emitting diode (Light Emitting Diode, LED) is a semiconductor solid-state light-emitting device, which is made using the principle of semiconductor PN junction electroluminescence. LED devices have good photoelectric properties such as low turn-on voltage, small size, fast response, good stability, long life, and no pollution. Therefore, they are widely used in outdoor and indoor lighting, backlighting, display, traffic indication and other fields.

Generally speaking, the LED chip structure is divided into three types: horizontal structure (front chip), vertical structure (vertical structure chip) and flip chip structure (flip chip); among them, the P and N electrodes in the flip structure LED chip are located On the same side of the light-emitting area, the light emitted by the quantum well layer in the core LED chip mainly escapes through the transparent sapphire layer, and the luminous efficiency of such an LED chip is higher.

However, in order to improve the luminous efficiency of the LED chip with the flip-chip structure in the prior art, a material with a relatively high light reflectivity is used to form the electrode layer. However, this may affect other performances of the LED chip, for example, causing an increase in the operating voltage of the LED chip.

Therefore, how to improve the luminous efficiency of the LED chip as much as possible without affecting other performances of the LED chip has become one of the technical problems to be solved urgently by those skilled in the art.

Contents of the invention

The problem to be solved by the present invention is to provide an LED chip and a manufacturing method thereof, so as to improve the luminous efficiency of the LED chip as much as possible on the premise of not affecting other performances of the LED chip as much as possible.

In order to solve the above problems, the present invention provides a method for manufacturing an LED chip, comprising:

provide the substrate;

sequentially forming an N-type semiconductor layer, an active layer, and a P-type semiconductor layer on the substrate;

forming an opening exposing part of the N-type semiconductor layer in the P-type semiconductor layer and the active layer;

A transparent conductive layer having a work function greater than that of the P-type semiconductor layer and the N-type semiconductor layer is formed on the P-type semiconductor layer and at the bottom of the opening, wherein the transparent conductive layer on the P-type semiconductor layer is the first transparent conductive layer , the transparent conductive layer on the N-type semiconductor layer exposed in the opening is a second transparent conductive layer, and there is no contact between the first transparent conductive layer and the second transparent conductive layer;

A silver-containing metal reflective layer is formed on the surface and sidewall of the first transparent conductive layer and the second transparent conductive layer, and the work function of the silver-containing metal reflective layer is greater than the work function of the transparent conductive layer, wherein, The metal reflective layer located on the first transparent conductive layer serves as the P electrode of the LED chip, the metal reflective layer located on the second transparent conductive layer serves as the N electrode of the LED chip, and the P electrode and the N electrode There is no contact between electrodes.

Optionally, the step of forming openings in the P-type semiconductor layer and the active layer includes:

Plasma etching is used to remove part of the material of the P-type semiconductor layer and the material of the active layer to form the opening.

Optionally, the step of forming a transparent conductive layer includes:

The P-type semiconductor layer close to the opening is exposed from the first transparent conductive layer, and the second transparent conductive layer covers part of the bottom surface of the opening, and the second transparent conductive layer is connected to the side of the opening. a first gap between the walls;

The step of forming a metal reflective layer on the surface and sidewall of the second transparent conductive layer includes: forming the metal reflective layer on the surface and sidewall of the second transparent conductive layer, and the sidewall of the metal reflective layer is connected to the opening There is a second gap between the side walls.

Optionally, a transparent conductive layer of indium tin oxide or zinc oxide material is formed.

Optionally, the step of forming the transparent conductive layer includes: forming the transparent conductive layer by means of magnetron sputtering deposition or reactive plasma deposition.

Optionally, the step of forming the metal reflective layer includes: forming a single-layer or laminated metal reflective layer.

Optionally, the step of forming the metal reflective layer includes: sequentially forming a silver layer and a titanium tungsten layer on the transparent conductive layer, and the silver layer and the titanium tungsten layer together constitute the metal reflective layer of the laminated structure;

Alternatively, a silver layer, a titanium tungsten layer and a platinum layer are sequentially formed on the transparent conductive layer, and the silver layer, the titanium tungsten layer and the platinum layer together constitute the reflective layer of the stacked structure.

Optionally, after the step of forming the metal reflective layer and before the step of forming the N electrode or the P electrode, the manufacturing method further includes:

A conductive protection layer is formed on the surface of the metal reflection layer.

Optionally, the material of the conductive protection layer is titanium tungsten, or a combination of one or more of chromium, platinum, titanium, copper, and nickel.

Optionally, the step of forming the conductive protection layer includes: forming a single-layer or laminated conductive protection layer.

Optionally, the step of forming the conductive protection layer includes: forming a conductive protection layer of a stacked structure, and making the surface of the conductive protection layer of the stacked structure a nickel layer.

Optionally, the step of forming the conductive protective layer includes: forming the conductive protective layer by means of magnetron sputtering deposition or chemical vapor deposition.

In addition, the present invention also provides an LED chip, comprising:

Substrate;

An N-type semiconductor layer on the substrate;

an active layer located on the N-type semiconductor layer;

a P-type semiconductor layer on the active layer, the P-type semiconductor layer and the active layer have openings exposing the N-type semiconductor layer;

The transparent conductive layer includes a first transparent conductive layer on the P-type semiconductor layer and a second transparent conductive layer at the bottom of the opening, and there is no contact between the first transparent conductive layer and the second transparent conductive layer; the The work function of the transparent conductive layer is greater than the work function of the transparent conductive layer of the P-type semiconductor layer and the N-type semiconductor layer;

Silver-containing metal reflective layer, which is located on the surface and sidewall of the first transparent conductive layer and the second transparent conductive layer, wherein the metal reflective layer located on the first transparent conductive layer is a P electrode, located on the second transparent conductive layer The metal reflective layer on the layer is an N electrode, and the P electrode and the N electrode are not in contact; the work function of the metal reflective layer is greater than that of the transparent conductive layer.

Optionally, the material of the transparent conductive layer is indium tin oxide or zinc oxide.

Optionally, the metal reflective layer is a single layer or a laminated structure.

Optionally, the metal reflective layer includes a silver layer on the transparent conductive layer and a titanium tungsten layer on the silver layer;

Alternatively, the metal reflective layer includes a silver layer on the transparent conductive layer, a titanium tungsten layer on the silver layer, and a platinum layer on the titanium tungsten layer in sequence.

Optionally, the LED chip also includes:

A conductive protective layer located on the surface of the metal reflective layer.

Optionally, the conductive protection layer is a single-layer or laminated structure.

Optionally, the surface of the conductive protection layer is a nickel layer.

Compared with the prior art, the technical solution of the present invention has the following advantages:

After sequentially forming an N-type semiconductor layer, an active layer, and a P-type semiconductor layer on the substrate, an opening exposing the N-type semiconductor layer is formed; after that, a transparent conductive layer is formed on the P-type semiconductor layer and in the opening. layer, wherein the transparent conductive layer on the P-type semiconductor layer is the first transparent conductive layer, and the transparent conductive layer on the N-type semiconductor layer exposed in the opening is the second transparent conductive layer; in the first The surface and sidewall of the transparent conductive layer and the second transparent conductive layer form a silver-containing metal reflective layer, wherein the metal reflective layer positioned on the first transparent conductive layer serves as the P electrode of the LED chip, and is positioned on the second transparent conductive layer. The metal reflective layer on the transparent conductive layer serves as the N electrode of the LED chip. The N electrode and the P electrode of the present invention can be formed in the same process step, which simplifies the process steps compared to the prior art of forming two types of electrodes respectively; There is a transparent conductive layer between the electrode and the N-type semiconductor layer, and the work function of the transparent conductive layer is greater than the P-type semiconductor layer and the N-type semiconductor layer and smaller than the metal reflective layer, that is, the transparent conductive layer The work function of the layer is between the P, N-type semiconductor layer and the metal reflective layer, which helps to reduce the barrier height between the P, N-type semiconductor layer and the metal reflective layer, and then helps to reduce the P, N The ohmic contact between the type semiconductor layer and the metal reflective layer is conducive to improving the working performance of the LED chip, for example, reducing the working voltage of the LED chip. In addition, the transparent conductive layer generally has a relatively small resistance, which can help the current of the LED chip to spread on the transparent conductive layer to achieve the purpose of current expansion, prevent the occurrence of current congestion, and increase the quantum efficiency. , which is conducive to improving the working performance of the LED chip. In addition, since the transparent conductive layer has conductivity, it will not affect the electrical connection between the P electrode and the P-type semiconductor layer, or between the N electrode and the N-type semiconductor layer; and the transparent conductive layer has light transmittance. Therefore, the light generated by the chip can pass through the transparent conductive layer to the metal reflective layer, and then pass through the substrate after being reflected by the metal reflective layer, which is beneficial to increase the luminous efficiency of the LED chip.

Description of drawings

1 to 11 are structural schematic diagrams of various steps in an embodiment of the manufacturing method of the LED chip of the present invention.

Detailed ways

In the prior art, in order to increase the efficiency of the flip-chip LED chip, some materials with high reflectivity are used as electrodes of the LED chip. However, changing the electrode material of the LED chip will affect other properties of the LED chip, for example, increase the contact resistance between the material layers inside the LED chip, and thus increase the overall operating voltage of the LED chip. For this reason, in the prior art, generally only one type of electrode (for example, only the P electrode) uses the above-mentioned material with high reflectivity, and the other type of electrode still chooses ordinary materials. However, this is not conducive to increasing the reflectivity of the electrodes, which in turn is not conducive to increasing the efficiency of the LED chip; in addition, this method needs to form two types of electrodes separately, which also increases the difficulty and cumbersomeness of manufacturing.

For this reason, the present invention provides a kind of LED chip and manufacturing method thereof, wherein the manufacturing method of LED chip comprises the following steps:

A substrate is provided; an N-type semiconductor layer, an active layer, and a P-type semiconductor layer are sequentially formed on the substrate; an opening exposing a part of the N-type semiconductor layer is formed in the P-type semiconductor layer and the active layer; A transparent conductive layer with a work function greater than that of the P-type semiconductor layer and the N-type semiconductor layer is formed on the P-type semiconductor layer and in the opening, wherein the transparent conductive layer located on the P-type semiconductor layer is the first transparent conductive layer, located at The transparent conductive layer on the N-type semiconductor layer exposed in the opening is the second transparent conductive layer, and there is no contact between the first transparent conductive layer and the second transparent conductive layer; between the first transparent conductive layer and the second transparent conductive layer The surfaces and side walls of the two transparent conductive layers form a silver-containing metal reflective layer whose work function is greater than that of the transparent conductive layer, wherein the metal reflective layer positioned on the first transparent conductive layer serves as the P electrode of the LED chip, The metal reflective layer on the second transparent conductive layer is used as the N electrode of the LED chip, and the P electrode and the N electrode are not in contact with each other.

Through the above steps, before forming the P electrode and the N electrode of the LED chip, a transparent conductive layer (the first transparent conductive layer and the second transparent conductive layer) is formed on the P-type semiconductor layer and the N-type semiconductor layer, so that the subsequently formed P The electrodes and the N electrodes are formed on the first transparent conductive layer and the second transparent conductive layer. The N electrode and the P electrode of the present invention can be formed in the same process step, which simplifies the process step; the work function of the transparent conductive layer is between the P, N type semiconductor layer and the metal reflective layer, which is beneficial to reduce the The barrier height between the P, N-type semiconductor layer and the metal reflective layer is conducive to reducing the ohmic contact between the P, N-type semiconductor layer and the metal reflective layer, which can improve the performance of the LED chip, for example, reduce The operating voltage of the small LED chip. In addition, the transparent conductive layer generally has a relatively small resistance, thereby helping the current of the LED chip to spread on the transparent conductive layer to achieve the purpose of current expansion, prevent the occurrence of current congestion, and increase the quantum efficiency. This is beneficial to improve the working performance of the LED chip. In addition, the transparent conductive layer will not affect the electrical connection between the P electrode and the P-type semiconductor layer, and between the N electrode and the N-type semiconductor layer, and can allow the light generated by the chip to pass through the transparent conductive layer until the metal reflective layer , and then pass through the substrate after being reflected by the metal reflective layer, which is beneficial to increase the luminous efficiency of the LED chip.

In order to make the above objects, features and advantages of the present invention more comprehensible, specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

Please refer to FIG. 1 to FIG. 11 , which are structural schematic diagrams of each step of the manufacturing method of the LED chip of the present invention.

First, referring to FIG. 1 , a substrate 100 is provided; the substrate 100 in this embodiment is a sapphire (Al ₂ O ₃ ) substrate. However, the present invention does not limit the material of the substrate 100 , and the material may also be other substrates such as spinel (MgAl ₂ O ₄ ), SiC, ZnS, ZnO or GaAs.

An N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially formed on the substrate 100 . Specifically, in this embodiment, the N-type semiconductor layer is an N-type gallium nitride layer 110, the active layer is a multi-quantum well layer 120 (MQW), and the P-type semiconductor layer is a P-type gallium nitride layer. gallium layer 130 . The N-type gallium nitride layer 110, the multi-quantum well layer 120 and the P-type gallium nitride layer 130 can be sequentially formed on the substrate 100 through an epitaxial process, and the N-type gallium nitride layer 110, the multi-quantum well layer The well layer 120 and the P-type GaN layer 130 may be a single-layer or multi-layer structure.

For example, the P-type gallium nitride layer 130 may be composed of Mg-doped In-GaN, Mg-doped P-GaN, and Mg-doped Al-GaN sequentially formed on the multi-quantum well layer 120. The well layer 120 may be a quantum well structure formed by alternately stacking InGaN layers and GaN layers, and the N-type gallium nitride layer 110 may be formed by Si-doped GaN layers.

However, it should be noted that the materials and structures of the N-type GaN layer 110 , the multi-quantum well layer 120 and the P-type GaN layer 130 are just examples, and the present invention does not make any limitation thereto.

Please continue to refer to FIG. 2 , an opening 131 exposing part of the N-type GaN layer 110 is formed in the P-type GaN layer 130 and the multi-quantum well layer 120 , so as to form a Mesa mesa for manufacturing LED chips. Forming a Mesa table is a common technique in the art, so the present invention is not limited to this step.

In this embodiment, the opening 131 may be formed by removing part of the P-type gallium nitride layer material and the multi-quantum well layer material by means of plasma etching. This etching method has strong anisotropy, and the edges of the formed opening 131 are relatively neat, so the size of the opening is easier to control.

Specifically, boron trichloride gas and chlorine gas can be used as the plasma etching gas, and argon gas can be used as the carrier gas of the etching gas.

However, it should be noted that the dry etching and the etching gas used in the dry etching are only an example of the present invention, and the present invention does not limit how to form the opening 131. Other etching methods such as wet etching etc. can also be used to form the opening 131 .

After that, referring to FIG. 3 , a transparent conductive layer 140 with a work function greater than that of the P-type GaN layer 130 and the N-type GaN layer 110 is formed on the P-type GaN layer 130 and in the opening 131 , wherein the transparent conductive layer located on the P-type gallium nitride layer 130 is the first transparent conductive layer 140a, and the transparent conductive layer located on the N-type gallium nitride layer 110 exposed in the opening 131 is the second transparent conductive layer Conductive layer 140b.

The present invention aims to make the work function of the formed transparent conductive layer 140 larger than that of the P-type gallium nitride layer 130 and the N-type gallium nitride layer 110, and smaller than that of the metal reflective layer formed subsequently, that is to say, to make the transparent conductive layer The work function of 140 is between the P and N-type gallium nitride layers 130, 110 and the metal reflective layer, which is beneficial to reduce the gap between the N-type gallium nitride layer 110, the P-type gallium nitride layer 130 and the metal reflective layer. The height of the potential barrier between them is beneficial to reduce the ohmic contact between the N-type GaN layer 110, the P-type GaN layer 130 and the metal reflective layer, which can improve the performance of the LED chip, for example, reduce the size of the LED The operating voltage of the chip.

In addition, the transparent conductive layer 140 generally has a relatively small resistance, thereby helping the current of the LED chip to spread on the transparent conductive layer 140, which is beneficial to achieve the purpose of current expansion, thereby preventing the phenomenon of current congestion. Occurs and increases the quantum efficiency, which is further conducive to improving the working performance of the LED chip.

In addition, the transparent conductive layer 140 will not affect the electrical connection between the P electrode and the P-type gallium nitride layer 130, and between the N electrode and the N-type gallium nitride layer 110, and can allow the light generated by the chip to pass through the The transparent conductive layer 140 reaches the metal reflective layer, and then passes through the substrate 100 after being reflected by the metal reflective layer, which is beneficial to increase the luminous efficiency of the LED chip.

There is no contact between the first transparent conductive layer 140a and the second transparent conductive layer 140b, so as to prevent a short circuit after the subsequent formation of the N electrode and the P electrode.

Specifically, in this embodiment, a mask plate with a pattern can be formed on the P-type gallium nitride layer 130 to control the pattern of the formed transparent conductive layer 140, and the pattern of the mask plate will be required to form the transparent conductive layer 140 is exposed, so that the part that does not need to form the transparent conductive layer 140 is covered by the mask.

Specifically, in this embodiment, the area of the first transparent conductive layer 140a located on the surface of the P-type GaN layer 130 can be made slightly smaller than the area of the P-type GaN layer 130, so that the area around the opening 131 Part of the P-type GaN layer 130 is exposed. At the same time, the second transparent conductive layer 140b only covers part of the bottom surface of the opening 131 without contacting the sidewall of the opening 131, that is, there is a first gap 1401 between the second transparent conductive layers 140b, so that the first , The second transparent conductive layers 140a, 140b are not in contact with each other.

In this embodiment, the transparent conductive layer 140 of indium tin oxide (ITO) material can be formed, and the transparent conductive layer 140 of this material has a relatively high light transmittance, that is to say, its transmittance in the visible light band is relatively high , so it can basically not block the light emitted by the quantum well and reduce the loss of light.

Moreover, the P-type GaN layer 130 in this embodiment includes an In-GaN layer doped with Mg, that is to say, the transparent conductive layer 140 made of indium tin oxide and the P-type GaN layer 130 both have In components, so it is further beneficial for the interpenetration between the transparent conductive layer 140 of indium tin oxide and the P-type gallium nitride layer 130, which is conducive to reducing the resistivity of the transparent conductive layer 140, and further helps the LED chip work. The current diffuses on the transparent conductive layer 140 to achieve the purpose of current expansion, prevent the occurrence of current congestion, and increase the quantum efficiency, which is further conducive to improving the working performance of the LED chip.

In addition, the work function of the indium tin oxide material is generally between the P and N-type GaN layers 130, 110 and the metal reflective layer formed subsequently, so that the above-mentioned reduction in P and N-type GaN can be achieved. The purpose of the barrier height between layers 130, 110 and the metal reflective layer.

However, it should be noted that those skilled in the art should understand that the specific work function of the transparent conductive layer 140 can be adjusted by adjusting the process parameters during its formation. The present invention aims to make the work function of the formed transparent conductive layer 140 between N between the P-type gallium nitride layer 110 and the subsequently formed metal reflective layer (or between the P-type gallium nitride layer 130 and the subsequently formed metal reflective layer), so its specific work function should be adjusted according to the actual situation, the present invention There is no limit to this.

However, the present invention does not limit whether it is necessary to form the transparent conductive layer 140 of indium tin oxide material. In other embodiments of the present invention, other transparent and conductive materials can also be used, such as zinc oxide, zinc oxide and indium tin oxide. Having a similar work function is also conducive to reducing the barrier height between the N-type GaN layer 110, the P-type GaN layer 130 and the metal reflective layer, reducing the N-type GaN layer 110, the P-type GaN layer The ohmic contact between the gallium layer 130 and the metal reflective layer improves the working performance of the LED chip and reduces the working voltage of the LED chip.

In this embodiment, the transparent conductive layer 140 may be formed with a thickness ranging from 50 to 3000 angstroms. The transparent conductive layer 140 within this thickness range will not be too thin to reduce the conductivity (that is, increase the resistance), and it will not be too thick to absorb too much light, resulting in a decrease in light transmittance.

In this embodiment, the transparent conductive layer 140 can be formed by magnetron sputtering (Sputter), and the transparent conductive layer 140 formed in this way has better conformal coverage, that is to say, it can better covering the inner wall of the opening 131 . However, the present invention does not limit its formation method, and other formation processes such as reactive plasma deposition (Reactive Plasma Deposition, RPD) and other methods can also be used to form the transparent conductive layer 140 .

Please refer to FIG. 4 , a silver-containing metal reflective layer 150 whose work function is greater than that of the transparent conductive layer 140 is formed on the surface and sidewalls of the first transparent conductive layer 140a and the second transparent conductive layer 140b, wherein, in the The metal reflective layer 150 on the first transparent conductive layer 140a serves as the P electrode 150a of the LED chip, and the metal reflective layer 150 on the second transparent conductive layer 140b serves as the N electrode 150b of the LED chip.

Specifically, since there is a first gap 1401 between the second transparent conductive layers 140b in this embodiment, in this embodiment, the metal reflective layer 150 corresponding to the second transparent conductive layer 140b (that is, the N electrode 150b) is formed on the surface and sidewall of the second transparent conductive layer 140b, and there is a second gap 1402 between the sidewall of the metal reflective layer 150 and the sidewall of the opening 131 . The formation of the second gap 1402 is beneficial to separate the N electrode 150b from the P electrode 150a as much as possible, thereby reducing the risk of electric leakage.

There is no contact between the P electrode 150a and the N electrode 150b to prevent a short circuit between the P electrode 150a and the N electrode 150b.

As mentioned above, the first transparent conductive layer 140a and the second transparent conductive layer 140b are separated between the metal reflective layer 150 and the P and N type gallium nitride layers 130 and 110, so the metal reflective layer 150 and the P and N type GaN layers The work function difference between the gallium nitride layers 130 and 110 can be reduced, so that the ohmic contact resistance between the metal reflective layer 150 and the P and N-type gallium nitride layers 130 and 110 is small, which is beneficial to reduce the LED chip working voltage.

In addition, the silver-containing metal reflective layer 150 has a higher light reflectivity, so that more light emitted by the multi-quantum well layer 120 can be reflected to the substrate 100 and transmitted from the substrate 100, which is further effective. It is beneficial to increase the luminous efficiency of the LED chip.

Forming the metal reflective layer 150 on the surface and sidewalls of the first transparent conductive layer 140 a and the second transparent conductive layer 140 b is beneficial to comprehensively reflect light passing through the transparent conductive layer 140 .

Specifically, the metal reflective layer 150 may be formed in a single layer or in a stacked structure.

In this embodiment, a metal reflective layer 150 with a laminated structure can be formed. For example, a silver layer and a titanium tungsten layer can be sequentially formed on the transparent conductive layer 140, and the silver layer and the titanium tungsten layer together constitute the The metal reflective layer 150 of the above-mentioned stacked structure.

Specifically, the thickness of the silver layer can be in the range of 750-3000 angstroms, and the thickness of the tungsten titanium can be in the range of 100-1000 angstroms. Within this thickness range, the metal reflective layer 150 formed will not be too thin to reduce the reflectivity, and at the same time, the metal reflective layer 150 will not be too thick to affect the structure of the entire LED chip. However, those skilled in the art should understand that this numerical range is only an example, and in actual operation, the thicknesses of the various material layers constituting the metal reflective layer 150 should be adjusted according to actual conditions.

In addition, the present invention does not limit whether the metal reflective layer 150 of the laminated structure must be a silver layer or a titanium tungsten layer. In other embodiments of the present invention, silver can also be sequentially formed on the transparent conductive layer 140. layer, a titanium tungsten layer and a platinum layer, and the silver layer, the titanium tungsten layer and the platinum layer together constitute the reflective layer of the laminated structure. Wherein, the thickness of the silver layer is in the range of 750-3000 angstroms, the thickness of the tungsten titanium is in the range of 100-1000 angstroms, and the thickness of the platinum layer can be in the range of 100-1000 angstroms. Similarly, the above thickness parameter is only an example, and the present invention does not make any limitation on the thickness of the metal reflective layer 150 and the thickness of each material layer in the metal reflective layer 150 of the laminated structure.

Please refer to FIG. 5, in this embodiment, after the step of forming the metal reflective layer 150, the following steps are further included:

A conductive protective layer 160 is formed on the surface of the metal reflective layer 150 . The conductive protection layer 160 is used to protect the formed metal reflective layer 150 . In the subsequent step of manufacturing the leads of the LED chip, the leads will be formed on the surface of the conductive protection layer 160 . Since the conductive protection layer 160 has conductivity, it will not affect the electrical connection between the leads and the N and P electrodes 150b and 150a.

Specifically, the conductive protection layer 160 in this embodiment is formed on the surface and sidewall of the P electrode 150a, and is formed on the surface of the N electrode 150b. Wherein, in order to avoid bridging between the conductive protective layer 160 formed on the P electrode 150a and the conductive protective layer 160 formed on the N electrode 150b, in this embodiment, the conductive protective layer 160 formed on the surface of the N electrode 150b There is a third gap 1403 between it and the sidewall of the opening 131 .

In this embodiment, the conductive protective layer 160 is a laminated structure, specifically, the material of the conductive protective layer 160 of the laminated structure may be one or more combinations of chromium, platinum, titanium, gold, nickel .

For example, a chromium layer, a platinum layer, a titanium layer, a gold layer, and a nickel layer can be sequentially formed to form the conductive protection layer 160, wherein the platinum layer and the titanium layer have relatively stable chemical properties and mainly serve to protect the P electrode 150a and the N electrode. The role of 150b; the chromium layer mainly plays an adhesion role, that is to say, it is used to increase the adhesion between the P electrode 150a, the N electrode 150b and the conductive protective layer 160; the gold layer and the nickel layer play a role in protecting the conductive protective layer 160 The role of other material layers in the

In this embodiment, the thickness of the chromium layer is in the range of 20-500 angstroms, the thickness of the platinum layer is in the range of 200-1000 angstroms; the thickness of the titanium layer is in the range of 200-1000 angstroms ; The thickness of the gold layer is in the range of 2000-5000 angstroms, and the thickness of the nickel layer is in the range of 200-2000 angstroms. These material layers are within their respective thickness parameter ranges, which are beneficial to protect enough while not being too thick to affect the volume of the LED chip.

In this embodiment, when forming the conductive protective layer 160 of the laminated structure, the nickel layer may be formed last, that is, the nickel layer is located at the outermost layer of the conductive protective layer 160 of the entire laminated structure. The advantage of this is that the material properties of nickel are relatively stable and are not easily corroded. Using nickel as the surface layer of the conductive protective layer 160 in a laminated structure is beneficial to make the conductive protective layer 160 less likely to be affected by other subsequent steps.

However, the present invention does not limit whether the conductive protective layer 160 must be a multilayer structure. In other embodiments of the present invention, it can also be a single-layer structure. Specifically, the material of the conductive protective layer 160 can be in the thickness range Tungsten titanium in the range of 200 to 5000 Angstroms. Based on the same reason, within this thickness range, it is beneficial to have sufficient protection while not being too thick to affect the volume of the LED chip.

In addition, in this embodiment, the conductive protective layer 160 may be formed by magnetron sputtering deposition or chemical vapor deposition. However, the present invention does not limit how to form the conductive protection layer 160 .

Please continue to refer to FIG. 6. In this embodiment, after the step of forming the conductive protection layer 160, the following steps are further included:

An insulating dielectric layer 170 for insulating protection is formed on the conductive protection layer 160 .

In this embodiment, the insulating dielectric layer 170 may be an insulating dielectric layer 170 made of SiO 2 , SiN or SiON. These materials are relatively easy to obtain insulating dielectric materials in the production process.

In this embodiment, the insulating dielectric layer 170 may be formed by means of plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD). This method is easier to control and has better coverage. However, the present invention does not limit how to form the insulating dielectric layer 170 .

In this embodiment, the insulating dielectric layer 170 can be formed with a thickness ranging from 5000 to 20000 angstroms. The insulating dielectric layer 170 within this thickness range will not be too thin to have the effect of an insulating dielectric, and will not be too thick to affect The volume of the entire LED chip. However, the above-mentioned thickness range is only an example, and the present invention does not make any limitation thereto.

After that, the insulating dielectric layer 170 is etched to form holes 171, 172 exposing part of the conductive protection layer 160, wherein the position of the hole 171 corresponds to the P electrode 150a, and the position of the hole 172 corresponds to the N electrode 150b in the opening 131 , metal leads will be formed in the holes 171, 172 in subsequent steps.

In this embodiment, a BOE etching process (buffer oxide etch) may be used to form the holes 171 and 172 exposing part of the conductive protection layer 160 . As mentioned above, since the surface of the part of the conductive protection layer 160 is a nickel layer, the conductive protection layer 160 is not easily affected by the BOE etching in this step.

Please continue to refer to FIG. 7 together with reference to FIG. 8 . FIG. 8 is a top view of the structure shown in FIG. 7 . A metal layer 180 is formed on the insulating medium layer 170 and in the holes 171, 172, wherein the parts of the metal layer 180 located in the holes 171, 172 are metal conductive pillars 181, 182 (only metal columns 181, 182 are shown in FIG. layer 180 located in the part 171, 172), and the part of the metal layer 180 located on the surface of the insulating dielectric layer 170 includes patterns 183, 184 (please refer to FIG. 8), wherein the pattern 183 corresponds to the metal conductive pillar 181 for passing The metal conductive pillars 181 lead out the P electrodes; similarly, the pattern 184 corresponds to the metal conductive pillars 182 and is used to lead out the N electrodes 150 through the metal conductive pillars 182 .

However, it should be noted that the pattern of the metal layer 180 in FIG. 8 is only an example, and the present invention does not make any limitation on what kind of pattern the metal layer 180 forms.

As mentioned above, both the conductive protection layer 160 and the metal reflective layer 150 have conductivity, so even if the metal layer 180 does not directly contact the N, P electrodes 150b, 150a, it will not affect the connection between the lead wire and the N, P electrodes 150b, 150a. electrical connection between.

In this embodiment, the metal layer 180 may be a combination of one or more of chromium, aluminum, titanium, platinum, gold, and nickel. Wherein, the thickness of chromium is in the range of 20-50 angstroms, the thickness of aluminum is in the range of 750-3000 angstroms, the thickness of titanium is in the range of 200-1000 angstroms, and the thickness of platinum is in the range of 200-1000 angstroms; The thickness of gold is in the range of 2000-5000 angstroms; the thickness of nickel is in the range of 200-1000 angstroms.

After that, please refer to FIG. 9 , a passivation layer 190 is formed on the insulating dielectric layer 170 and the metal layer 180 , and the passivation layer 190 is used to insulate and isolate the patterns 183 and 184 of the metal layer 180 on the surface of the 170 .

In this embodiment, the passivation layer 190 may use SiO ₂ , SiN or SiON as a material.

In this embodiment, the passivation layer 190 can be formed with a thickness ranging from 5000 to 20000 angstroms, but the above-mentioned thickness range is only an example, and the present invention does not make any limitation thereto.

After that, referring to FIG. 10 , the passivation layer 190 is etched to expose the metal conductive pillars 181 , 182 , so as to subsequently lead out the P electrodes 150 a , N electrodes 150 b connected to the metal conductive pillars 181 , 182 .

Please refer to FIG. 11 to form lead-out electrodes 210, 220 respectively corresponding to the metal conductive pillars 181, 182. Since the metal conductive pillar 181 is electrically connected to the P electrode 150a, the lead-out electrodes 210 are used to The lead-out of the P-electrode 150a is carried out for subsequent steps such as packaging; similarly, the metal conductive pillar 182 is electrically connected to the N-electrode 150b, and thus is used as the lead-out electrode 220 for leading out the N-electrode 150b.

There should be a distance between the extraction electrodes 210 and 220 to prevent short circuit. In this embodiment, the distance d should not be less than 100 microns.

In this embodiment, one or more of chromium, aluminum, titanium, platinum, gold or tin can be used as the material of the extraction electrodes 210 and 220 .

Specifically, in this embodiment, the thickness of chromium can be in the range of 20-50 angstroms, the thickness of aluminum can be in the range of 750-3000 angstroms, the thickness of titanium can be in the range of 200-1000 angstroms, and the thickness of platinum can be In the range of 200-1000 angstroms; the thickness of gold is in the range of 2000-5000 angstroms; the thickness of tin is in the range of 200-1000 angstroms.

In addition, referring to FIG. 11, the present invention also provides an LED chip, which is characterized in that it includes:

Substrate 100; the substrate 100 in this embodiment is a sapphire (Al ₂ O ₃ ) substrate. However, the present invention does not limit the material of the substrate 100 , and the material may also be other substrates such as spinel (MgAl ₂ O ₄ ), SiC, ZnS, ZnO or GaAs.

forming an N-type gallium nitride layer 110 on the substrate 100;

a multi-quantum well layer 120 located on the N-type gallium nitride layer 110;

The P-type gallium nitride layer 130 located on the multiple quantum well layer 120, in this embodiment, the P-type gallium nitride layer 130 may be formed of Mg-doped In on the multiple quantum well layer 120 sequentially. -GaN, Mg-doped P-GaN and Mg-doped Al-GaN, the multi-quantum well layer 120 may be a quantum well structure formed by alternating stacking of InGaN layers and GaN layers, and the N-type gallium nitride layer 110 It may be composed of a Si-doped GaN layer.

An opening 131 exposing the N-type gallium nitride layer 110 is formed in the P-type gallium nitride layer 130 and the multiple quantum well layer 120; the opening 131 is used to form a Mesa mesa for making an LED chip;

The transparent conductive layer 140 includes a first transparent conductive layer 140a located on the P-type gallium nitride layer 130 and a second transparent conductive layer 140b located in the opening 131, the first transparent conductive layer 140a and the second transparent conductive layer There is no contact between the layers 140b; the work function of the transparent conductive layer 140 is greater than the work function of the transparent conductive layers of the P-type GaN layer 130 and the N-type GaN layer 110 .

The work function of the transparent conductive layer 140 is greater than the P-type gallium nitride layer 130 and the N-type gallium nitride layer 110, and smaller than the metal reflective layer 150, that is, the work function of the transparent conductive layer 140 is between between the P and N-type gallium nitride layers 130, 110 and the metal reflective layer 150, which is conducive to reducing the barrier height between the N-type gallium nitride layer 110, the P-type gallium nitride layer and the metal reflective layer 150 , which in turn helps to reduce the ohmic contact between the N-type GaN layer 110, the P-type GaN layer and the metal reflective layer 150, which can improve the working performance of the LED chip, for example, reduce the working voltage of the LED chip.

In addition, the transparent conductive layer 140 generally has a relatively small resistance, thereby helping the current of the LED chip to spread on the transparent conductive layer 140 to achieve the purpose of current expansion, prevent the occurrence of current congestion, and increase the quantum Efficiency, which is further conducive to improving the performance of the LED chip. In addition, the transparent conductive layer 140 will not affect the electrical connection between the P electrode 150a and the P-type GaN layer 130, and between the N-electrode 150b and the N-type GaN layer 110, and can transmit the light generated by the chip. The transparent conductive layer 140 extends to the metal reflective layer 150 , and then passes through the substrate 100 after being reflected by the metal reflective layer 150 , which is beneficial to increase the luminous efficiency of the LED chip.

There is no contact between the first transparent conductive layer 140a and the second transparent conductive layer 140b, so as to prevent a short circuit between the N electrode 150b and the P electrode 150a.

Specifically, in this embodiment, the area of the first transparent conductive layer 140a located on the surface of the P-type GaN layer 130 is slightly smaller than the area of the P-type GaN layer 130, so that the part of the P-type layer located around the opening 131 The GaN layer 130 can be exposed. Meanwhile, the second transparent conductive layer 140b only covers the inner wall of the opening 131 and does not exceed the edge of the opening 131, so that the first and second transparent conductive layers 140a, 140b are not in contact with each other.

In this embodiment, the material of the transparent conductive layer 140 is indium tin oxide (ITO), and the transparent conductive layer 140 of this material has a relatively high light transmittance, that is to say, its transmittance in the visible light band is relatively high, Therefore, the light emitted by the quantum well can be basically not blocked, and the loss of light can be reduced; and, the P-type gallium nitride layer 130 in this embodiment includes a Mg-doped In-GaN layer, which also has an In composition, so it is compatible with indium oxide The transparent conductive layers 140 of tin can penetrate each other, which is beneficial to reduce the resistivity of the transparent conductive layer 140, and then help the current of the LED chip to spread on the transparent conductive layer 140 when the LED chip is working, so as to achieve the purpose of current expansion and prevent current The occurrence of the congestion phenomenon increases the quantum efficiency, which is further conducive to improving the working performance of the LED chip. In addition, the work function of this material is generally between the P and N-type gallium nitride layers 130, 110 and the metal reflective layer 150, so that the above-mentioned reduction in the P and N-type gallium nitride layers 130, 110 and the metal reflective layer 150 for the purpose of the barrier height.

In addition, those skilled in the art should understand that the specific work function of the transparent conductive layer 140 can be adjusted by adjusting the process parameters during its formation. between the gallium layer 110 and the metal reflective layer 150 (or between the p-type gallium nitride layer 130 and the metal reflective layer 150 ), so its specific work function should be adjusted according to the actual situation, which is not limited in the present invention.

However, the present invention does not limit whether it is necessary to form the transparent conductive layer 140 of indium tin oxide material. In other embodiments of the present invention, other transparent and conductive materials can also be used, such as zinc oxide, zinc oxide and indium tin oxide. have similar work functions.

In this implementation, the thickness of the transparent conductive layer 140 is within a range of 50-3000 angstroms. The transparent conductive layer 140 within this thickness range will not be too thin to reduce the conductivity (that is, cause the resistance to increase), and not to be too thick to cause too much absorption of light, resulting in a decrease in light transmittance.

The LED chip of the present invention also includes a silver-containing metal reflective layer 150 located on the surface and sidewalls of the first transparent conductive layer 140a and the second transparent conductive layer 140b, wherein the metal reflective layer 150 located on the first transparent conductive layer 140a is a P electrode 150a, the metal reflective layer 150 on the second transparent conductive layer 140b is an N electrode 150b, there is no contact between the P electrode 150a and the N electrode 150b, and the work function of the metal reflective layer is greater than the Work function of the transparent conductive layer 140 .

As mentioned above, the first transparent conductive layer 140a and the second transparent conductive layer 140b are separated between the metal reflective layer 150 and the P and N type gallium nitride layers 130 and 110, so the metal reflective layer 150 and the P and N type GaN layers The work function difference between the gallium nitride layers 130 and 110 can be reduced, so that the ohmic contact resistance between the metal reflective layer 150 and the P and N-type gallium nitride layers 130 and 110 is small, which is beneficial to reduce the LED chip working voltage.

In addition, the silver-containing metal reflective layer 150 has a higher light reflectivity, so that more light emitted by the multi-quantum well layer 120 can be reflected to the substrate 100 and transmitted from the substrate 100, which is further effective. It is beneficial to increase the luminous efficiency of the LED chip.

The metal reflective layer 150 is formed on the surface and sidewalls of the first transparent conductive layer 140 a and the second transparent conductive layer 140 b, which is beneficial to receive light passing through the transparent conductive layer 140 more comprehensively.

There is no contact between the P electrode 150a and the N electrode 150b to prevent a short circuit between the P electrode 150a and the N electrode 150b.

Specifically, the metal reflective layer 150 may be a single layer or a stacked structure.

In this embodiment, the metal reflective layer 150 can be a laminated structure, for example, the metal reflective layer 150 can include a silver layer on the transparent conductive layer 140 and a titanium tungsten layer on the silver layer, the silver layer and the titanium tungsten layer layers together constitute the metal reflective layer 150 of the stacked structure.

Specifically, the thickness of the silver layer is in the range of 750-3000 angstroms, and the thickness of the tungsten titanium is in the range of 100-1000 angstroms. Within this thickness range, the metal reflective layer 150 formed will not be too thin to reduce the reflectivity, and at the same time, the metal reflective layer 150 will not be too thick to affect the structure of the entire LED chip. However, those skilled in the art should understand that this numerical range is only an example, and in actual operation, the thicknesses of the various material layers constituting the metal reflective layer 150 should be adjusted according to actual conditions.

In addition, the present invention does not limit whether the metal reflective layer 150 of the laminated structure must be a silver layer or a titanium tungsten layer. In other embodiments of the present invention, it may also include silver on the transparent conductive layer 140. layer, the titanium tungsten layer on the silver layer, and the platinum layer on the titanium tungsten layer, the silver layer, the titanium tungsten layer and the platinum layer together constitute the reflective layer of the laminated structure. Wherein, the thickness of the silver layer is in the range of 750-3000 angstroms, the thickness of the tungsten titanium is in the range of 100-1000 angstroms, and the thickness of the platinum layer can be in the range of 100-1000 angstroms.

In this embodiment, a conductive protective layer 160 is further provided on the surface of the metal reflective layer 150 . The conductive protection layer 160 is used to protect the formed metal reflective layer 150 .

Specifically, the conductive protection layer 160 in this embodiment is formed on the surface and sidewall of the P electrode 150a, and is formed on the surface of the N electrode 150b.

In this embodiment, the conductive protective layer 160 is a laminated structure, specifically, the material of the conductive protective layer 160 of the laminated structure may be one or more combinations of chromium, platinum, titanium, gold, nickel .

For example, the conductive protective layer 160 may include a chromium layer formed on the metal reflective layer 150, a platinum layer on the chromium layer, a titanium layer on the platinum layer, a gold layer on the titanium layer, and a gold layer on the gold layer. The nickel layer, wherein the platinum layer and the titanium layer have relatively stable chemical properties, mainly play the role of protecting the P electrode 150a and the N electrode 150b; Adhesion between 150b and the conductive protection layer 160; the gold layer and the nickel layer play a role in protecting other material layers in the conductive protection layer 160.

In this embodiment, the thickness of the chromium layer is in the range of 20-500 angstroms, the thickness of the platinum layer is in the range of 200-1000 angstroms; the thickness of the titanium layer is in the range of 200-1000 angstroms ; The thickness of the gold layer is in the range of 2000-5000 angstroms, and the thickness of the nickel layer is in the range of 200-2000 angstroms. The respective thickness ranges of these materials are conducive to sufficient protection while not being too thick to affect the volume of the LED chip.

In this embodiment, in the conductive protection layer 160 of the entire laminated structure, the nickel layer is located on the outermost layer. The advantage of this is that the nickel material is relatively stable and not easy to be corroded. Using nickel as the surface layer of the conductive protection layer 160 in a stacked structure is beneficial to make the conductive protection layer 160 not easily affected by other steps.

However, the present invention does not limit whether the conductive protective layer 160 must be a multilayer structure. In other embodiments of the present invention, it can also be a single-layer structure. Specifically, the material of the conductive protective layer 160 can be in the thickness range Tungsten titanium in the range of 200 to 5000 Angstroms. The thickness within this range is conducive to sufficient protection while not being too thick to affect the volume of the LED chip.

In this embodiment, an insulating dielectric layer 170 is further provided on the conductive protection layer 160, and the insulating dielectric layer 170 is used to insulate and protect the formed components.

In this embodiment, the insulating dielectric layer 170 may be an insulating dielectric layer 170 made of SiO 2 , SiN or SiON. These materials are relatively easy to obtain insulating dielectric materials.

Specifically, in this embodiment, the thickness of the insulating dielectric layer 170 is in the range of 5,000 to 20,000 angstroms, and the insulating dielectric layer 170 within this thickness range will not be too thin to have an insulating effect, and will not be too thick to Affect the volume of the entire LED chip. However, the above-mentioned thickness range is only an example, and the present invention does not make any limitation thereto.

In this embodiment, a metal layer 180 is also formed in the insulating dielectric layer 170 and on its surface, wherein the parts of the metal layer 180 located in the insulating dielectric layer 170 are metal conductive pillars 181 and 182, and the positions of the metal conductive pillars 181 correspond to On the P electrode 150a, and in contact with the conductive protective layer 160 above the P electrode 150a, for drawing the P electrode 150a; the position of the metal conductive column 182 corresponds to the N electrode 150b, and is connected to the conductive protective layer above the N electrode 150b 160 contacts for leading out the N electrode 150b.

The part of the metal layer 180 located on the surface of the insulating medium layer 170 includes patterns 183 and 184 (please refer to FIG. 8 ), wherein the pattern 183 corresponds to the metal conductive pillar 181, and is used to lead the P electrode 150a out through the metal conductive pillar 181. Similarly, the pattern 184 corresponds to the metal conductive pillar 182, and is used to lead out the N electrode 150b through the metal conductive pillar 182.

In this embodiment, the metal layer 180 may be composed of one or more of chromium, aluminum, titanium, platinum, gold, and nickel. Wherein, the thickness of chromium is in the range of 20-50 angstroms, the thickness of aluminum is in the range of 750-3000 angstroms, the thickness of titanium is in the range of 200-1000 angstroms, and the thickness of platinum is in the range of 200-1000 angstroms; The thickness of gold is in the range of 2000-5000 angstroms; the thickness of nickel is in the range of 200-1000 angstroms.

In this embodiment, a passivation layer 190 is further formed on the metal layer 180 , and the passivation layer 190 is used to isolate the patterns 183 and 184 of the metal layer 180 on the surface of the metal layer 170 from each other.

In this embodiment, the passivation layer 190 may use SiO ₂ , SiN or SiON as a material.

In this embodiment, the thickness range of the passivation layer 190 is within 5000˜20000 angstroms, but the above thickness range is only an example, and the present invention does not make any limitation thereto.

The passivation layer 190 has a pattern to expose the metal conductive pillars 181 , 182 .

In this embodiment, the lead-out electrodes 210, 220 corresponding to the metal conductive pillars 181, 182 are formed on the passivation layer 190. Since the metal conductive pillars 181 are electrically connected to the P-electrode 150a, the lead-out The electrode 210 is used to lead out the P electrode 150a for packaging; similarly, the metal conductive pillar 182 is electrically connected to the N electrode 150b, so it is used as the lead electrode 220 to lead out the N electrode 150b.

There should be a distance between the extraction electrodes 210 and 220 to prevent short circuit. In this embodiment, the distance d should not be less than 100 microns.

In this embodiment, the material of the extraction electrodes 210 and 220 may be one or more of chromium, aluminum, titanium, platinum, gold or tin. Specifically, the thickness of chromium is in the range of 20-50 angstroms, the thickness of aluminum is in the range of 750-3000 angstroms, the thickness of titanium is in the range of 200-1000 angstroms, and the thickness of platinum is in the range of 200-1000 angstroms ; The thickness of gold is in the range of 2000-5000 angstroms; the thickness of tin is in the range of 200-1000 angstroms.

In addition, it should be noted that the LED chip of the present invention can be obtained by, but not limited to, the above-mentioned manufacturing method.

Although the present invention is disclosed above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, so the protection scope of the present invention should be based on the scope defined in the claims.

Claims (19)

1. a kind of production method of LED chip, which is characterized in that including：

Substrate is provided；

N type semiconductor layer, active layer and p type semiconductor layer are sequentially formed over the substrate；

The opening of exposed portion n type semiconductor layer is formed in the p type semiconductor layer and active layer；

On the p type semiconductor layer and open bottom forms work function and is more than the p type semiconductor layer and N-type semiconductor The transparency conducting layer of layer is located at described wherein the transparency conducting layer on the p type semiconductor layer is the first transparency conducting layer The transparency conducting layer on n type semiconductor layer exposed in opening is the second transparency conducting layer, first transparency conducting layer and the It is not contacted between two transparency conducting layers；

The metallic reflector of argentiferous, institute are formed on the surface and side wall of first transparency conducting layer and the second transparency conducting layer The work function for stating the metallic reflector of argentiferous is more than the work function of the transparency conducting layer, wherein transparent is led positioned at described first P electrode of the metallic reflector as the LED chip in electric layer, the metallic reflector being located on second transparency conducting layer As the N electrode of the LED chip, do not contacted between the P electrode and N electrode.

2. production method as described in claim 1, which is characterized in that form opening in p type semiconductor layer and active layer Step includes：

Part P-type semiconductor layer material and active layer material are removed by the way of plasma etching, to form the opening.

3. production method as described in claim 1, which is characterized in that formed transparency conducting layer the step of include：Make close to institute The p type semiconductor layer for stating opening exposes from first transparency conducting layer, and makes to open described in the second transparency conducting layer covering The portion bottom surface of mouth has the first gap between second transparency conducting layer and the side wall of the opening；

Include in the step of surface of the second transparency conducting layer and side wall form metallic reflector：Metallic reflector is set to be formed in institute The second layer at transparent layer and side wall are stated, and has second between the side wall of the metallic reflector and the side wall of the opening Gap.

4. production method as described in claim 1, which is characterized in that form tin indium oxide or the transparent of zinc oxide material is led Electric layer.

5. production method as described in claim 1, which is characterized in that formed transparency conducting layer the step of include：Using magnetic control The mode of sputtering sedimentation or reaction and plasma deposition forms the transparency conducting layer.

6. production method as described in claim 1, which is characterized in that formed metallic reflector the step of include：Form single layer Or the metallic reflector of laminated construction.

7. production method as claimed in claim 6, which is characterized in that formed metallic reflector the step of include：Described Silver layer and titanizing tungsten layer are sequentially formed on bright conductive layer, the silver layer and titanizing tungsten layer collectively form the laminated construction Metallic reflector；

Alternatively, sequentially form silver layer, titanizing tungsten layer and platinum layer on the transparency conducting layer, the silver layer, titanizing tungsten layer with And platinum layer collectively forms the reflecting layer of the laminated construction.

8. production method as described in claim 1, which is characterized in that after the step of forming metallic reflector, form N electrode Or before the step of P electrode, the production method further includes：

Conductive protecting layer is formed in the metallic reflection layer surface.

9. production method as claimed in claim 8, which is characterized in that the material of the conductive protecting layer is titanizing tungsten, alternatively, For combination one or more in chromium, platinum, titanium, copper, nickel.

10. production method as claimed in claim 8, which is characterized in that formed conductive protecting layer the step of include：Form single layer Or the conductive protecting layer of laminated construction.

11. production method as claimed in claim 10, which is characterized in that formed conductive protecting layer the step of include：It is formed folded The conductive protecting layer of layer structure, and the surface of the conductive protecting layer of the laminated construction is made to be nickel layer.

12. production method as claimed in claim 8, which is characterized in that formed conductive protecting layer the step of include：Using magnetic control The mode of sputtering sedimentation or chemical vapor deposition forms the conductive protecting layer.

13. a kind of LED chip, which is characterized in that including：

Substrate；

N type semiconductor layer on the substrate；

Active layer on the n type semiconductor layer；

P type semiconductor layer on the active layer has dew in the p type semiconductor layer and active layer

Go out the opening of n type semiconductor layer；

Transparency conducting layer includes the first transparency conducting layer on p type semiconductor layer and positioned at the of the open bottom Two transparency conducting layers do not contact between first transparency conducting layer and the second transparency conducting layer；The work(of the transparency conducting layer Function is more than the work function of the transparency conducting layer of the p type semiconductor layer and n type semiconductor layer；

The metallic reflector of argentiferous is located at the first transparency conducting layer and the second layer at transparent layer and side wall, wherein Metallic reflector on first transparency conducting layer is P electrode, and the metal being located on second transparency conducting layer is anti- It is N electrode to penetrate layer, is not contacted between the P electrode and N electrode；The work function of the metallic reflector is more than the electrically conducting transparent The work function of layer.

14. LED chip as claimed in claim 13, which is characterized in that the material of the transparency conducting layer be tin indium oxide or Person's zinc oxide.

15. LED chip as claimed in claim 13, which is characterized in that the metallic reflector is single layer or laminated construction.

16. LED chip as claimed in claim 15, which is characterized in that the metallic reflector includes being located at described transparent lead Silver layer in electric layer and the titanizing tungsten layer on the silver layer；

Alternatively, the metallic reflector includes the silver layer being sequentially located on the transparency conducting layer, the titanium on the silver layer Change tungsten layer and the platinum layer on the titanizing tungsten layer.

17. LED chip as claimed in claim 13, which is characterized in that the LED chip further includes：It is anti-positioned at the metal Penetrate the conductive protecting layer of layer surface.

18. LED chip as claimed in claim 17, which is characterized in that the conductive protecting layer is single layer or laminated construction.

19. LED chip as claimed in claim 17, which is characterized in that the surface of the conductive protecting layer is nickel layer.