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CN106057677B - Method for manufacturing low temperature polysilicon thin film transistor - Google Patents

Method for manufacturing low temperature polysilicon thin film transistor Download PDF

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Publication number
CN106057677B
CN106057677B CN201610388354.7A CN201610388354A CN106057677B CN 106057677 B CN106057677 B CN 106057677B CN 201610388354 A CN201610388354 A CN 201610388354A CN 106057677 B CN106057677 B CN 106057677B
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temperature polysilicon
film transistor
silicon
thin film
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CN106057677A (en
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吴元均
连水池
周星宇
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739—Conductor-insulator-semiconductor electrodes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

本发明提供一种低温多晶硅薄膜晶体管的制作方法，通过将与栅极接触的氮化硅层氧化成氮氧化硅层，采用氮氧化硅与栅极接触，该氮氧化硅层相比于氮化硅层，不仅可以抵挡离子扩散，还具有高电性稳定度，能够有效抑制栅极绝缘层的载流子注入，提升栅极绝缘层的可靠性和低温多晶硅薄膜晶体管的稳定性，制作方法简单，不需要增加制程光罩数。

The present invention provides a method for manufacturing a low-temperature polysilicon thin film transistor. The silicon nitride layer in contact with the gate is oxidized into a silicon oxynitride layer, and silicon oxynitride is used to contact the gate. The silicon layer can not only resist ion diffusion, but also has high electrical stability, which can effectively suppress the carrier injection of the gate insulating layer, improve the reliability of the gate insulating layer and the stability of low-temperature polysilicon thin film transistors, and the fabrication method is simple , no need to increase the number of process masks.

Description

The production method of low-temperature polysilicon film transistor
Technical field
The present invention relates to field of display technology more particularly to a kind of production methods of low-temperature polysilicon film transistor.
Background technique
Flat panel display device has many merits such as thin fuselage, power saving, radiationless, is widely used.It is existing Flat panel display device mainly includes liquid crystal display device (Liquid Crystal Display, LCD) and Organic Light Emitting Diode Display device (Organic Light Emitting Display, OLED).
In flat panel display device, thin film transistor (TFT) (Thin Film Transistor, TFT) is generally used as switch member Part controls the operation of pixel, or drives pixel as driving element.Thin film transistor (TFT) usually may be used according to its silicon thin film property It is divided into amorphous silicon (a-Si) and two kinds of polysilicon (poly-Si).
Due to the defect problem that amorphous silicon itself is had by oneself, as defect too much caused by on-state current is low, mobility is low, stablizes Property is poor, is restricted it in the application, in order to make up the defect of amorphous silicon itself, expands it in the application of related fields, low Warm polysilicon (Low Temperature Poly-Silicon, LTPS) technology is come into being.
Low-temperature polysilicon film is due to its atomic arrangement rule, carrier mobility height (10~300cm2/ Vs), it is applied to When the electronic components such as thin film transistor (TFT), it can make thin film transistor (TFT) that there is higher driving current, therefore in thin film transistor (TFT) The material of the active layer of one of the nuclear structure of LTPS film as thin film transistor (TFT) is widely used in manufacture craft.
Existing low-temperature polysilicon film transistor generally includes: active layer, the gate insulator on the active layer Layer, the grid on the gate insulating layer above the active layer and with the drain electrode of two end in contact of active layer and source Pole；Wherein, gate insulating layer generally includes the silicon oxide layer being set on the active layer and on the silicon oxide layer Silicon nitride layer spreads (Mobile ion) using silicon nitride layer and the gate contact to keep out the ion in grid, however nitrogen SiClx layer is not a good insulating body for prolonged electrically operation, and in operating process, either N-type is thin Film transistor or P-type TFT, gate insulating layer are all easy to generate carrier injection (Carry trapping) Problem thereby reduces the reliability of gate insulating layer, influences the stability of low-temperature polysilicon film transistor.
Summary of the invention
The purpose of the present invention is to provide a kind of production methods of low-temperature polysilicon film transistor, can not increase system Production can keep out ion diffusion simultaneously and inhibit the gate insulating layer of carrier injection under the premise of journey light shield number, promote grid The reliability of insulating layer and the stability of low-temperature polysilicon film transistor.
To achieve the above object, the present invention provides a kind of production methods of low-temperature polysilicon film transistor, including such as Lower step:
Step 1 provides a substrate, deposits a low-temperature polycrystalline silicon layer on the substrate, and to the low-temperature polycrystalline silicon layer Ion doping and patterned process are carried out, active layer is formed；
Step 2, the SiO deposit layer on the active layer and substrate；
Step 3 is deposited a silicon nitride layer on the silicon oxide layer and is carried out using oxygen-containing gas to the silicon nitride layer Oxidation processes aoxidize the partial nitridation silicon layer of whole silicon nitride layers or upper layer to form a silicon oxynitride layer, thus institute Stating silicon oxynitride layer, with silicon oxide layer or the silicon oxynitride layer, silicon oxide layer grid to be collectively formed with remaining silicon nitride layer exhausted Edge layer；
Step 4 forms grid on square silicon oxynitride layer on the active layer；
Step 5 deposits interbedded insulating layer on the grid and silicon oxynitride layer, and in the interlayer insulating film Source electrode and drain electrode of the upper formation with two end in contact of the active layer.
In the step 3 after the completion of silicon nitride layer deposits, rapid thermal annealing is carried out to the silicon nitride layer and is passed through simultaneously The silicon nitride layer is fully oxidized to silicon oxynitride layer by oxygen-containing gas.
The silicon nitride layer deposition that a period of time is first carried out in the step 3, then passes to oxygen-containing gas and continues to deposit, will be upper The partial nitridation silicon layer of layer is oxidized to silicon oxynitride layer.
Oxygen-containing gas in the step 3 is oxygen, aqueous vapor or nitrous oxide.
The grid material is molybdenum.
The source electrode and the material of drain electrode are that two layers of titanium presss from both sides one layer of aluminium.
The material of the interlayer insulating film is silicon nitride.
The ion adulterated in low-temperature polycrystalline silicon layer in the step 1 is P-type ion or N-type ion.
The source electrode and drain electrode pass through two via holes and the active layer through the interlayer insulating film and gate insulating layer Two end in contact.
Beneficial effects of the present invention: a kind of production method of low-temperature polysilicon film transistor provided by the invention passes through Silicon nitride layer with gate contact is oxidized to silicon oxynitride layer, using silicon oxynitride and gate contact, the silicon oxynitride layer phase Than in silicon nitride layer, can not only keep out ion diffusion, also there is high electrical stability, be capable of effective suppressor grid insulating layer Carrier injection, promotes the reliability of gate insulating layer and the stability of low-temperature polysilicon film transistor, and production method is simple, It does not need to increase processing procedure light shield number.
Detailed description of the invention
For further understanding of the features and technical contents of the present invention, it please refers to below in connection with of the invention detailed Illustrate and attached drawing, however, the drawings only provide reference and explanation, is not intended to limit the present invention.
In attached drawing,
Fig. 1 is the schematic diagram of the step 1 of the production method of low-temperature polysilicon film transistor of the invention；
Fig. 2 is the schematic diagram of the step 2 of the production method of low-temperature polysilicon film transistor of the invention；
Fig. 3 is the signal of the step 3 of the first embodiment of the production method of low-temperature polysilicon film transistor of the invention Figure；
Fig. 4 is the signal of the step 3 of the second embodiment of the production method of low-temperature polysilicon film transistor of the invention Figure；
Fig. 5 is the signal of the step 4 of the first embodiment of the production method of low-temperature polysilicon film transistor of the invention Figure；
Fig. 6 is the signal of the step 4 of the second embodiment of the production method of low-temperature polysilicon film transistor of the invention Figure；
Fig. 7 is the signal of the step 5 of the first embodiment of the production method of low-temperature polysilicon film transistor of the invention Figure；
Fig. 8 is the signal of the step 5 of the second embodiment of the production method of low-temperature polysilicon film transistor of the invention Figure；
Fig. 9 is the flow chart of the production method of low-temperature polysilicon film transistor of the invention.
Specific embodiment
Further to illustrate technological means and its effect adopted by the present invention, below in conjunction with preferred implementation of the invention Example and its attached drawing are described in detail.
Referring to Fig. 9, the present invention provides a kind of production method of low-temperature polysilicon film transistor, include the following steps:
Step 1, referring to Fig. 1, provide a substrate 1, deposit a low-temperature polycrystalline silicon layer on the substrate 1, and to described Low-temperature polycrystalline silicon layer carries out ion doping and patterned process, forms active layer 2.
Specifically, the substrate 1 is transparent substrate, and preferably glass substrate, the step 1 include: first in the substrate 1 One amorphous silicon layer of upper deposition is carried out crystallization by the way of Excimer-Laser Crystallization or solid phase crystallization and forms low temperature polycrystalline silicon Then layer carries out ion doping and patterned process, form active layer 2.Preferably, the active layer 2 with a thickness of
Specifically, the ion of the ion doping is P-type ion (such as boron ion) or N-type ion (such as phosphonium ion).
Step 2, referring to Fig. 2, on the active layer 2 and substrate 1 SiO deposit (SiOX) layer 31.
Preferably, the silicon oxide layer 31 with a thickness of
Step 3 deposits a silicon nitride (SiN on the silicon oxide layer 31X) layer 32 and using oxygen-containing gas to the nitrogen SiClx layer 32 carries out oxidation processes, and the oxidation of partial nitridation silicon layer 32 on whole silicon nitride layers 32 or upper layer is formed a nitrogen Silica (SiON) layer 33, thus the silicon oxynitride layer 33 and silicon oxide layer 31 or the silicon oxynitride layer 33, silicon oxide layer 31 are collectively formed gate insulating layer 3 with remaining silicon nitride layer 32；.
Preferably, the oxygen-containing gas in the step 3 is oxygen (O2), aqueous vapor (H2) or nitrous oxide (N O2O)。
Optionally, referring to Fig. 3, in the first embodiment of the present invention, having been deposited in the step 3 in silicon nitride layer 32 Cheng Hou carries out rapid thermal annealing (Rapid Thermal Annealing, RTA) to the silicon nitride layer 32 while being passed through oxygen-containing The silicon nitride layer 32 is fully oxidized to silicon oxynitride layer 33 by gas, namely the gate insulating layer 3 formed includes from bottom to top The silicon oxide layer 31 and silicon oxynitride layer 33 being stacked.Preferably, silicon oxynitride layer 33 with a thickness of
Optionally, referring to Fig. 4, in the second embodiment of the present invention, the nitrogen of a period of time is first carried out in the step 3 SiClx layer 32 deposits, and then passes to oxygen-containing gas and continues to deposit, the partial nitridation silicon layer 32 on upper layer is oxidized to silicon oxynitride layer 33, namely the gate insulating layer 3 formed includes the silicon oxide layer 31 being stacked from bottom to top, remaining not oxidized nitridation Silicon layer 32 and silicon oxynitride layer 33.Preferably, the remaining not oxidized silicon nitride layer 32 and silicon oxynitride layer 33 is total With a thickness of
It should be noted that silicon oxynitride layer 33 is provided simultaneously with the characteristic and silica that silicon nitride layer 32 keeps out ion diffusion The electrical stability of the height of layer 31, replaces silicon nitride layer 32 and gate contact using silicon oxynitride layer 33, can not only keep out ion Diffusion, additionally it is possible to which the carrier injection of effective suppressor grid insulating layer promotes the reliability of gate insulating layer 3, whole process is not The processing procedure for needing to change existing low-temperature polysilicon film transistor does not need to increase additional light shield or process, it is only necessary to It is passed through oxygen-containing gas when deposited silicon nitride layer 31, or carries out fast speed heat in an oxygen-containing environment after silicon nitride layer 31 deposits Annealing can be realized.
Step 4 please refers to Fig. 5 or Fig. 6, and grid 4 is formed on the silicon oxynitride layer 33 above the active layer 2.
Preferably, the material of the grid 4 is molybdenum (Mo), with a thickness ofSpecifically, the step 4 is first in institute It states silicon oxynitride layer 33 and deposits a metal layer, then the metal layer is patterned, form grid 4.
Step 5 please refers to Fig. 7 or Fig. 8, and interbedded insulating layer 5 is deposited on the grid 4 and silicon oxynitride layer 33, And it is formed on the interlayer insulating film 5 and the source electrode 61 of two end in contact of the active layer 2 and drain electrode 62.
Specifically, the material of the interlayer insulating film 5 be one of silicon nitride and silica or a variety of combinations, it is excellent Selection of land, the interlayer insulating film 5 include the one layer of silica and one layer of silicon nitride being stacked from bottom to top, wherein silica With a thickness ofSilicon nitride with a thickness ofThe source electrode 61 and the material of drain electrode 62 are that two layers of titanium presss from both sides one layer Aluminium, first layer titanium with a thickness ofSecond layer titanium with a thickness ofAluminium with a thickness ofSpecifically, described Step 5 includes that interbedded insulating layer 5 is deposited first on the grid 4 and silicon oxynitride layer 33, is subsequently patterned the layer Between insulating layer 5, form two via holes through the interlayer insulating film 5 and gate insulating layer 3, two via hole exposes respectively Then the both ends of the active layer 2 deposited metal layer and pattern on the interlayer insulating film 5, formed through two via holes point Not with the source electrode 61 of two end in contact of active layer 2 and drain electrode 62.
In conclusion a kind of production method of low-temperature polysilicon film transistor provided by the invention, by will be with grid The silicon nitride layer of contact is oxidized to silicon oxynitride layer, and using silicon oxynitride and gate contact, the silicon oxynitride layer is compared to nitridation Silicon layer, can not only keep out ion diffusion, also have high electrical stability, be capable of the carrier note of effective suppressor grid insulating layer Enter, promote the reliability of gate insulating layer and the stability of low-temperature polysilicon film transistor, production method is simple, does not need to increase Add journey light shield number.
The above for those of ordinary skill in the art can according to the technique and scheme of the present invention and technology Other various corresponding changes and modifications are made in design, and all these change and modification all should belong to the claims in the present invention Protection scope.

Claims (8)

1.一种低温多晶硅薄膜晶体管的制作方法，其特征在于，包括如下步骤：1. a preparation method of low temperature polysilicon thin film transistor, is characterized in that, comprises the steps: 步骤1、提供一基板(1)，在所述基板(1)上沉积一低温多晶硅层，并对所述低温多晶硅层进行离子掺杂和图案化处理，形成有源层(2)；Step 1, providing a substrate (1), depositing a low temperature polysilicon layer on the substrate (1), and performing ion doping and patterning treatment on the low temperature polysilicon layer to form an active layer (2); 步骤2、在所述有源层(2)、及基板(1)上沉积一氧化硅层(31)；Step 2, depositing a silicon monoxide layer (31) on the active layer (2) and the substrate (1); 步骤3、在所述氧化硅层(31)上沉积一氮化硅层(32)并利用含氧气体对所述氮化硅层(32)进行氧化处理，将上层的部分氮化硅层(32)氧化形成一氮氧化硅层(33)，从而所述氮氧化硅层(33)、氧化硅层(31)与剩下的氮化硅层(32)共同形成栅极绝缘层(3)；Step 3, depositing a silicon nitride layer (32) on the silicon oxide layer (31) and oxidizing the silicon nitride layer (32) with an oxygen-containing gas, and removing part of the upper silicon nitride layer (32) 32) Oxidation to form a silicon oxynitride layer (33), so that the silicon oxynitride layer (33), the silicon oxide layer (31) and the remaining silicon nitride layer (32) together form a gate insulating layer (3) ; 步骤4、在所述有源层(2)上方的氮氧化硅层(33)上形成栅极(4)；Step 4, forming a gate electrode (4) on the silicon oxynitride layer (33) above the active layer (2); 步骤5、在所述栅极(4)、以及氮氧化硅层(33)上沉积一层间绝缘层(5)，并在所述层间绝缘层(5)上形成与所述有源层(2)的两端接触的源极(61)与漏极(62)。Step 5, depositing an interlayer insulating layer (5) on the gate electrode (4) and the silicon oxynitride layer (33), and forming the active layer on the interlayer insulating layer (5) (2) The source electrode (61) and the drain electrode (62) are in contact with both ends. 2.如权利要求1所述的低温多晶硅薄膜晶体管的制作方法，其特征在于，所述步骤3中先进行一段时间的氮化硅层(32)沉积，然后通入含氧气体继续沉积，将上层的部分氮化硅层(32)氧化成氮氧化硅层(33)。2. The method for manufacturing a low-temperature polysilicon thin film transistor according to claim 1, wherein in the step 3, a silicon nitride layer (32) is deposited for a period of time, and then an oxygen-containing gas is introduced to continue the deposition, and the Part of the upper silicon nitride layer (32) is oxidized to a silicon oxynitride layer (33). 3.如权利要求1所述的低温多晶硅薄膜晶体管的制作方法，其特征在于，所述步骤3中的含氧气体为氧气、水气、或一氧化二氮。3 . The method for fabricating a low temperature polysilicon thin film transistor according to claim 1 , wherein the oxygen-containing gas in the step 3 is oxygen, water, or nitrous oxide. 4 . 4.如权利要求1所述的低温多晶硅薄膜晶体管的制作方法，其特征在于，所述栅极(4)材料为钼。4. The method for manufacturing a low temperature polysilicon thin film transistor according to claim 1, wherein the gate electrode (4) is made of molybdenum. 5.如权利要求1所述的低温多晶硅薄膜晶体管的制作方法，其特征在于，所述源极(61)与漏极(62)的材料为两层钛夹一层铝。5 . The method for manufacturing a low temperature polysilicon thin film transistor according to claim 1 , wherein the source electrode ( 61 ) and the drain electrode ( 62 ) are made of two layers of titanium and one layer of aluminum. 6 . 6.如权利要求1所述的低温多晶硅薄膜晶体管的制作方法，其特征在于，所述层间绝缘层(5)的材料为氮化硅及氧化硅中的一种或多种的组合。6 . The method for manufacturing a low temperature polysilicon thin film transistor according to claim 1 , wherein the material of the interlayer insulating layer ( 5 ) is one or a combination of one or more of silicon nitride and silicon oxide. 7 . 7.如权利要求1所述的低温多晶硅薄膜晶体管的制作方法，其特征在于，所述步骤1中在低温多晶硅层中掺杂的离子为P型离子或N型离子。7 . The method for manufacturing a low temperature polysilicon thin film transistor according to claim 1 , wherein the ions doped in the low temperature polysilicon layer in the step 1 are P-type ions or N-type ions. 8 . 8.如权利要求1所述的低温多晶硅薄膜晶体管的制作方法，其特征在于，所述源极(61)与漏极(62)通过贯穿所述层间绝缘层(5)和栅极绝缘层(3)的两过孔与所述有源层(2)的两端接触。8. The method for manufacturing a low temperature polysilicon thin film transistor according to claim 1, wherein the source electrode (61) and the drain electrode (62) pass through the interlayer insulating layer (5) and the gate insulating layer The two via holes of (3) are in contact with both ends of the active layer (2).
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