CN106057157B - GOA circuits and liquid crystal display panel - Google Patents
GOA circuits and liquid crystal display panel Download PDFInfo
- Publication number
- CN106057157B CN106057157B CN201610623424.2A CN201610623424A CN106057157B CN 106057157 B CN106057157 B CN 106057157B CN 201610623424 A CN201610623424 A CN 201610623424A CN 106057157 B CN106057157 B CN 106057157B
- Authority
- CN
- China
- Prior art keywords
- film transistor
- tft
- thin film
- connects
- pull
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
A kind of GOA circuits of present invention offer and liquid crystal display panel, it includes pull-up control module, pull-up module, pull-down module, lower transmission module, drop-down maintenance module, bootstrap capacitor, the first constant voltage low level source and the second constant voltage low level source, and pull-up control module is electrically connected with pull-up module, pull-down module, lower transmission module, drop-down maintenance module and bootstrap capacitor respectively；Pull-down module is electrically connected with pull-up module；Pull-down module is electrically connected with the second constant voltage low level source；Maintenance module is pulled down to be electrically connected with the first constant voltage low level source, the second constant voltage low level source respectively；Pull-down module includes voltage compensation submodule；The GOA circuits and liquid crystal display panel of the present invention, by the way that voltage compensation submodule is arranged in pull-down control module, solve existing GOA circuits and liquid crystal display panel leads to scanning signal undercharge because thin film transistor (TFT) threshold voltage is moved toward negative value, the technical issues of in turn resulting in scanning signal output abnormality, influencing display.
Description
Technical field
The present invention relates to technical field of liquid crystal display more particularly to a kind of GOA circuits and the liquid crystal with the GOA circuits
Display panel.
Background technology
IGZO obtains extensive concern as TFT active layers very popular now, for IGZO-TFT devices, due to system
Oxygen vacancy is difficult to control in journey, so IGZO-TFT often shows as depletion type TFT, and says when the voltage of Vgs is negative
It waits, TFT devices have already turned on；This disadvantage of IGZO-TFT, produces serious influence to the performance of GOA circuits.
Gate Driver On Array, abbreviation GOA, the i.e. array substrate in existing liquid crystal display panel of thin film transistor
Upper making scan drive circuit realizes the type of drive progressively scanned to scan line.The structural schematic diagram of existing GOA circuits is such as
Shown in Fig. 1, which includes pull-up control module 101, pull-up module 102, lower transmission module 103, pull-down module 104, bootstrapping
Capacitance and drop-down maintenance module 105.
The pull-down module 104 includes a thin film transistor (TFT), and the source electrode of the thin film transistor (TFT) connects constant voltage low level source
DCL, the scanning signal G (N+1) of the grid connection next stage of the thin film transistor (TFT), the drain electrode connection pull-up control of the thin film transistor (TFT)
The output end of molding block.
When the thin film transistor (TFT) works long hours, threshold voltage can be moved toward negative value, lead to scanning signal undercharge,
Scanning signal output abnormality is caused, and then influences the display effect of liquid crystal display panel.
Therefore, it is necessary to a kind of GOA circuits are provided, to solve the problems of prior art.
Invention content
A kind of GOA circuits of present invention offer, the GOA circuits that thin film transistor (TFT) threshold voltage can be inhibited to be moved toward negative value,
It is moved so that scanning signal output abnormality, Jin Erying with solving existing GOA circuit becauses thin film transistor (TFT) threshold voltage toward negative value
The technical issues of ringing display.
To solve the above problems, technical solution provided by the invention is as follows：
The present invention provides a kind of GOA circuits, including：
Control module is pulled up, the scanning signal for receiving upper level generates the scanning level signal of this grade；
Pull-up module, for drawing high described grade according to the scanning level signal of described grade and the clock signal of this grade
Scanning signal；
Pull-down module, the scanning level signal for dragging down described grade according to the scanning signal of next stage；
Lower transmission module, the grade for generating this grade according to the scanning level signal of described grade and the clock signal of this grade
Communication number；
Pull down maintenance module, the low level of the scanning level signal for maintaining described grade；
Bootstrap capacitor, the high level of the scanning signal for generating described grade；And
First constant voltage low level source, for providing the first constant pressure low level；
Second constant voltage low level source, for providing the second constant pressure low level；
The wherein described pull-up control module respectively with the pull-up module, pull-down module, the lower transmission module, described
It pulls down maintenance module and the bootstrap capacitor is electrically connected；The pull-down module is electrically connected with the pull-up module；It is described
Pull-down module is electrically connected with second constant voltage low level source；Drop-down maintenance module electricity low with first constant pressure respectively
Flat source, second constant voltage low level source are electrically connected.
In the GOA circuits of the present invention, the pull-down module includes the 41st thin film transistor (TFT) and connection the described 4th
The voltage compensation submodule of 11 thin film transistor (TFT)s, the voltage compensation submodule includes first film transistor, the 40th thin
Film transistor and the first constant voltage high level source；
The grid of the first film transistor connects the output end of the grade communication number of this grade, the first film transistor
Source electrode connect first constant voltage high level source, the drain electrode of the first film transistor connects the 40th film crystal
The drain electrode of pipe；
The grid of 40th thin film transistor (TFT) is all connected with the output end of the pull-up control module with source electrode；
The scanning signal of the grid connection next stage of 41st thin film transistor (TFT), the 41st film crystal
The source electrode of pipe connects second constant voltage low level source, and the drain electrode connection the described 40th of the 41st thin film transistor (TFT) is thin
The drain electrode of film transistor.
In the GOA circuits of the present invention, the pull-up control module includes that the 11st thin film transistor (TFT) and the second constant pressure are high
Level source；
The grid of 11st thin film transistor (TFT) connects second constant voltage high level source, the 11st film crystal
The source electrode of pipe connects the scanning signal of the upper level, and the drain electrode of the 11st thin film transistor (TFT) connects the pull-up and controls mould
The output end of block.
In the GOA circuits of the present invention, the pull-up module includes the 21st thin film transistor (TFT), and the described 20th
The grid of one thin film transistor (TFT) connects the output end of the pull-up control module, and the source electrode of the 21st thin film transistor (TFT) connects
Connect the clock signal of described grade, the scanning signal of the drain electrode described grade of connection of the 21st thin film transistor (TFT).
In the GOA circuits of the present invention, the lower transmission module includes the 22nd thin film transistor (TFT), and the described 20th
The grid of two thin film transistor (TFT)s connects the output end of the pull-up control module, and the source electrode of the 22nd thin film transistor (TFT) connects
Connect the clock signal of described grade, the grade communication number of the drain electrode described grade of connection of the 22nd thin film transistor (TFT).
In the GOA circuits of the present invention, the drop-down maintenance module includes the 32nd thin film transistor (TFT), the 42nd thin
It is film transistor, the 51st thin film transistor (TFT), the 52nd thin film transistor (TFT), the 53rd thin film transistor (TFT), the 54th thin
It is film transistor, the 73rd thin film transistor (TFT), the 74th thin film transistor (TFT), the 81st thin film transistor (TFT), the 82nd thin
Film transistor and third constant voltage high level source；
The grid of 32nd thin film transistor (TFT) connects the drain electrode of the 53rd thin film transistor (TFT), the third
The source electrode of 12 thin film transistor (TFT)s connects first constant voltage low level source, the drain electrode connection of the 32nd thin film transistor (TFT)
The scanning signal of described grade；
The grid of 42nd thin film transistor (TFT) connects the drain electrode of the 53rd thin film transistor (TFT), and the described 4th
The output end of the drain electrode connection pull-up control module of 12 thin film transistor (TFT)s, the source electrode of the 42nd thin film transistor (TFT)
Connect the drain electrode of the 81st thin film transistor (TFT)；
The grid of 51st thin film transistor (TFT) connect the third constant voltage high level source with source electrode, and the described 50th
The drain electrode of one thin film transistor (TFT) connects the source electrode of the 52nd thin film transistor (TFT)；
The grid of 52nd thin film transistor (TFT) connects the drain electrode of the 11st thin film transistor (TFT), and the described 50th
The source electrode of two thin film transistor (TFT)s connects first constant voltage low level source；
The grid of 53rd thin film transistor (TFT) connects the drain electrode of the 51st thin film transistor (TFT), and the described 5th
The source electrode of 13 thin film transistor (TFT)s connects the third constant voltage high level source, the drain electrode connection of the 53rd thin film transistor (TFT)
The drain electrode of 54th thin film transistor (TFT)；
The grid of 54th thin film transistor (TFT) connects the drain electrode of the 11st thin film transistor (TFT), and the described 50th
The source electrode of four thin film transistor (TFT)s connects the drain electrode of the 73rd thin film transistor (TFT)；
The grid of 73rd thin film transistor (TFT) connects the drain electrode of the 51st thin film transistor (TFT), and the described 7th
The source electrode of 13 thin film transistor (TFT)s connects the third constant voltage high level source；
The grid of 74th thin film transistor (TFT) connects the drain electrode of the 11st thin film transistor (TFT), and the described 70th
The source electrode of four thin film transistor (TFT)s connects second constant voltage low level source, and the drain electrode of the 74th thin film transistor (TFT) connects institute
State the source electrode of the 54th thin film transistor (TFT)；
The grid of 81st thin film transistor (TFT) connects the drain electrode of the 11st thin film transistor (TFT), and the described 80th
The source electrode of one thin film transistor (TFT) connects the third constant voltage high level source；
The grid of 82nd thin film transistor (TFT) connects the grid of the 32nd thin film transistor (TFT), and the described 8th
The source electrode of 12 thin film transistor (TFT)s connects second constant voltage low level source, the drain electrode connection of the 82nd thin film transistor (TFT)
The drain electrode of 81st thin film transistor (TFT).
In the GOA circuits of the present invention, the level of first constant voltage low level source and second constant voltage low level source
Value is -5~-8V.
In the GOA circuits of the present invention, first constant voltage high level source, second constant voltage high level source and described the
The level value of three constant voltage high level sources is 20~30V.
In the GOA circuits of the present invention, one end of the bootstrap capacitor connects the output end of the pull-up control module, separately
One end connects the scanning signal of described grade.
Above-mentioned purpose according to the present invention proposes a kind of liquid crystal display panel, including above GOA circuits.
Beneficial effects of the present invention are：Compared to existing GOA circuits and liquid crystal display panel, GOA circuits of the invention
And liquid crystal display panel can be inhibited by being provided with voltage compensation submodule in pull-down control module because of film crystal pipe range
Time service so that its threshold voltage is moved toward negative value, into without making scanning signal output abnormality, influences to show；It solves
Existing GOA circuits and liquid crystal display panel cause scanning signal to charge because of the threshold voltage of thin film transistor (TFT) toward negative value movement
Deficiency in turn results in scanning signal output abnormality, the technical issues of influencing to show.
Description of the drawings
It, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution in the prior art
Attached drawing needed in description is briefly described, it should be apparent that, the accompanying drawings in the following description is only some invented
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is a kind of structural schematic diagram of existing GOA circuits；
Fig. 2 is the structural schematic diagram of the preferred embodiment of the GOA circuits of the present invention；
Fig. 3 is the signal waveforms of the preferred embodiment of the GOA circuits of the present invention.
Specific implementation mode
The explanation of following embodiment is referred to the additional illustration, to illustrate the present invention can be used to implement particular implementation
Example.The direction term that the present invention is previously mentioned, such as [on], [under], [preceding], [rear], [left side], [right side], [interior], [outer], [side]
Deng being only the direction with reference to annexed drawings.Therefore, the direction term used be illustrate and understand the present invention, rather than to
The limitation present invention.The similar unit of structure is with being given the same reference numerals in the figure.
The present invention is directed to existing GOA circuits, and when thin film transistor (TFT) works long hours, threshold voltage can be moved toward negative value
It is dynamic, lead to scanning signal undercharge, causes scanning signal output abnormality, and then influence the display effect of liquid crystal display panel
Technical problem, the present embodiment can solve the defect.
Referring to Fig. 2, for the preferred embodiment structural schematic diagram of the GOA circuits of the present invention；
The GOA circuits of this preferred embodiment include pull-up control module 201, pull-up module 202, pull-down module 204, pass down
Module 203, drop-down maintenance module 205, bootstrap capacitor Cbt, the first constant voltage low level source Vss and the second constant voltage low level source DCL；
The pull-up control module 201 is used to receive the scanning signal G (N-1) of upper level, generates scanning level signal；Pull-up module
202, the scanning signal G (N) for drawing high described grade according to the scanning level signal；Pull-down module 204, under
The scanning signal G (N+1) of level-one drags down the scanning level signal of described grade；Lower transmission module 203, for according to described grade
The clock signal CK of scanning signal G (N) and this grade generate the grade communication ST (N) of this grade；Maintenance module 205 is pulled down, is used for
Maintain the low level of the scanning signal G (N) of described grade；Bootstrap capacitor Cbt be set to pull-up control module 201 output end with
And between the output end of the scanning signal G (N) of described grade, the high level of the scanning signal G (N) for generating described grade；
First constant voltage low level source Vss, for providing the first constant pressure low level；Second constant voltage low level source DCL, it is permanent for providing second
Force down level；
Wherein, the pull-up control module 201 respectively with the pull-up module 202, the pull-down module 204, it is described under
Transmission module 203, the drop-down maintenance module 205 and the bootstrap capacitor Cbt are electrically connected；The pull-down module 204 and institute
State the electric connection of pull-up module 202；The pull-down module 204 and the second constant voltage low level source DCL is electrically connected；Under described
Maintenance module 205 is drawn to be electrically connected respectively with the first constant voltage low level source Vss, the second constant voltage low level source DCL.
In the GOA circuits of the present invention, the pull-down module 204 includes the 41st thin film transistor (TFT) T41 and connection institute
The voltage compensation submodule 206 of the 41st thin film transistor (TFT) T41 is stated, the voltage compensation submodule 206 includes the first film
Transistor T1, the 40th thin film transistor (TFT) T40 and the first constant voltage high level source VGH；
The grid of the first film transistor T1 connects the output end of the grade communication ST (N) of this grade, and described first is thin
The source electrode of film transistor T1 connects the first constant voltage high level source VGH, and the drain electrode of the first film transistor T1 connects institute
State the drain electrode of the 40th thin film transistor (TFT) T40；
The grid of the 40th thin film transistor (TFT) T40 is all connected with the output end of the pull-up control module 201 with source electrode；
The scanning signal G (N+1) of the grid connection next stage of the 41st thin film transistor (TFT) T41, the described 40th
The source electrode of one thin film transistor (TFT) T41 connects the second constant voltage low level source DCL, the 41st thin film transistor (TFT) T41's
Drain electrode connects the drain electrode of the 40th thin film transistor (TFT) T40.
The pull-up control module 201 includes the 11st thin film transistor (TFT) T11 and the second constant voltage high level source DCH1；
The grid of the 11st thin film transistor (TFT) T11 connects the second constant voltage high level source DCH1, and the described 11st
The source electrode of thin film transistor (TFT) T11 connects the scanning signal G (N-1) of the upper level, the leakage of the 11st thin film transistor (TFT) T11
Pole connects the output end of the pull-up control module 201.
The pull-up module 202 includes the 21st thin film transistor (TFT) T21, the 21st thin film transistor (TFT)
The grid of T21 connects the output end of the pull-up control module 201, the source electrode connection of the 21st thin film transistor (TFT) T21
The scanning signal G of the drain electrode described grade of connection of the clock signal CK, the 21st thin film transistor (TFT) T21 of described grade
(N)。
The lower transmission module 203 includes the 22nd thin film transistor (TFT) T22, the 22nd thin film transistor (TFT)
The grid of T22 connects the output end of the pull-up control module 201, the source electrode connection of the 22nd thin film transistor (TFT) T22
The grade communication ST of the drain electrode described grade of connection of the clock signal CK, the 22nd thin film transistor (TFT) T22 of described grade
(N)。
The drop-down maintenance module 205 includes the 32nd thin film transistor (TFT) T32, the 42nd thin film transistor (TFT) T42, the
51 thin film transistor (TFT) T51, the 52nd thin film transistor (TFT) T52, the 53rd thin film transistor (TFT) T53, the 54th film
Transistor T54, the 73rd thin film transistor (TFT) T73, the 74th thin film transistor (TFT) T74, the 81st thin film transistor (TFT) T81,
82nd thin film transistor (TFT) T82 and third constant voltage high level source DCH2；
The grid of the 32nd thin film transistor (TFT) T32 connects the drain electrode of the 53rd thin film transistor (TFT) T53, institute
The source electrode for stating the 32nd thin film transistor (TFT) T32 connects the first constant voltage low level source Vss, the 32nd film crystal
The scanning signal G (N) of the drain electrode described grade of connection of pipe T32；
The grid of the 42nd thin film transistor (TFT) T42 connects the drain electrode of the 53rd thin film transistor (TFT) T53, institute
State the output end of the drain electrode connection pull-up control module 201 of the 42nd thin film transistor (TFT) T42, the 42nd film
The source electrode of transistor T42 connects the drain electrode of the 81st thin film transistor (TFT) T81；
The grid of the 51st thin film transistor (TFT) T51 connect the third constant voltage high level source DCH2, institute with source electrode
The drain electrode for stating the 51st thin film transistor (TFT) T51 connects the source electrode of the 52nd thin film transistor (TFT) T52；
The grid of the 52nd thin film transistor (TFT) T52 connects the drain electrode of the 11st thin film transistor (TFT) T11, described
The source electrode of 52nd thin film transistor (TFT) T52 connects the first constant voltage low level source Vss；
The grid of the 53rd thin film transistor (TFT) T53 connects the drain electrode of the 51st thin film transistor (TFT) T51, institute
The source electrode for stating the 53rd thin film transistor (TFT) T53 connects the third constant voltage high level source DCH2, and the 53rd film is brilliant
The drain electrode of body pipe T53 connects the drain electrode of the 54th thin film transistor (TFT) T54；
The grid of the 54th thin film transistor (TFT) T54 connects the drain electrode of the 11st thin film transistor (TFT) T11, described
The source electrode of 54th thin film transistor (TFT) T54 connects the drain electrode of the 73rd thin film transistor (TFT) T73；
The grid of the 73rd thin film transistor (TFT) T73 connects the drain electrode of the 51st thin film transistor (TFT) T51, institute
The source electrode for stating the 73rd thin film transistor (TFT) T73 connects the third constant voltage high level source DCH2；
The grid of the 74th thin film transistor (TFT) T74 connects the drain electrode of the 11st thin film transistor (TFT) T11, described
The source electrode of 74th thin film transistor (TFT) T74 connects the second constant voltage low level source DCL, the 74th thin film transistor (TFT)
The drain electrode of T74 connects the source electrode of the 54th thin film transistor (TFT) T54；
The grid of the 81st thin film transistor (TFT) T81 connects the drain electrode of the 11st thin film transistor (TFT) T11, described
The source electrode of 81st thin film transistor (TFT) T81 connects the third constant voltage high level source DCH2；
The grid of the 82nd thin film transistor (TFT) T82 connects the grid of the 32nd thin film transistor (TFT) T32, institute
The source electrode for stating the 82nd thin film transistor (TFT) T82 connects the second constant voltage low level source DCL, the 82nd film crystal
The drain electrode of pipe T82 connects the drain electrode of the 81st thin film transistor (TFT) T81.
The level value of the first constant voltage low level source Vss and the second constant voltage low level source DCL is -5~-8V.
The first constant voltage high level source VGH, the second constant voltage high level source DCH1 and the third constant pressure high level
The level value of source DCH2 is 20~30V.
One end of the bootstrap capacitor Cbt connects the output end of the pull-up control module 201, and the other end connects described
The scanning signal G (N) of grade.
Referring to Fig. 3, for the signal waveforms of the preferred embodiment of the GOA circuits of the present invention；
Referring to Fig. 2 and Fig. 3, the GOA circuits of this preferred embodiment when in use, when the scanning signal G (N-1) of upper level is
When high level, the 11st thin film transistor (TFT) T11 conductings, the second constant voltage high level source DCH1 passes through the 11st thin film transistor (TFT) T11
It charges to bootstrap capacitor Cbt so that the first reference point Q (N) rises to a higher level.
The scanning signal G (N-1) of subsequent upper level switchs to low level, and the 11st thin film transistor (TFT) T11 is closed, the first reference
Point Q (N) maintains a higher level by bootstrap capacitor Cbt.Meanwhile the clock signal CK of this grade switchs to high level, the first ginseng
The constant pressure high level of examination point Q (N) outputs sequentially passes through the 22nd thin film transistor (TFT) T22 and the 21st thin film transistor (TFT) T21
Grid, the 22nd thin film transistor (TFT) T22 and the 21st thin film transistor (TFT) T21 open, and the clock signal CK of this grade passes through
21st thin film transistor (TFT) T21 continues to charge to bootstrap capacitor Cbt so that the first reference point Q (N) reaches a higher electricity
Flat, the scanning signal G (N) of this grade and the grade communication ST (N) of this grade also switch to high level.
When the scanning signal G (N) of this grade is high level, the grade communication ST (N) of this grade is high level, the scanning of next stage
When signal G (N+1) is low level, first film transistor T1 conductings, the constant pressure high level that the first constant voltage high level source VGH is generated
The second reference point P (N) is reached, constant pressure high level reaches the output of pull-up control module 201 through the 40th thin film transistor (TFT) T40
End is come since the scanning signal G (N+1) of next stage is closed so the high level of the first reference point Q (N) will not be pulled down into.
The grid of 73rd thin film transistor (TFT) T73 connects the drain electrode of the 51st thin film transistor (TFT) T51, and third constant pressure is high
Level source DCH2 exports constant pressure high level, and the 51st thin film transistor (TFT) T51 is opened, and constant pressure high level is through the 51st film crystalline substance
Body pipe T51 reaches the 73rd thin film transistor (TFT) T73, and the 73rd thin film transistor (TFT) T73 is opened, constant pressure high level is reached down
Level-one.
Second constant voltage high level source DCH2 is opened, and the 11st thin film transistor (TFT) T11 is opened, the second constant voltage high level source DCH2
The constant pressure high level of generation reaches the 74th thin film transistor (TFT) T74 through the 11st thin film transistor (TFT) T11, and the 74th film is brilliant
Body pipe T74 is opened, and constant pressure height is flated pass to the 81st thin film transistor (TFT) T81, the 81st thin film transistor (TFT) T81 and is opened, will
Constant pressure high level reaches next stage.
The first constant pressure low level that first constant voltage low level source Vss is generated reaches the 32nd thin film transistor (TFT) T32, this grade
Scanning signal G (N) switch to low level.
When the scanning signal G (N) of this grade is begun to shut off, the grade communication ST (N) of this grade is low level, and the first film is brilliant
Body pipe T1 is closed, and the first constant voltage high level source VGH will not be to second reference point P (N) input high level；Meanwhile next stage is swept
Signal G (N+1) openings are retouched, are high level, the 41st thin film transistor (TFT) T41 is opened, and the first reference point Q (N) pulled down to the
The scanning signal G (N) of the low level of two constant voltage low level source DCL, this grade pulled down to low level, so, the waveform one of output
It is directly normal.
Since the first reference point Q (N) switchs to low level so that the 52nd thin film transistor (TFT) T52 and the 54th film
Transistor T54 is closed, meanwhile, the constant pressure high level that third constant voltage high level source DCH2 is generated makes the 51st thin film transistor (TFT)
T51 and the 53rd thin film transistor (TFT) T53 are opened, and the constant pressure high level that third constant voltage high level source DCH2 is generated reaches third ginseng
Examination point K (N) so that the 42nd thin film transistor (TFT) T42 is opened, the low electricity of the second constant pressure that the second constant voltage low level source DCL is generated
It is flat, the grid of the 42nd thin film transistor (TFT) T42 is reached by the 82nd thin film transistor (TFT) T82, maintains the first reference point Q
(N) low level.
The GOA circuits of the present invention, by increasing voltage compensation module in pull-down module 204, to ensure the first reference
The scanning signal G (N) of point Q (N) and this grade power supplies are sufficient, to improve the reliability of GOA circuits.
The present invention also provides a kind of liquid crystal display panel, the liquid crystal display panel of this preferred embodiment includes such as the institutes of Fig. 2 and 3
GOA circuits in the previous embodiment shown, details are not described herein.
The liquid crystal display panel of the present invention, by increasing voltage compensation submodule 206 in pull-down module 204, to protect
Scanning signal G (N) power supplies for demonstrate,proving the first reference point Q (N) and this grade are sufficient, to improve the reliability of GOA circuits, further carry
Rise the display effect of liquid crystal display panel.
In conclusion although the present invention is disclosed above with preferred embodiment, above preferred embodiment is not to limit
The system present invention, those skilled in the art can make various changes and profit without departing from the spirit and scope of the present invention
Decorations, therefore protection scope of the present invention is subject to the range that claim defines.
Claims (9)
1. a kind of GOA circuits, which is characterized in that including：
Control module is pulled up, the scanning signal for receiving upper level generates the scanning level signal of this grade；
Pull-up module, for drawing high sweeping for described grade according to the scanning level signal of described grade and the clock signal of this grade
Retouch signal；
Pull-down module, the scanning level signal for dragging down described grade according to the scanning signal of next stage；
Lower transmission module, the grade communication for generating this grade according to the scanning level signal of described grade and the clock signal of this grade
Number；
Pull down maintenance module, the low level of the scanning level signal for maintaining described grade；
Bootstrap capacitor, the high level of the scanning signal for generating described grade；And
First constant voltage low level source, for providing the first constant pressure low level；
Second constant voltage low level source, for providing the second constant pressure low level；
The wherein described pull-up control module respectively with the pull-up module, the pull-down module, the lower transmission module, the drop-down
Maintenance module and the bootstrap capacitor are electrically connected；The pull-down module is electrically connected with the pull-up module；The drop-down
Module is electrically connected with second constant voltage low level source；The drop-down maintenance module respectively with the first constant pressure low level
Source, second constant voltage low level source are electrically connected；
The pull-down module includes the voltage compensation of the 41st thin film transistor (TFT) and connection the 41st thin film transistor (TFT)
Submodule, the voltage compensation submodule include the high electricity of first film transistor, the 40th thin film transistor (TFT) and the first constant pressure
Flat source；
The grid of the first film transistor connects the output end of the grade communication number of this grade, the source of the first film transistor
Pole connects first constant voltage high level source, and the drain electrode of the first film transistor connects the 40th thin film transistor (TFT)
Drain electrode；
The grid of 40th thin film transistor (TFT) is all connected with the output end of the pull-up control module with source electrode；
The scanning signal of the grid connection next stage of 41st thin film transistor (TFT), the 41st thin film transistor (TFT)
Source electrode connects second constant voltage low level source, and the drain electrode of the 41st thin film transistor (TFT) connects the 40th film crystalline substance
The drain electrode of body pipe.
2. GOA circuits according to claim 1, which is characterized in that the pull-up control module includes that the 11st film is brilliant
Body pipe and the second constant voltage high level source；
The grid of 11st thin film transistor (TFT) connects second constant voltage high level source, the 11st thin film transistor (TFT)
Source electrode connects the scanning signal of the upper level, the drain electrode connection pull-up control module of the 11st thin film transistor (TFT)
Output end.
3. GOA circuits according to claim 1, which is characterized in that the pull-up module includes the 21st film
Transistor, the grid of the 21st thin film transistor (TFT) connect the output end of the pull-up control module, and the described 21st
The source electrode of thin film transistor (TFT) connects the clock signal of described grade, and the drain electrode of the 21st thin film transistor (TFT) connects described
The scanning signal of grade.
4. GOA circuits according to claim 1, which is characterized in that the lower transmission module includes the 22nd film
Transistor, the grid of the 22nd thin film transistor (TFT) connect the output end of the pull-up control module, and the described 22nd
The source electrode of thin film transistor (TFT) connects the clock signal of described grade, and the drain electrode of the 22nd thin film transistor (TFT) connects described
The grade communication number of grade.
5. GOA circuits according to claim 2, which is characterized in that the drop-down maintenance module includes the 32nd film
Transistor, the 42nd thin film transistor (TFT), the 51st thin film transistor (TFT), the 52nd thin film transistor (TFT), the 53rd film
Transistor, the 54th thin film transistor (TFT), the 73rd thin film transistor (TFT), the 74th thin film transistor (TFT), the 81st film
Transistor, the 82nd thin film transistor (TFT) and third constant voltage high level source；
The grid of 32nd thin film transistor (TFT) connects the drain electrode of the 53rd thin film transistor (TFT), and the described 32nd
The source electrode of thin film transistor (TFT) connects first constant voltage low level source, described in the drain electrode connection of the 32nd thin film transistor (TFT)
This grade of scanning signal；
The grid of 42nd thin film transistor (TFT) connects the drain electrode of the 53rd thin film transistor (TFT), and the described 42nd
The output end of the drain electrode connection pull-up control module of thin film transistor (TFT), the source electrode connection of the 42nd thin film transistor (TFT)
The drain electrode of 81st thin film transistor (TFT)；
The grid of 51st thin film transistor (TFT) connect the third constant voltage high level source with source electrode, and the described 51st is thin
The drain electrode of film transistor connects the source electrode of the 52nd thin film transistor (TFT)；
The grid of 52nd thin film transistor (TFT) connects the drain electrode of the 11st thin film transistor (TFT), and the described 52nd is thin
The source electrode of film transistor connects first constant voltage low level source；
The grid of 53rd thin film transistor (TFT) connects the drain electrode of the 51st thin film transistor (TFT), and the described 53rd
The source electrode of thin film transistor (TFT) connects the third constant voltage high level source, described in the drain electrode connection of the 53rd thin film transistor (TFT)
The drain electrode of 54th thin film transistor (TFT)；
The grid of 54th thin film transistor (TFT) connects the drain electrode of the 11st thin film transistor (TFT), and the described 54th is thin
The source electrode of film transistor connects the drain electrode of the 73rd thin film transistor (TFT)；
The grid of 73rd thin film transistor (TFT) connects the drain electrode of the 51st thin film transistor (TFT), and the described 73rd
The source electrode of thin film transistor (TFT) connects the third constant voltage high level source；
The grid of 74th thin film transistor (TFT) connects the drain electrode of the 11st thin film transistor (TFT), and the described 74th is thin
The source electrode of film transistor connects second constant voltage low level source, the drain electrode connection of the 74th thin film transistor (TFT) described the
The source electrode of 54 thin film transistor (TFT)s；
The grid of 81st thin film transistor (TFT) connects the drain electrode of the 11st thin film transistor (TFT), and the described 81st is thin
The source electrode of film transistor connects the third constant voltage high level source；
The grid of 82nd thin film transistor (TFT) connects the grid of the 32nd thin film transistor (TFT), and the described 82nd
The source electrode of thin film transistor (TFT) connects second constant voltage low level source, described in the drain electrode connection of the 82nd thin film transistor (TFT)
The drain electrode of 81st thin film transistor (TFT).
6. GOA circuits according to claim 1, which is characterized in that first constant voltage low level source is permanent with described second
The level value for forcing down level source is -5~-8V.
7. GOA circuits according to claim 5, which is characterized in that first constant voltage high level source, second constant pressure
The level value of high level source and the third constant voltage high level source is 20~30V.
8. GOA circuits according to claim 1, which is characterized in that one end of the bootstrap capacitor connects the pull-up control
The output end of molding block, the other end connect the scanning signal of described grade.
9. a kind of liquid crystal display panel, which is characterized in that including any GOA circuits of claim 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610623424.2A CN106057157B (en) | 2016-08-01 | 2016-08-01 | GOA circuits and liquid crystal display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610623424.2A CN106057157B (en) | 2016-08-01 | 2016-08-01 | GOA circuits and liquid crystal display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106057157A CN106057157A (en) | 2016-10-26 |
| CN106057157B true CN106057157B (en) | 2018-10-16 |
Family
ID=57197322
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610623424.2A Active CN106057157B (en) | 2016-08-01 | 2016-08-01 | GOA circuits and liquid crystal display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106057157B (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106409262A (en) | 2016-11-28 | 2017-02-15 | 深圳市华星光电技术有限公司 | Goa driving circuit and liquid crystal display device |
| CN106683631B (en) * | 2016-12-30 | 2018-06-22 | 深圳市华星光电技术有限公司 | The GOA circuits and display device of a kind of IGZO thin film transistor (TFT)s |
| CN107221280B (en) * | 2017-07-04 | 2018-01-30 | 深圳市华星光电半导体显示技术有限公司 | Scan drive circuit and display device |
| US10460671B2 (en) | 2017-07-04 | 2019-10-29 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Lltd | Scanning driving circuit and display apparatus |
| US10453414B2 (en) | 2017-08-16 | 2019-10-22 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd | GOA circuit and LCD device |
| CN107369421A (en) * | 2017-08-16 | 2017-11-21 | 深圳市华星光电半导体显示技术有限公司 | A kind of GOA circuits and liquid crystal display device |
| US10699659B2 (en) | 2017-09-27 | 2020-06-30 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | Gate driver on array circuit and liquid crystal display with the same |
| CN107705761B (en) * | 2017-09-27 | 2019-07-23 | 深圳市华星光电技术有限公司 | A kind of GOA circuit and liquid crystal display |
| CN109119036B (en) * | 2018-07-26 | 2020-07-28 | 深圳市华星光电技术有限公司 | Liquid crystal panel |
| CN110085184B (en) * | 2019-04-23 | 2020-06-16 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and display panel |
| CN110047438B (en) * | 2019-04-29 | 2020-09-01 | 深圳市华星光电技术有限公司 | GOA circuit |
| CN111462706B (en) * | 2020-04-23 | 2021-11-23 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit, display device and electronic equipment |
| CN114758635B (en) * | 2022-04-27 | 2023-07-25 | Tcl华星光电技术有限公司 | GOA circuit and display panel |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101765876A (en) * | 2007-07-24 | 2010-06-30 | 皇家飞利浦电子股份有限公司 | A shift register circuit having threshold voltage compensation |
| CN104409056A (en) * | 2014-11-14 | 2015-03-11 | 深圳市华星光电技术有限公司 | Scanning drive circuit |
| CN104851403A (en) * | 2015-06-01 | 2015-08-19 | 深圳市华星光电技术有限公司 | GOA circuit based on oxide semiconductor thin-film transistor |
| CN104882108A (en) * | 2015-06-08 | 2015-09-02 | 深圳市华星光电技术有限公司 | GOA circuit based on oxide semiconductor films transistor |
| CN104992682A (en) * | 2015-07-03 | 2015-10-21 | 深圳市华星光电技术有限公司 | Scanning driving circuit |
| KR101575501B1 (en) * | 2014-07-03 | 2015-12-07 | 경희대학교 산학협력단 | Shift register for providing gate driving signal |
-
2016
- 2016-08-01 CN CN201610623424.2A patent/CN106057157B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101765876A (en) * | 2007-07-24 | 2010-06-30 | 皇家飞利浦电子股份有限公司 | A shift register circuit having threshold voltage compensation |
| KR101575501B1 (en) * | 2014-07-03 | 2015-12-07 | 경희대학교 산학협력단 | Shift register for providing gate driving signal |
| CN104409056A (en) * | 2014-11-14 | 2015-03-11 | 深圳市华星光电技术有限公司 | Scanning drive circuit |
| CN104851403A (en) * | 2015-06-01 | 2015-08-19 | 深圳市华星光电技术有限公司 | GOA circuit based on oxide semiconductor thin-film transistor |
| CN104882108A (en) * | 2015-06-08 | 2015-09-02 | 深圳市华星光电技术有限公司 | GOA circuit based on oxide semiconductor films transistor |
| CN104992682A (en) * | 2015-07-03 | 2015-10-21 | 深圳市华星光电技术有限公司 | Scanning driving circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106057157A (en) | 2016-10-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106057157B (en) | GOA circuits and liquid crystal display panel | |
| CN106205528B (en) | A kind of GOA circuit and liquid crystal display panel | |
| CN106057152B (en) | A kind of GOA circuits and liquid crystal display panel | |
| CN106448592B (en) | GOA driving circuits and liquid crystal display device | |
| CN106297719B (en) | GOA drive circuits and liquid crystal display device | |
| CN105957480B (en) | Gate driving circuit and liquid crystal display device | |
| CN106128379B (en) | GOA circuit | |
| CN110299112A (en) | GOA circuit | |
| CN104505050B (en) | Scanning driving circuit for oxide semiconductor thin film transistor | |
| CN106448588B (en) | GOA driving circuit and liquid crystal display device | |
| CN106098002B (en) | Scan drive circuit and flat display apparatus with the circuit | |
| CN103680451A (en) | GOA circuit and display device applied to liquid crystal display | |
| CN106601205A (en) | Gate driving circuit and liquid crystal display device | |
| CN108877723A (en) | GOA circuit and liquid crystal display device with the GOA circuit | |
| JP2017537339A (en) | Scan driving circuit in oxide semiconductor thin film transistor | |
| CN106910484A (en) | Display device and driving circuit and method thereof | |
| CN106251818A (en) | A kind of gate driver circuit | |
| CN107086028B (en) | Liquid crystal display device and its GOA circuit | |
| CN106486075B (en) | GOA circuit | |
| CN107221299A (en) | A kind of GOA circuits and liquid crystal display | |
| CN107863078B (en) | GOA circuit embedded touch display panel | |
| CN108172181A (en) | A kind of GOA circuits and liquid crystal display panel | |
| CN107039016A (en) | GOA drive circuits and liquid crystal display | |
| CN106297704B (en) | A kind of gate driving circuit | |
| CN108962178A (en) | GOA circuit and liquid crystal display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |