CN106025000A - Handling method for epitaxy defect - Google Patents
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Abstract
本发明公开了一种外延缺陷的处理方法,包括以下步骤:在所述外延片表面制备至少一层腐蚀截止层;将外延缺陷的凸起部分的腐蚀截止层采用物理方法破坏,露出腐蚀截止层下的外延层;用湿法腐蚀的方法腐蚀上述露出的外延层;去除腐蚀截止层并在外延片表面制备钝化层。
The invention discloses a method for treating epitaxial defects, which comprises the following steps: preparing at least one corrosion stop layer on the surface of the epitaxial wafer; destroying the corrosion stop layer of the convex part of the epitaxial defect by physical means to expose the corrosion stop layer the lower epitaxial layer; etch the exposed epitaxial layer by wet etching; remove the etch stop layer and prepare a passivation layer on the surface of the epitaxial wafer.
Description
技术领域 technical field
本发明涉及一种外延缺陷的处理方法,属半导体器件与工艺技术领域。 The invention relates to a method for processing epitaxial defects, belonging to the technical field of semiconductor devices and processes.
背景技术 Background technique
化学气相沉积方法例如金属有机化学气相沉积(MOCVD)在LED与多结太阳电池等领域的应用非常广泛。LED与多结太阳电池的外延层均具由多个薄层组成。以发展最为成熟的Ge/In0.01GaAs/GaInP三结电池为例,其外延过程是在Ge衬底上MOCVD生长In0.01GaAs中电池和GaInP顶电池,每一结电池都具有窗口层、发射区、基区、背场层多层外延结构,同时子电池之间还有隧穿结层。 Chemical vapor deposition methods such as metal-organic chemical vapor deposition (MOCVD) are widely used in LEDs and multi-junction solar cells. The epitaxial layers of both LEDs and multi-junction solar cells consist of multiple thin layers. Taking the most mature Ge/In 0.01 GaAs/GaInP triple-junction cell as an example, the epitaxial process is to grow the In 0.01 GaAs middle cell and the GaInP top cell on the Ge substrate by MOCVD, and each junction cell has a window layer and an emission region. , base region, and back field layer multilayer epitaxial structure, and there is a tunnel junction layer between the sub-cells.
在化学气相沉积的过程中,外延片表面很难保证绝对的洁净,经常会有颗粒杂质等异物掉落到外延片表面,我们称之为外延掉点现象。外延掉点一般会在后续的外延生长过程中被后续生长的外延层层层覆盖,最后形成外延片表面的凸起。凸起高度由掉落异物的大小决定。由于掉点覆盖了原有的外延表面,在掉点处生长的外延层的晶体质量会变得比较差,原子排列变得杂乱无章,更接近于非晶的状态。 In the process of chemical vapor deposition, it is difficult to ensure absolute cleanliness on the surface of the epitaxial wafer, and foreign objects such as particles and impurities often fall on the surface of the epitaxial wafer, which we call the phenomenon of epitaxial drop point. The epitaxial drop point will generally be covered layer by layer by subsequent epitaxial growth during the subsequent epitaxial growth process, and finally form a protrusion on the surface of the epitaxial wafer. The raised height is determined by the size of the dropped foreign object. Since the drop points cover the original epitaxial surface, the crystal quality of the epitaxial layer grown at the drop points will become poorer, and the arrangement of atoms will become disordered, closer to an amorphous state.
而对LED器件与光伏器件等光电器件来说,其外延层的晶体质量非常重要。晶体质量差会导致所外延生长的半导体材料的非辐射复合几率变高。对光伏器件来说,会导致并联电阻变小,漏电增大,填充因子或开路电压性能恶化。对LED器件来说,会导致器件的内部漏电变大,内量子效率降低,发光亮度下降。 For optoelectronic devices such as LED devices and photovoltaic devices, the crystal quality of the epitaxial layer is very important. Poor crystal quality leads to a high probability of non-radiative recombination in the epitaxially grown semiconductor material. For photovoltaic devices, it will lead to smaller parallel resistance, increased leakage, and deterioration of fill factor or open circuit voltage performance. For LED devices, the internal leakage of the device will increase, the internal quantum efficiency will decrease, and the luminous brightness will decrease.
发明内容 Contents of the invention
为解决上述技术问题,本发明公开了一种外延缺陷的处理方法,包括以下步骤:1)在一具有外延缺陷凸起的外延片表面制备至少一层腐蚀截止层;2)将外延缺陷的凸起部分的腐蚀截止层采用物理方法破坏,露出腐蚀截止层下的外延层;3)用湿法腐蚀的方法腐蚀上述露出的外延层;4)去除腐蚀截止层并在外延片表面制备钝化层。 In order to solve the above technical problems, the present invention discloses a method for treating epitaxial defects, which includes the following steps: 1) preparing at least one corrosion stop layer on the surface of an epitaxial wafer with raised epitaxial defects; The corroded cut-off layer is physically destroyed to expose the epitaxial layer under the corroded cut-off layer; 3) The above-mentioned exposed epitaxial layer is etched by wet etching; 4) The corroded cut-off layer is removed and a passivation layer is prepared on the surface of the epitaxial wafer .
进一步地,所述外延片表面具有多层不同半导体材料的外延层,其总厚度范围在1μm至50μm之间。 Further, the surface of the epitaxial wafer has multiple epitaxial layers of different semiconductor materials, the total thickness of which ranges from 1 μm to 50 μm.
进一步地,所述外延缺陷的凸起部分是在外延过程中由于异物掉落在外延表面所形成的,其凸起的高度范围在1微米至数百微米之间。 Further, the raised portion of the epitaxial defect is formed during the epitaxial process due to foreign matters falling on the epitaxial surface, and the height of the raised portion ranges from 1 micron to hundreds of microns.
进一步地,所述腐蚀截止层材料包含但不限于光刻胶、介质材料、半导体,其厚度范围在10nm至20μm之间,不能被用于腐蚀上述外延层的化学溶液所腐蚀。 Further, the material of the etching stop layer includes but not limited to photoresist, dielectric material, and semiconductor, and its thickness ranges from 10 nm to 20 μm, which cannot be etched by the chemical solution used to etch the above epitaxial layer.
进一步地,步骤2)中所述的用于破坏外延缺陷的凸起部分的腐蚀截止层的物理方法包含但不限于刀片刮除、专门的制具的刮除、研磨等,在腐蚀截止层被破坏后露出其下方的外延层。在破坏外延缺陷的凸起部分的腐蚀截止层的过程中也可以破坏外延缺陷的凸起部分的外延层,形成坑洞。 Further, the physical method for destroying the etch stop layer of the raised part of the epitaxial defect described in step 2) includes but not limited to scraping with a blade, scraping with a special tool, grinding, etc., after the etch stop layer is The underlying epitaxial layer is exposed after destruction. During the process of destroying the etch stop layer of the raised portion of the epitaxial defect, the epitaxial layer of the raised portion of the epitaxial defect may also be damaged, forming a pit.
进一步地,步骤3)中,控制所述湿法腐蚀的条件,使其不会破坏腐蚀截止层及其保护的外延层,而只会腐蚀外延缺陷位置露出的外延层,所述湿法腐蚀可以是一步腐蚀或者多步腐蚀,将外延缺陷位置的多层外延层腐蚀,形成腐蚀坑。可以根据需要控制湿法腐蚀的条件,以控制腐蚀坑的面积大小。 Further, in step 3), the conditions of the wet etching are controlled so that the etching stop layer and its protected epitaxial layer are not destroyed, but only the epitaxial layer exposed at the epitaxial defect position is etched, and the wet etching can It is one-step etching or multi-step etching, and the multi-layer epitaxial layer at the position of the epitaxial defect is etched to form an etching pit. The conditions of wet etching can be controlled as needed to control the size of the corrosion pit.
进一步地,步骤4)所述腐蚀截止层去除与制备钝化层为两步工艺,可以先做腐蚀截止层去除,再制备钝化层;也可以先制备钝化层,再用腐蚀截止层作为掩膜剥离掉上述腐蚀坑以外区域的钝化层。所述钝化层为介质材料,具有钝化腐蚀坑的侧壁,减小侧壁漏电的作用。 Further, the removal of the corrosion stop layer and the preparation of the passivation layer in step 4) are a two-step process, the corrosion stop layer can be removed first, and then the passivation layer can be prepared; the passivation layer can also be prepared first, and then the corrosion stop layer can be used as The mask strips off the passivation layer in areas other than the aforementioned etch pits. The passivation layer is a dielectric material, and has the function of passivating the sidewall of the corrosion pit and reducing the sidewall leakage.
进一步地,所述处理方法可以与芯片工艺相结合,将芯片工艺中的工序根据实际需要穿插到处理方法的过程中。 Furthermore, the processing method can be combined with the chip process, and the procedures in the chip process are inserted into the process of the processing method according to actual needs.
本发明同时提供了一种半导体器件的制作方法,包括步骤:1)采用外延生长技术形成外延层,其具有在外延过程中由于异物掉落在外延表面所形成的外延缺陷凸起;2)在所述外延层的表面上制备至少一层腐蚀截止层;3)将外延缺陷的凸起部分的腐蚀截止层采用物理方法破坏,露出腐蚀截止层下的外延层;4)用湿法腐蚀的方法腐蚀上述露出的外延层;5)去除腐蚀截止层。 The present invention also provides a method for manufacturing a semiconductor device, including steps: 1) using epitaxial growth technology to form an epitaxial layer, which has epitaxial defect protrusions formed due to foreign matter falling on the epitaxial surface during the epitaxial process; 2) in At least one corrosion stop layer is prepared on the surface of the epitaxial layer; 3) The corrosion stop layer of the raised part of the epitaxial defect is physically destroyed to expose the epitaxial layer under the corrosion stop layer; 4) The method of wet etching Etching the exposed epitaxial layer; 5) removing the etch stop layer.
本发明的创新点及优点在于:结合物理与化学方法,利用物理方法破坏外延缺陷的凸起部分的腐蚀截止层,在化学湿法腐蚀过程中使得腐蚀截止层只保护凸起位置以外的外延层,实现对凸起的缺陷位置的外延层的选择腐蚀和钝化。经过腐蚀和钝化后,外延掉点周围的晶体质量差的外延层被去除,减小了由于晶体质量差导致的非辐射复合,同时用化学腐蚀和制备介质层钝化了腐蚀坑的侧壁,减小了漏电。 The innovations and advantages of the present invention are: combining physical and chemical methods, using physical methods to destroy the corrosion stop layer of the raised part of the epitaxial defect, so that the corrosion stop layer only protects the epitaxial layer outside the raised part during the chemical wet etching process , to achieve selective etching and passivation of the epitaxial layer at the raised defect site. After etching and passivation, the epitaxial layer with poor crystal quality around the epitaxial drop point is removed, reducing the non-radiative recombination due to poor crystal quality, and at the same time, the sidewall of the etch pit is passivated by chemical etching and preparing a dielectric layer , reducing leakage.
本发明可用于LED或光伏领域。对多结太阳电池来说,采用本发明可消除凸起的外延缺陷对电池芯片性能的影响,减少由于掉点带来的非辐射复合,保证了开路电压与填充因子的正常,而外延缺陷的直径一般在数微米至数十微米之间,其面积占外延片的面积比例非常小,不足千分之一,因此所述的处理方法也不会对短路电流造成明显影响。对LED器件来说,采用本发明可部分消除由于外延缺陷导致的内部漏电,避免内量子效率受到影响,同时当芯片尺寸较大时,该处理方法所损伤的外延面积相对较小,因此对其发光亮度的影响也较小,从而提高了芯片的良率。 The invention can be used in LED or photovoltaic fields. For multi-junction solar cells, adopting the present invention can eliminate the impact of raised epitaxial defects on the performance of the battery chip, reduce non-radiative recombination caused by dropped points, and ensure normal open circuit voltage and fill factor, while epitaxial defects The diameter is generally between a few microns and tens of microns, and its area accounts for a very small proportion of the area of the epitaxial wafer, less than one-thousandth, so the treatment method described above will not have a significant impact on the short-circuit current. For LED devices, the use of the present invention can partially eliminate the internal leakage caused by epitaxial defects and avoid the influence of internal quantum efficiency. At the same time, when the chip size is large, the epitaxial area damaged by this treatment method is relatively small, so its The influence of the luminous brightness is also small, thereby improving the yield rate of the chip.
附图说明 Description of drawings
图1显示了根据本发明实施的一种外延缺陷的处理方法的流程图。 Fig. 1 shows a flow chart of a processing method for epitaxial defects implemented according to the present invention.
图2~5显示了根据本发明实施的制作多结太阳电池的过程示意图。 2 to 5 show schematic diagrams of the process of fabricating multi-junction solar cells implemented according to the present invention.
图中标示: Marked in the figure:
001:Ge衬底; 001: Ge substrate;
002:In0.01GaAs子电池; 002: In 0.01 GaAs sub-cell;
003:外延掉点; 003: extension drop point;
004:GaInP子电池; 004: GaInP sub-cell;
005:GaAs欧姆接触层; 005: GaAs ohmic contact layer;
006:SiO2腐蚀截止层; 006: SiO 2 corrosion stop layer;
007:刀具; 007: knife;
008:正面电极; 008: front electrode;
009:减反射膜; 009: anti-reflection film;
010:背面电极。 010: Back electrode.
具体实施方式 detailed description
下面结合实施例对本发明作进一步描述,但不应以此限制本发明的保护范围。 The present invention will be further described below in conjunction with the examples, but the protection scope of the present invention should not be limited thereby.
下面实施例公开了一种由于外延掉点现象而引起的外延缺陷的处理方法,请参看图1,其主要包括步骤S100~S400,首先在外延层的表面上形成腐蚀截止层,接着结合物理与化学方法,利用物理方法破坏外延缺陷的凸起部分的腐蚀截止层,在化学湿法腐蚀过程中使得腐蚀截止层只保护凸起位置以外的外延层,实现对凸起的缺陷位置的外延层的选择腐蚀和钝化。 The following embodiment discloses a treatment method for epitaxial defects caused by epitaxial dropout phenomenon, please refer to FIG. Chemical method, using physical methods to destroy the corrosion stop layer of the raised part of the epitaxial defect, in the process of chemical wet etching, the corrosion stop layer only protects the epitaxial layer other than the raised position, and realizes the protection of the epitaxial layer of the raised defect position Selective corrosion and passivation.
下面以多结太阳电池为例,详细说明采用上述处理方法制作半导体器件的方法。 Taking a multi-junction solar cell as an example, the method for manufacturing a semiconductor device using the above processing method will be described in detail below.
如图2所示,本实例采用的衬底为Ge衬底001,用MOCVD方式在Ge缓冲层上依次生长InGaAs子电池002、GaInP子电池004、GaAs欧姆接触层005。在本实例中,在生长InGaAs子电池后外延片表面掉落杂质颗粒,形成外延掉点003,并在后续生长过程中被GaInP和GaAs外延层覆盖。 As shown in Figure 2, the substrate used in this example is a Ge substrate 001, and an InGaAs subcell 002, a GaInP subcell 004, and a GaAs ohmic contact layer 005 are sequentially grown on the Ge buffer layer by MOCVD. In this example, impurity particles drop off the surface of the epitaxial wafer after the growth of the InGaAs sub-cell, forming the epitaxial drop point 003, which is covered by GaInP and GaAs epitaxial layers during the subsequent growth process.
如图2所示,在该外延片正面表面采用PECVD的方法制备500nm厚度的SiO2腐蚀截止层006。采用刀具007刮外延片表面,使得外延掉点的凸起处的腐蚀截止层和部分外延层被刮除,露出下方的外延层,如图3所示。 As shown in FIG. 2 , a SiO 2 etch stop layer 006 with a thickness of 500 nm was prepared on the front surface of the epitaxial wafer by PECVD. Use a cutter 007 to scrape the surface of the epitaxial wafer, so that the corrosion stop layer and part of the epitaxial layer at the protrusion of the epitaxial drop point are scraped off, exposing the lower epitaxial layer, as shown in FIG. 3 .
采用H2O2与H3PO4的混合溶液腐蚀露出的GaAs欧姆接触层005与In0 。 01GaAs子电池外延层002,采用HCl与H3PO4的混合溶液腐蚀GaInP子电池外延层004,形成腐蚀坑,外延掉点003也随之脱落。腐蚀过程中通过控制时间来控制腐蚀坑的大小,使得腐蚀坑的直径比外延片处理之前的凸起的外延缺陷的直径略大,以确保去除了外延掉点周围的晶体质量差的外延层。之后再用HF腐蚀掉腐蚀截止层006,如图4所示。 The exposed GaAs ohmic contact layer 005 and In 0 are etched using a mixed solution of H 2 O 2 and H 3 PO 4 . 01 For the GaAs sub-cell epitaxial layer 002, the GaInP sub-cell epitaxial layer 004 is etched with a mixed solution of HCl and H 3 PO 4 to form corrosion pits, and the epitaxial drop point 003 also falls off. During the etching process, the size of the etching pit is controlled by controlling the time, so that the diameter of the etching pit is slightly larger than the diameter of the raised epitaxial defect before epitaxial wafer processing, so as to ensure that the epitaxial layer with poor crystal quality around the epitaxial drop point is removed. Afterwards, the etch stop layer 006 is etched away with HF, as shown in FIG. 4 .
用剥离的方法制备出AuGeNi/Ag/Au正面电极008,以正面电极为掩膜用柠檬酸与H2O2的混合溶液腐蚀掉电极以外的GaAs欧姆接触层005。在芯片表面用电子束蒸发的方法制备TiOx/Al2O3减反射膜009,在腐蚀坑侧壁上的减反射膜同时会起到钝化作用。用光刻胶作为掩膜,用HF腐蚀掉正面电极上的减反射膜。在衬底背面蒸镀Ti/Pd/Ag作为背面电极010,如图5所示。最后通过切割及切割道腐蚀钝化形成单个电池芯片。 The AuGeNi/Ag/Au front electrode 008 was prepared by the lift-off method, and the GaAs ohmic contact layer 005 other than the electrode was etched away with a mixed solution of citric acid and H 2 O 2 using the front electrode as a mask. The TiO x /Al 2 O 3 anti-reflection film 009 is prepared on the surface of the chip by means of electron beam evaporation, and the anti-reflection film on the side wall of the etching pit will also play a passivation role. Using the photoresist as a mask, use HF to etch away the anti-reflection film on the front electrode. Evaporate Ti/Pd/Ag on the back of the substrate as the back electrode 010, as shown in FIG. 5 . Finally, a single battery chip is formed by dicing and dicing line corrosion passivation.
通过上述方面获得的,可消除凸起的外延缺陷对电池芯片性能的影响,减少由于掉点带来的非辐射复合,保证了开路电压与填充因子的正常,而外延缺陷的直径一般在数微米至数十微米之间,其面积占外延片的面积比例非常小,不足千分之一,因此所述的处理方法也不会对短路电流造成明显影响。 Obtained through the above aspects, it can eliminate the impact of raised epitaxial defects on the performance of battery chips, reduce the non-radiative recombination caused by drop points, and ensure the normal open circuit voltage and fill factor, while the diameter of epitaxial defects is generally several microns Between tens of microns, its area accounts for a very small proportion of the area of the epitaxial wafer, less than one-thousandth, so the treatment method will not have a significant impact on the short-circuit current.
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CN106653947A (en) * | 2016-12-28 | 2017-05-10 | 中国电子科技集团公司第十八研究所 | Passivation method and preparation method for three-junction gallium arsenide solar cells |
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CN107068541A (en) * | 2016-12-22 | 2017-08-18 | 天津三安光电有限公司 | A kind of processing method of epitaxy defect |
CN106653947A (en) * | 2016-12-28 | 2017-05-10 | 中国电子科技集团公司第十八研究所 | Passivation method and preparation method for three-junction gallium arsenide solar cells |
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