CN105892951A - Storage method of memory - Google Patents
Storage method of memory Download PDFInfo
- Publication number
- CN105892951A CN105892951A CN201610205123.8A CN201610205123A CN105892951A CN 105892951 A CN105892951 A CN 105892951A CN 201610205123 A CN201610205123 A CN 201610205123A CN 105892951 A CN105892951 A CN 105892951A
- Authority
- CN
- China
- Prior art keywords
- memory
- information
- storage methods
- subelement
- memory storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Abstract
The invention relates to a storage method of a memory. The storage comprises multiple arrays, wherein the arrays comprise memory libraries; each memory library comprises multiple subunits; each subunit comprises multiple storage blocks and processing units; the processing units read and collect information in all the storage blocks and then transmit the information to the subunits; the subunits perform information analysis and then store the information which meet requirements into the memory libraries. The storage method of the memory is improved on the basis of defects of existing memories; erasing units are capable of deleting information in the memories at the same time or one by one, so that users have multiple selections, and the user experience comfort level is greatly improved.
Description
Technical field
The present invention relates to technical field of electronic products, be specifically related to a kind of memory storage methods.
Background technology
Storage arrangement is widely used for storing numerical data in electronic installation (such as, digital camera and personal audio player).Many different types of memorizeies are available, and each uses different basic fundamental to be used for storing data, and described memorizer can be volatibility or nonvolatile memory.Resistive random access memory (RRAM), conducting bridge random access memory (CBRAM) and flash memory are the example of nonvolatile memory.Needing to use extra process during information deletion, processing method is single, and customer experience degree is poor.
Summary of the invention
For solving the above-mentioned problems in the prior art, the invention provides a kind of storage method of memorizer.
The technique effect of the present invention is achieved through the following technical solutions:
A kind of memory storage methods, described memorizer includes multiple array, described array includes memory bank, each memory bank includes multiple subelement, each subelement includes multiple memory block, also including processing unit, processing unit reads and sends after the information in each memory block collects to subelement, and subelement is by storing satisfactory information in matter memory bank after information analysis.
Further, described memory bank is multiple.
Further, also including wiping unit, the information after described processing unit processes is wiped from memory block by described erasing unit.
Further, after described erasing cell erasure information, erasing record is sent to processing unit.
Further, described erasing unit can simultaneously erased multiple information.
Further, described erasing unit can wipe multiple information successively.
Beneficial effect:
Memory storage methods disclosed in this invention, carries out method improvement for the deficiency in existing memorizer, and erasing unit can delete memory inside information simultaneously or one by one, makes user have multiple choices, greatly improves Consumer's Experience level of comfort.
Detailed description of the invention
A kind of memory storage methods, described memorizer includes multiple array, described array includes memory bank, each memory bank includes multiple subelement, each subelement includes multiple memory block, also including processing unit, processing unit reads and sends after the information in each memory block collects to subelement, and subelement is by storing satisfactory information in matter memory bank after information analysis.
A kind of memory storage methods according to claim 1, it is characterised in that: described memory bank is multiple.
Further, also including wiping unit, the information after described processing unit processes is wiped from memory block by described erasing unit.
Further, after described erasing cell erasure information, erasing record is sent to processing unit.
Further, described erasing unit can simultaneously erased multiple information.
Further, described erasing unit can wipe multiple information successively.
Last it is noted that the foregoing is only the preferred embodiments of the present invention, it is not limited to the present invention, although the present invention being described in detail with reference to previous embodiment, for a person skilled in the art, technical scheme described in foregoing embodiments still can be modified by it, or wherein portion of techniques feature is carried out equivalent.All within the spirit and principles in the present invention, any modification, equivalent substitution and improvement etc. made, should be included within the scope of the present invention.
Claims (6)
1. a memory storage methods, it is characterized in that: described memorizer includes multiple array, described array includes memory bank, each memory bank includes multiple subelement, each subelement includes multiple memory block, also including processing unit, processing unit reads and sends after the information in each memory block collects to subelement, and subelement is by storing satisfactory information in matter memory bank after information analysis.
A kind of memory storage methods the most according to claim 1, it is characterised in that: described memory bank is multiple.
A kind of memory storage methods the most according to claim 1, it is characterised in that: also including wiping unit, the information after described processing unit processes is wiped from memory block by described erasing unit.
A kind of memory storage methods the most according to claim 4, it is characterised in that: after described erasing cell erasure information, erasing record is sent to processing unit.
A kind of memory storage methods the most according to claim 4, it is characterised in that: described erasing unit can simultaneously erased multiple information.
A kind of memory storage methods the most according to claim 4, it is characterised in that: described erasing unit can wipe multiple information successively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610205123.8A CN105892951A (en) | 2016-04-05 | 2016-04-05 | Storage method of memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610205123.8A CN105892951A (en) | 2016-04-05 | 2016-04-05 | Storage method of memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105892951A true CN105892951A (en) | 2016-08-24 |
Family
ID=57011982
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610205123.8A Pending CN105892951A (en) | 2016-04-05 | 2016-04-05 | Storage method of memory |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105892951A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1270394A (en) * | 1999-04-02 | 2000-10-18 | 株式会社东芝 | Non-volatile semiconductor memroy device and control method for data erasion |
| CN101154456A (en) * | 2006-09-29 | 2008-04-02 | 海力士半导体有限公司 | Flash memory device and erase method using the same |
| US20080183950A1 (en) * | 2007-01-30 | 2008-07-31 | Micron Technology, Inc. | Memory device architectures and operation |
-
2016
- 2016-04-05 CN CN201610205123.8A patent/CN105892951A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1270394A (en) * | 1999-04-02 | 2000-10-18 | 株式会社东芝 | Non-volatile semiconductor memroy device and control method for data erasion |
| CN101154456A (en) * | 2006-09-29 | 2008-04-02 | 海力士半导体有限公司 | Flash memory device and erase method using the same |
| US20080183950A1 (en) * | 2007-01-30 | 2008-07-31 | Micron Technology, Inc. | Memory device architectures and operation |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8144515B2 (en) | Interleaved flash storage system and method | |
| US10628319B2 (en) | Methods for caching and reading data to be programmed into a storage unit and apparatuses using the same | |
| CN104583977B (en) | The compression of the memory block of main frame auxiliary | |
| US10949113B2 (en) | Retention aware block mapping in flash-based solid state drives | |
| US8892812B2 (en) | Flash memory device and data writing method for a flash memory | |
| US10170201B2 (en) | Data storage device and operating method thereof | |
| CN109783004A (en) | The data processing method of data memory device and memory device | |
| US8174857B1 (en) | Efficient readout schemes for analog memory cell devices using multiple read threshold sets | |
| TW200839773A (en) | Wear-leveling management and file distribution management of hybrid density memory | |
| CN103425597A (en) | Block management method of data storage device and flash memory | |
| JP2004152299A5 (en) | ||
| CN102483714A (en) | Restore Index Page | |
| JP2000348492A5 (en) | ||
| TW200819976A (en) | Memory system with nonvolatile semiconductor memory | |
| CN106970765B (en) | Data storage method and device | |
| CN108073357A (en) | The storage device of data is stored in a manner of RAID | |
| JP2009512066A5 (en) | ||
| CN108228093A (en) | The method and apparatus that memory is monitored using backstage medium scanning | |
| KR20140057082A (en) | Non-volatile memory system and host communicating with the same | |
| TWI707268B (en) | Data storage device and method for operating the same | |
| CN108628757A (en) | Non-volatile memory devices and storage system including it | |
| CN110444243A (en) | Store test method, system and the storage medium of equipment read error error correcting capability | |
| US20160170648A1 (en) | Data storage device and operating method thereof | |
| CN106155572B (en) | Data storage device and data access method | |
| JP2009503745A5 (en) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 545006 No. 20, No. 2, 2 District, E, district 102, new Liu Road, Liuzhou, the Guangxi Zhuang Autonomous Region. Applicant after: LIUZHOU DINGDIAN TECHNOLOGY CO., LTD. Address before: 545027 No. 1, unit 1, Kim Du Hui, 16 Tan Zhong Xi Road, Liuzhou, the Guangxi Zhuang Autonomous Region, No. 5-13 Applicant before: LIUZHOU DINGDIAN TECHNOLOGY CO., LTD. |
|
| CB02 | Change of applicant information | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20160824 |
|
| WD01 | Invention patent application deemed withdrawn after publication |