CN105845001B - FPGA-based multi-electrode array simulation experiment platform - Google Patents
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Abstract
The present invention provides a kind of multiple electrode array Simulation Experimental Platform based on FPGA, which includes FPGA development board and host computer two parts, this two parts is connected with each other by USB interface.Wherein FPGA development board is used to realize that STN neural network model and multiple electrode array algorithm, host computer are communicated using the design upper computer software interface LabVIEW and with FPGA development board.Effect of the invention is to realize multiple electrode array to the multi-point synchronous recording of the field potential of neuroid as the FPGA neuron network experimental platform without zoopery, based on high-speed computation of biological neural network, and can guarantee the consistency with true biological neuron in time scale.The platform is that the discharge mechanism for studying subthalamic nuclei STN core group and multiple electrode array provide the visual research platform for being more nearly actual nerve network, has important practical value to the research and treatment of a variety of neurological diseases including Parkinson's disease.
Description
Technical field
The present invention relates to biomedical engineering technology, especially a kind of multiple electrode array emulation experiment based on FPGA is flat
Platform.
Background technique
Along with the development of economic society, the problem of an aging population is on the rise, parkinsonism, alzheimer's disease, insane
The disease incidence of the mental diseases such as epilepsy increases therewith, however current adjuvant treatment technology is still very limited.Further detection
Facilitate the function that people give farther insight into nervous system with the respondent behavior of observation nervous system, and then more in depth
Understand the pathogenesis of a variety of neurological diseases, this is of great significance to the diagnosing and treating of neurological disease.Multiple electrode array because
Its long-time for capableing of Noninvasive, more site primers and the discharge activities for recording multiple neurons or tissue in vivo or in vitro,
And there is very high spatial and temporal resolution, thus be widely used in fundamental biological knowledge and medical diagnosis.
In human brain the major function of basal nuclei be motion control, conscious activity adjust, while it also participates in memory, learn and
The advanced cognitive function such as emotion.The lesion of basal nuclei can lead to multi-motion and cognitive disorder, including parkinsonism.Basal nuclei area
Domain mainly include (Globus Pallidus externa, GPe) on the outside of globus pallidus, on the inside of globus pallidus (Globus Pallidus,
) and subthalamic nuclei (Subthalamic nucleus, STN) three parts GPi.At present to main in the research of parkinsonism and treatment
If the bioelectrical activity of detection and stimulation STN neuron, therefore it is raw to STN neuron electricity to design multiple electrode array emulation platform
Managing movable detection and stimulation has important researching value.
So far, to the research of the multiple electrode array mainly multiple electrode array with Tissue Culture Dish or based on software
Simulate multiple electrode array.They all have certain limitation, such as the plane multiple electrode array with Tissue Culture Dish exists carefully
The problems such as gap of born of the same parents' migration, cell and substrate is difficult to control, this greatly reduces the measurement accuracy of electrode.It is mostly based on
The research of software simulation multiple electrode array is all to lay particular emphasis on the calculation method of eucaryotic cell structure and extracellular potential, and software is simulated
There is non real-time nature in multiple electrode array.
Field programmable gate array (Field Programmable Gate Array, FPGA) technology is with biological neural
System is that the application in the computational neuroscience field of object is gradually taken seriously.Relative to Analogue ASIC's flexibility
The disadvantages of difference, the development cycle is long, the FPGA of parallel computation have that small in size, the speed of service is fast, the design cycle is short, development cost
The features such as low, low in energy consumption, flexible in programming and repeatable configuration utilize.The operation and characteristic of neuron and network are carried out using FPGA
, it can be achieved that running under actual time scale, operation efficiency is high for analysis, and convenient for application, and integrated level is high, in neuroid spy
Journal of Sex Research, bionics, intelligence system and neurotherapeutic etc. have broad application prospects, therefore FPGA is to realize mind
Ideal chose through meta-model and multiple electrode array algorithm.
Existing technology is also in foundation phase, and there are still following disadvantages: the multiple electrode array based on FPGA there is no to emulate
Experiment porch, hard-wired neural network model is relatively simple for structure, and practical application value is lower；Man-machine interface is not yet complete
It is kind therefore relatively difficult to the Operations Analyst of FPGA hardware neuroid.
Summary of the invention
Deficiency present in view of the above technology, it is imitative that the object of the present invention is to provide a kind of multiple electrode arrays based on FPGA
True experiment platform constructs STN neuroid and realizes multiple electrode array algorithm, in favor of detection and research STN neuron
Bioelectrical activity, host computer are received the data that FPGA epineural metanetwork model and multiple electrode array upload by USB, seen in real time
Examine the influence of Neural spike train behavior He its electric signal surveyed to electrode.
To achieve the above object, the technical solution adopted by the present invention is that providing a kind of multiple electrode array emulation based on FPGA
Experiment porch, in which: the experiment porch includes FPGA development board and host computer two parts interconnected, in FPGA development board
It is integrated with subthalamic nuclei STN neural network model and multiple electrode array, host computer uses LabVIEW graphic programming host computer
Software interface is simultaneously communicated with FPGA development board.
Effect of the invention is the modeling that the Simulation Experimental Platform realizes complicated STN neuroid, and devising can
Depending on changing man-machine interface, the flexibility and ease for operation of system are improved, can be reached with true biological neuron in time scale
It is upper consistent；The platform is provided and is more nearly very for the realization of basal nuclei STN neural network and the testing principle of multiple electrode array
The visual research platform of real neural network has important reality to the research and treatment of a variety of diseases including parkinsonism
With value.FPGA multiple electrode array Simulation Experimental Platform based on concurrent operation is without carrying out zoopery, and the platform is in China
Or even the sciemtifec and technical sphere in a forward position is belonged in world wide.The design innovation proposes the multiple electrode array based on FPGA
Simulation Experimental Platform has following advantage:
1, designed neuroid simulation model can be realized one with true biological neuron in time scale
Cause property.
2, between single unit discharge and electrode measurement signal the research of quantitative relationship provide it is quicker, portable
Hardware test platform.
3, in the present invention, key parameter, synaptic connection strengths and the electrod-array distributed architecture sum number of neuron models
Amount can realize the various characteristics using allocation of computer experimental facilities by upper computer software interface configurations.
4, the design at upper computer software interface enables network discharge condition and the surveyed electric signal of electrode intuitively to show
Show, handle and analyze convenient for follow-up data, is provided preferably to treat the research of a variety of diseases including parkinsonism
Visualization Platform.
Detailed description of the invention
Fig. 1 is FPGA hardware experiment porch structural schematic diagram of the invention；
Fig. 2 is STN stream of neuron line data model of the invention；
Fig. 3 is synaptic currents generation module of the invention；
Fig. 4 is mirrored storage register module of the invention；
Fig. 5 is multiple electrode array module of the invention；
Fig. 6 is upper computer software interface schematic diagram of the invention.
In figure:
2. host computer of 1.FPGA development board, 3. subthalamic nuclei STN neural network model, 4. multiple electrode array modules 5. are upper
At the beginning of 7. input data bus of machine software interface 6.STN stream of neuron line data model, 8. output data bus 9.USB interface 10.
It is worth 11. initial value signal of module, 12. synaptic currents generation module, 13. synaptic currents signal, 14. membrane voltage register module, 15. electric current
16. electrode measurement sign register module 17. neuron membrane voltage signal, 18. neuron current signals 19. of register module are defeated
Enter the additional 23. pipelined data path 24.STN nerve of stimulated current of 20. selector of data-signal, 21. electrode measurement signal 22.
First 25. synaptic currents logical operation module of Synaptic junction matrix, 26. electrode and each 27. multiple electrode array of neuron distance matrix are calculated
28. neuron membrane voltage waveform of method logical operation module shows that 29. electrode measurement signal waveforms show 30. upper computer software interfaces
Parameter setting part
Specific embodiment
The multiple electrode array Simulation Experimental Platform structure to of the invention based on FPGA is illustrated with reference to the accompanying drawing.
The design philosophy of multiple electrode array Simulation Experimental Platform based on FPGA of the invention is to establish on FPGA first
STN neural network model；Then multiple electrode array algorithm is realized in design on FPGA, and is had independently of neural network model
Foreign current stimulation be applied to model, by the discharge mode of stimulation change STN neuroid, detection and analysis difference put
The output signal of multiple electrode array under power mode；Upper computer software interface is finally designed, ginseng can be set in upper computer software interface
It counts and passes through input data bus and be transferred to FPGA, realize the configuration to network initial state, model parameter and coupled structure,
Different parameters can change the flash-over characteristic of STN core group neuron, while dummy electrodes and each neuron also can be set
Distance reaches local field potentials signal caused by detection different loci Neural spike train activity.Finally neuroid in FPGA
The dynamic data of electric discharge dynamic data and multiple electrode array record uploads to host computer, realizes waveform at upper computer software interface
Display is in order to observe and analyze.The experiment porch includes FPGA development board and host computer two parts interconnected.Wherein
FPGA development board is used to realize that STN neural network model and multiple electrode array algorithm, host computer are used to design upper computer software
Interface is simultaneously communicated with FPGA development board.
STN neuron is built using pipelining in FPGA, completes complex logic operation substep, thus in resource
The handling capacity of system is improved in limited situation.The thought of assembly line is actually to be divided into a calculating process using delay
Several subprocess, within a clock cycle, each subprocess handle different neurons, different conditions moment respectively simultaneously
Data, model data intersection save in a shift register, and as clock shifts.In a neuron data path, stream
The series P of waterline is equal with neuron number N, can realize the operation of N number of neuron in this way.Coupling between different neurons
Effect is realized that the generation of synaptic currents depends on coupled structure and presynaptic membrane current potential again by synaptic currents.Coupled structure is by dashing forward
Touching connection matrix indicates, the difference and Synaptic junction of the film potential of the film potential and postsynaptic neuron of presynaptic each neuron
Matrix carries out multiplying, the synaptic currents input of available postsynaptic neuron.The film potential of presynaptic each neuron
Be calculated by pipeline data model, be stored in the BRAM of FPGA by the method for mirrored storage, Synaptic junction matrix by
The storage of peripheral hardware register, when calculating, synchronize calling, can be realized in STN neural network model in this way between each neuron
Coupling.
The multiple electrode array: multiple electrode array is to be arranged in lattice-like multiple electrodes, can detect multiple sites simultaneously
On extracellular field potential.The extracellular field potential is determined by the conductivity of intracellular current source and extracellular medium, according to one
Fixed algorithm can simulate the generation of extracellular field potential, i.e. the detection signal of simulation electrode output, algorithm is known as multi-electrode
Array algorithm can be used hardware description language and design realization in FPGA, be configured by reception by the data that host computer transmits
Site of the Different electrodes in STN neuroid.True multiple electrode array in addition to having the function of detecting extracellular field potential,
Also has the function of stimulated current.The foreign current stimulation that the present invention will be independent of neural network model is applied to model, so
The tracer signal of the FPGA multiple electrode array realized is passed through into USB transmission to host computer afterwards, necessary processing and analysis is carried out, obtains
To the changing rule of the neural network model difference field potential under the outer plus stimulated current of distinct pulse widths, frequency and amplitude, it is
Optimal stimulation mode is found out in disease treatment.
The upper computer software interface: upper computer software interface by NI company LabVIEW (Laboratory Virtual
Instrument Engineering Workbench, laboratory virtual instrument engineering platform) software design realization.LabVIEW
Instrument controlling function abundant is provided, supports virtual instrument framework VISA (Virtual Instrument Software
), Architecture VISA is completely integrated with the communication function with many hardware.FPGA development board by USB device with it is upper
Position machine is connected, and host computer LabVIEW software interface can continuously be received from FPGA development board USB interface by " VISA reading "
The dynamic data that the STN neural network model and multiple electrode array module arithmetic of upload obtain, in the software interface of host computer
The upper real-time waveform of progress is shown, while parameter can be arranged at upper computer software interface and be input data by " VISA write-in "
The distance parameter of neural network model parameter and electrode and each neuron is configured in FPGA.Due to connection FPGA exploitation
The USB of plate and host computer is universal serial bus, cannot be written and read simultaneously, therefore VISA is read and VISA write-in cannot be held simultaneously
Row.Since LabVIEW is designed using visual graphic language, development process is convenient intuitive, simplifies human-computer interaction interface
It realizes, enhances the reliability and ease for use of program.
Multiple electrode array Simulation Experimental Platform based on FPGA of the invention is by FPGA development board 1 interconnected and upper
2 two parts of machine composition.Subthalamic nuclei STN neural network model 3 and multiple electrode array mould are wherein integrated in FPGA development board 1
Block 4, FPGA development board 1 are used to realize that STN neural network model 3 and multiple electrode array module 4, host computer 2 are used to realize
Position machine software interface 5 is simultaneously communicated with FPGA development board 1.It is illustrated below:
Subthalamic nuclei STN neural network model 3
As shown in Figure 1, being designed to hardware experiment platform system, using the Stratix of Altera high-performance low-power-consumption
III EP3SL150F1152C2N model FPGA development board 1 is carried out visual using the developing instrument DSP Builder in Matlab
Change graphical programming.It is built after Euler method discretization with DSP Builder according to the mathematical model that STN neuronal kernel is rolled into a ball
The pipeline data model 6 of STN neuron, and compile and download in FPGA development board 1.On STN neural network model 3 receives
Position machine software interface 5 is transmitted to the initial value signal 11 of Initial Value module 10 and additional stimulated current signal 22 carries out operation, and operation produces
Raw film potential signal 17 and neuron current signal 18 are stored using mirrored storage method into corresponding registers, film potential letter
Numbers 17, which pass upper computer software interface 5 back, carries out observation processing；In 1 epithalamus bottom core STN neural network model 3 of FPGA development board
It is connected between each neuron by Synaptic junction matrix 24 to simulate intercoupling between actual nerve member；As shown in Fig. 2,
STN stream of neuron line data model 6 has five pipelined data paths 23, mainly by addition and subtraction, multiplication, look-up table, displacement
The modules such as register composition, according to neuroid scale design pipeline depth.According to the structure of FPGA, with QUARTUS
The conversion and compiling of II software realization hardware description language are downloaded in FPGA and are realized.By STN stream of neuron line data model 6
The film potential signal 17 and neuron current signal 18 for the neuron that operation obtains twice in succession are stored respectively using mirrored storage
Into two groups of BRAM of FPGA, STN stream of neuron line data model 6 receives initial value signal 11, additional stimulated current signal 22
Input with synaptic currents signal 13 as STN stream of neuron line data model 6 carries out calculation process, by neuron flowing water
The film potential signal 17 for the neuron that 6 operation of line data model generates is input to 1 internal membrane voltage register mould of FPGA development board
Block 14 stores, to be called in synaptic currents generation module 12；Neuron current signal 18 is input in FPGA development board 1
Portion's electric current register module 15 stores, to be called in multiple electrode array module 4.
After STN neural network model is put up, the coupled relation between them is established, the coupling between them is made
It is realized with by synaptic currents signal 13, and synaptic currents are determined by coupled structure and presynaptic membrane electric potential signal 17.Such as Fig. 3 institute
Show, synaptic currents generation module 12 includes that neuronal synapse is of coupled connections matrix 24 and synaptic currents logical operation module 25, coupling
Closing structure is indicated that Synaptic junction matrix 24 designs direct storage by upper computer software QUARTUS II by Synaptic junction matrix 24
Into the register SRAM of FPGA development board 1.Due to needing to calculate synaptic currents, it is possible to use one on other any neurons
The film potential information of step will result in calculating mistake if the film potential information used has been updated.Therefore, to film potential
Mirrored storage is taken in the storage of information, i.e., the value of two steps calculating before and after same variable is stored using two groups of memories, respectively to two
Group memory is read and writen operation, after the completion of a step calculates, the two location swap.Using mirrored storage structure, information
Update not will lead to original information capped, and simple location swap also saves data copy operation after the completion of calculating
Time.In order to save hardware resource and accelerate arithmetic speed, data carry out operation using fixed-point number form.Synaptic currents generate mould
Synchronization call is stored in the Synaptic junction square of membrane potential of neurons signal 17 and storage in sram in BRAM when block 12 calculates
Battle array 24, the film potential signal 17 and Synaptic junction matrix 24 of presynaptic each neuron pass through synaptic currents logical operation module 25
It calculates, obtains the synaptic currents signal 13 of input postsynaptic neuron.Subthalamic nuclei STN neuroid mould can be realized in this way
Each neuron coupled relation in type 3.
The Initial Value module 10 of neural network model is common by signal feeding module, constant value module and multiplexing module
It completes.Initial Value module 10 is transmitted by the reception of input data bus 7 inside FPGA development board 1 by upper computer software interface 5
Data, the configuration of initial parameter is carried out to STN stream of neuron line data model 6, and Initial Value module 10 is soft by receiving host computer
The different parameters that part interface 5 assigns, can make subthalamic nuclei STN neural network model 3 show different electric discharges in operation
Mode.
As shown in figure 4, membrane voltage register module 14 receives the mind that 6 operation of STN stream of neuron line data model generates
Film potential signal 17 through member is simultaneously stored；Electric current register module 15 receives 6 operation of STN stream of neuron line data model
The neuron current signal 18 of generation is simultaneously stored；Electrode measurement sign register module 16 receives multiple electrode array module 4
The electrode measurement signal 21 of operation generation is simultaneously stored；The film potential signal 17 and electrode measurement signal 21 of neuron pass through defeated
Data/address bus 8 is transferred to host computer out, for being observed and being analyzed at upper computer software interface 5.
Multiple electrode array module 4
As shown in figure 5, multiple electrode array module 4 uses hardware description language according to multiple electrode array arithmetic programming, and compile
It translates to download in FPGA development board 1 and realize, multiple electrode array module 4 receives total by input data by upper computer software interface 5
The electrode and each neuron distance matrix 26 that line 7 transmits, to configure site of the Different electrodes in STN neuroid.By
The storage of electrode measurement signal 21 that 4 operation of multiple electrode array module generates is to electrode measurement sign register module 16 and by defeated
Data/address bus 8, which uploads to upper computer software interface 5 and carries out waveform, out shows and processing.Simultaneously by independently of STN neuron net
The additional stimulated current signal 22 of network model 3 carrys out the additional stimulation of simulation electrode, when changing outer plus stimulated current, obtains
The changing rule of neural network model difference field potential under the outer plus stimulated current of distinct pulse widths, frequency and amplitude.
Upper computer software interface 5
As shown in fig. 6, writing upper computer software interface 5 using LabVIEW software Graphics on host computer 2.FPGA is opened
Send out plate 1 and upper computer software interface 5 and data communication realized by USB, upper computer software interface 5 by " VISA reading " reception from
On FPGA development board 1 USB interface 9 transmit by 4 operation of subthalamic nuclei STN neural network model 3 and multiple electrode array module
Obtained dynamic data；Upper computer software interface 5 is arranged parameter and is input data into FPGA development board 1 by " VISA write-in ",
Parameter configuration is carried out to subthalamic nuclei STN neural network model 3 and multiple electrode array module 4.Using more when LabVIEW is programmed
Thread programming technique, the use of multithreading realize data processing and data acquisition take into account, ensure that the complete of data
Property and continuity.The design of upper computer software interface 5 is divided into three parts: neuron membrane voltage waveform display portion 28 may be implemented
Waveform of the film potential signal 17 that FPGA is uploaded at upper computer software interface 5 is shown；Electrode measurement signal waveform display portion
The 29 electrode measurement signals 21 that FPGA upload may be implemented are shown in the waveform at upper computer software interface 5；Parameter configuration part 30
It may be implemented by host computer 2 to the important parameter of subthalamic nuclei STN neural network model 3, network structure in FPGA development board 1
Configuration, the setting of additional stimulated current, the setting of extracellular medium conductivityσ and electrode and each neuron distance parameter
Setting.
FPGA experiment porch
Discrete, fixed step size, fixed-point number operation the STN neuron based on module is write using DSP Builder
Network model, then change into hardware description language.Through II software programming complete operation logic of QUARTUS and program structure；Compiling,
Analysis integrated, placement-and-routing downloads in FPGA development board 1 and runs.The nerve that 1 operation of FPGA development board generates is uploaded through USB
First film potential data 17 and electrode measurement signal 21, at the upper computer software interface 5 that LabVIEW writes to STN neuroid
Model characteristics and multiple electrode array are analyzed and researched.
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| CN107728529B (en) * | 2017-11-01 | 2020-08-04 | 天津大学 | FPGA experimental platform for synchronous control of neural nucleus feedback based on multi-electrode array |
| CN109685209B (en) * | 2018-12-29 | 2020-11-06 | 瑞芯微电子股份有限公司 | Device and method for accelerating operation speed of neural network |
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