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CN105825803A - Display apparatus - Google Patents

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Publication number
CN105825803A
CN105825803A CN201610298421.6A CN201610298421A CN105825803A CN 105825803 A CN105825803 A CN 105825803A CN 201610298421 A CN201610298421 A CN 201610298421A CN 105825803 A CN105825803 A CN 105825803A
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China
Prior art keywords
pixel
integer
display device
adjusting means
resistance
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CN201610298421.6A
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Chinese (zh)
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CN105825803B (en
Inventor
陈帅
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a display apparatus. The display apparatus includes a display panel, wherein the display panel includes a pixel array; the pixel array includes a first integer pixel row, a second integer pixel row, a first integer of scanning lines, a second integer of data lines, a second integer adjusting device row, a scanning drive circuit, and a data drive circuit, wherein the first integer pixel row includes a second integer of pixels; the second integer pixel row includes a first integer of pixels; the second integer adjusting device row includes a third integer of adjusting devices; the third integer of adjusting devices are arranged between every two adjacent pixels in the pixel array; the scanning drive circuit includes a first integer of scanning drivers; and each adjusting device is used for adjusting the time delay value when a data signal generated from the data drive circuit is input in the pixel so that the first time of duration that a switch of the pixel is in the on state is corresponding to the second time of duration that the data signal is input in the pixel through the switch. The display apparatus can avoid occurrence of the situation that a horizontal block with nonuniform upper and lower brightness so as to improve the display quality.

Description

Display device
[technical field]
The present invention relates to Display Technique field, particularly to a kind of display device.
[background technology]
Traditional VA (VerticalAlignment, vertical orientation) show that the display device of pattern is when showing low grey menu, typically there will be H-block (the horizontal block of upper and lower brightness disproportionation) phenomenon, as it is shown in figure 1, this phenomenon can reduce the display quality of described display device.
The reason producing above-mentioned H-block phenomenon is usually:
Different circuit (the WOA between the scanner driver corresponding to scan line, WireOnArray) there is certain resistance, described resistance makes different described scan lines regular hour delay phenomenon occur when transmission scanning signal to pixel (pixel A and the pixel B) in same string pixel column, and the data signal that the described scanning signal that described scan line therefore can be caused to be transmitted is transmitted with data wire is different and fill pixel undercharge or mistake due to relative delay.As shown in Figure 2, pixel B generic pixel A is near data drive circuit, the time-delay value of the trailing edge of the trailing edge relative data signal Data_B of data signal Data_A is big, the persistent period of data signal Data_B matched with the persistent period of scanning signal Scan_B, and the persistent period of data signal Data_A did not mated with the persistent period of scanning signal Scan_A.Therefore result in described display device and with at the picture shown by the region at pixel B place, described H-Block phenomenon occurs at the picture shown by the region at pixel A place.
Therefore, it is necessary to a kind of new technical scheme is proposed, to solve above-mentioned technical problem.
[summary of the invention]
It is an object of the invention to provide a kind of display device, it is avoided that the horizontal block phenomenon upper and lower brightness disproportionation occur, improves display quality.
For solving the problems referred to above, technical scheme is as follows:
A kind of display device, described display device includes: a display floater, described display floater includes: a pel array, described pel array includes at least four pixels, described pel array includes: the first integer pixel row, described pixel column includes pixel described in the second integer, and wherein, described first integer and described second integer are the integer more than or equal to 2;Described second integer pixel row, described pixel column includes pixel described in described first integer;Described first integer scan line, each described scan line is connected with the described pixel in pixel column described in;Described second integer data line, the described pixel in pixel column described in each described data wire and connects;Described second integer adjusting means row, described adjusting means row include the 3rd integer adjusting means, and described 3rd integer is less than or equal to described first integer, and described adjusting means is arranged in described pixel column described in adjacent two between pixel;Scan driving circuit, described scan drive circuit includes described first integer scanner driver, and scan line described in each described scanner driver and connects;One data drive circuit, described data drive circuit is connected with described data wire;Wherein, each described adjusting means is corresponding with pixel described in, described adjusting means is for being adjusted the data signal time-delay value when being input to described pixel produced by described data drive circuit, so that the first persistent period that the switch of described pixel is in opening is corresponding with the second persistent period that described data signal is input to described pixel by described switch.
In above-mentioned display device, in described pixel column, the regulation parameter of described adjusting means is corresponding with described time-delay value.
In above-mentioned display device, the described adjusting means in described adjusting means row is for regulating described time-delay value according to described regulation parameter on the scanning direction of described display device;Wherein, described scanning direction is that described scan drive circuit is to the direction corresponding to the precedence of pixel column scanning described in described first integer.
In above-mentioned display device, described adjusting means includes resistance and/or electric capacity.
In above-mentioned display device, in the case of described adjusting means is described electric capacity, described regulation parameter is the capacitance of described electric capacity;Along the positive direction of scanning direction or the opposite direction of described display device, the capacitance of the described electric capacity in described adjusting means row is incremented by one by one.
In above-mentioned display device, in the case of described adjusting means is described resistance, described regulation parameter is the resistance value of described resistance;Along the positive direction of scanning direction or the opposite direction of described display device, the resistance value of the described resistance in described adjusting means row is incremented by one by one.
In above-mentioned display device, described resistance is in data wire segmentation between pixel described in adjacent two in described data wire.
In above-mentioned display device, the cross section of described data wire segmentation has preset area, and the size of described preset area sets according to described time-delay value.
In above-mentioned display device, in the case of described adjusting means includes described resistance and described electric capacity, described regulation parameter includes capacitance and the resistance value of described resistance of described electric capacity;Along the positive direction of scanning direction or the opposite direction of described display device, the resistance value of described resistance and/or the capacitance of described electric capacity in described adjusting means row are incremented by one by one.
In above-mentioned display device, the first pole plate of described electric capacity is connected with the first end of described resistance, and the second pole plate of described electric capacity is connected with the second end of described resistance.
Hinge structure, the present invention is avoided that the horizontal block phenomenon upper and lower brightness disproportionation occur, improves display quality.
For the foregoing of the present invention can be become apparent, preferred embodiment cited below particularly, and coordinate institute's accompanying drawings, it is described in detail below.
[accompanying drawing explanation]
Fig. 1 is the schematic diagram of the phenomenon of the horizontal block occurring upper and lower brightness disproportionation in traditional display device;
Fig. 2 is pixel A and the scanning signal received by pixel B and the waveform diagram of data signal in Fig. 1;
Fig. 3 is the schematic diagram of the display device of the present invention;
Fig. 4 is the scanning signal received by pixel corresponding with pixel A and pixel B in the display device of the present invention and the waveform diagram of data signal.
[detailed description of the invention]
The word " embodiment " that this specification is used means example, example or illustration.Additionally, the article " " used in this specification and claims usually can be interpreted " one or more ", can clearly determine singulative unless otherwise or from context.
The display device of the present invention can be TFT-LCD (ThinFilmTransistorLiquidCrystalDisplay, thin-film transistor LCD device), OLED (OrganicLightEmittingDiode, organic LED display device) etc..
Schematic diagram with reference to the display device that Fig. 3, Fig. 3 are the present invention.
The first embodiment of the display device of the present invention includes display floater 301, scan drive circuit 302, data drive circuit 303.Described scan drive circuit 302 and described data drive circuit 303 are all connected with described display floater 301.
Described display floater 301 includes a pel array, the first integer (row/bar) scan line, the second integer (row/bar) data wire, and described second integer (arranging) adjusting means arranges.
Described pel array includes at least four (individual) pixel, and described pel array includes the first integer (OK) pixel column, described second integer (arranging) pixel column.Described pixel column includes the second integer (individual) described pixel, and wherein, described first integer and described second integer are the integer more than or equal to 2.Described pixel column includes the described pixel of described first integer (individual).Each described scan line is connected with the described pixel in pixel column described in.Described pixel in pixel column described in each described data wire and connects.Described adjusting means row include the 3rd integer (individual) adjusting means, described 3rd integer is less than or equal to described first integer, described adjusting means is arranged in described pixel column described in adjacent two between pixel, and described adjusting means is also provided between described pixel and described data drive circuit 303.
Described scan drive circuit 302 includes described first integer (individual) scanner driver 3021, and each described scanner driver 3021 is connected with scan line described in.
Described data drive circuit 303 is connected with described data wire.
Each described adjusting means is corresponding with pixel described in, described adjusting means is for being adjusted the data signal time-delay value when being input to described pixel produced by described data drive circuit 303, so that the first persistent period that the switch of described pixel is in opening is corresponding with the second persistent period that described data signal is input to described pixel by described switch.
The described adjusting means corresponding with described pixel is arranged between described pixel and described data drive circuit 303.
Specifically, described adjusting means is for being adjusted high level or the low level waveform of described data signal produced by described data drive circuit 303 by the regulation parameter of described adjusting means, to improve or to reduce described high level or the rising edge of described low level waveform, the steepness (gradient/gradient) of at least one in trailing edge, to realize the adjustment to the described data signal (predetermined gray scale voltage) the described time-delay value when being input to described pixel, i.e., described second persistent period is in the time range of described first persistent period.So may insure that described data signal is entered correctly into when the described switch of described pixel is in described opening in described pixel, it is to avoid described data signal is incorrectly entered into (mistake is filled) in described pixel.
In the display device of the present embodiment, in described pixel column, the described regulation parameter of described adjusting means is corresponding with described time-delay value.
In the display device of the present embodiment, the described adjusting means in described adjusting means row is for regulating described time-delay value according to described regulation parameter on the scanning direction of described display device.
Wherein, described scanning direction is that described scan drive circuit 302 is to the direction corresponding to the precedence of pixel column scanning described in described first integer.
Described adjusting means includes resistance and/or electric capacity.
In the display device of the present embodiment, in the case of described adjusting means is described electric capacity, described regulation parameter is the capacitance of described electric capacity.
Along the positive direction of scanning direction or the opposite direction of described display device, the capacitance of the described electric capacity in described adjusting means row is incremented by one by one.
Described electric capacity is for being adjusted the steepness (gradient/gradient) of at least one in the described high level of described data signal or the rising edge of described low level waveform, trailing edge, to improve or to reduce described steepness (gradient/gradient), thus reduce or improve the described data signal (predetermined gray scale voltage) the described time-delay value when being input to described pixel, it is in the time range of described first persistent period, it is to avoid described data signal mistake is filled described second persistent period.
The positive direction of described scanning direction be from described display floater 301 near one end of described data drive circuit 303 point to described display floater 301 away from described data drive circuit 303 one end scanning sequencing corresponding to direction, the opposite direction of described scanning direction be from described display floater 301 away from described data drive circuit 303 one end point to described display floater 301 near one end of described data drive circuit 303 scanning sequencing corresponding to direction.
It is the scanning signal received by pixel corresponding with pixel A and pixel B in the display device of the present invention and the waveform diagram of data signal with reference to Fig. 4, Fig. 4.
In the case of using same comparison other (described pixel A and described pixel B) with traditional display device (as shown in Figure 1), in the display device of the present invention, the persistent period of data signal Data_B matched with the persistent period of scanning signal Scan_B, and the persistent period of data signal Data_A matched with the persistent period of scanning signal Scan_A.It is thus advantageous to avoid the occurrence of described H-Block phenomenon.
Second embodiment of the display device of the present invention is similar to above-mentioned first embodiment, and difference is:
In the case of described adjusting means is described resistance, described regulation parameter is the resistance value of described resistance.
Along the positive direction of scanning direction or the opposite direction of described display device, the resistance value of the described resistance in described adjusting means row is incremented by one by one.
In the display device of the present invention, described resistance is in data wire segmentation between pixel described in adjacent two in described data wire.
In the display device of the present invention, the cross section of described data wire segmentation has preset area, and the size of described preset area sets according to described time-delay value.
Described resistance is for being adjusted the described steepness (gradient/gradient) of at least one in the described high level of described data signal or the rising edge of described low level waveform, trailing edge, to improve or to reduce described steepness (gradient/gradient), thus reduce or improve the described data signal (predetermined gray scale voltage) the described time-delay value when being input to described pixel, it is in the time range of described first persistent period, it is to avoid described data signal mistake is filled described second persistent period.
3rd embodiment of the display device of the present invention is similar to above-mentioned first embodiment or the second embodiment, and difference is:
In the case of described adjusting means includes described resistance and described electric capacity, described regulation parameter includes capacitance and the resistance value of described resistance of described electric capacity.
Along the positive direction of scanning direction or the opposite direction of described display device, the resistance value of described resistance and the capacitance of described electric capacity in described adjusting means row are incremented by one by one.
In the display device of the present invention, the first pole plate of described electric capacity is connected with the first end of described resistance, and the second pole plate of described electric capacity is connected with the second end of described resistance.
The described steepness (gradient/gradient) of described electric capacity and described resistance at least one in the common described high level to described data signal or the rising edge of described low level waveform, trailing edge is adjusted, to improve or to reduce described steepness (gradient/gradient), thus reduce or improve the described data signal (predetermined gray scale voltage) the described time-delay value when being input to described pixel, it is in the time range of described first persistent period, it is to avoid described data signal mistake is filled described second persistent period.
Pass through technique scheme, the present invention is conducive to improving undercharge that described scanning signal causes due to the difference of described time-delay value when arriving and being positioned at same described pixel column but be positioned at the described pixel in the most described pixel column or the problem that mistake is filled with described data signal, therefore it is possible to prevent described display device that H-Block (the horizontal block of upper and lower brightness disproportionation) phenomenon occurs, improves the described display device display quality when showing low grey menu.
As shown in Figure 3, the scan mode that described display device is used is reverse scan mode, for the described pixel of the offside the closer to described data drive circuit 303 (Source), the time-delay value that the described data signal that described data wire is transmitted arrives described pixel is the biggest.
The described scan drive circuit 302 of described display device is arranged at the one side (left side) of described display floater 301, for the pixel of the offside the closer to described scan drive circuit 302, the time-delay value that the described scanning signal that described scan line is transmitted arrives described pixel is the biggest.
Wherein, for same pixel, described scanning signal arrives the time-delay value of described pixel and arrives the time-delay value of this pixel more than described data signal.
In same described pixel column, by being adjusted at the time-delay value additionally arranging resistance and/or the electric capacity pixel corresponding with described resistance and/or described electric capacity to the arrival of described data signal described in adjacent two between pixel, so that the time-delay value that described data signal and described scanning signal arrive described pixel adapts (matching).
Specifically, by reducing the resistance that the area of the cross section of the data wire segmentation between pixel described in adjacent two increases described in adjacent two between pixel, therefore, the size of resistance (resistance of described data wire segmentation) between pixel described in adjacent two is respectively the first resistance R1, second resistance R2, 3rd resistance R3, wherein, R1 > R2 > R3, the distance of the described data wire segmentation corresponding to R1 and described data drive circuit 303 is more than the distance of the described data wire segmentation corresponding to R2 with described data drive circuit 303, the distance of the described data wire segmentation corresponding to R2 and described data drive circuit 303 is more than the distance of the described data wire segmentation corresponding to R3 with described data drive circuit 303.Therefore, the described data signal that described data wire is transmitted time delay situation between different pixels row is t (data drive circuit 303 to the first pixel column 3011) < t (the first pixel column 3011 to the second pixel column 3012) < t (the second pixel column 3012 is to the 3rd pixel column 3013).And/or
Described in adjacent two, between pixel, electric capacity is being set, correspondingly, the size of the capacitance of set electric capacity is respectively the first capacitance C1, the second capacitance C2, the 3rd capacitance C3, wherein, C1 > C2 > C3, the distance of the electric capacity corresponding to C1 and described data drive circuit 303 is more than the distance of the electric capacity corresponding to C3 and described data drive circuit 303 more than the distance of the distance of the electric capacity corresponding to C2 with described data drive circuit 303, the electric capacity corresponding to C2 and described data drive circuit 303.Under the influence of RC transient effect, the described data signal that described data wire is transmitted time delay situation between different pixels row is t (data drive circuit 303 to the first pixel column 3011) < t (the first pixel column 3011 to the second pixel column 3012) < t (the second pixel column 3012 is to the 3rd pixel column 3013).
nullIn the display device of the present invention,Circuit (the WOA between described scanner driver 3021 corresponding to different described scan lines,WireOnArray) there is the first certain resistance value difference,Therefore,Certain very first time is had poor time in the scanning signal that different described scan lines is transmitted different pixels in arriving same described pixel column,And owing to having the second certain resistance value difference or capacitance difference between described data wire different pixels in same described pixel column,Therefore,Also the second certain time difference is had time in the described data signal that described data wire is transmitted different pixels in arriving same described pixel column,By adjusting described second time difference,Make difference of the described very first time and the second time difference suitable,So that when the described switch of described pixel is in opening,Described data signal can be input in described pixel in time,And it can be avoided that the situation that mistake is filled occurs,And then avoid the occurrence of H-Block phenomenon.
Therefore, the present invention can adjust the match condition of delay when described scanning signal and described data signal arrive pixel, and the equalizaing charge time, to improve H-block phenomenon.That is, the present invention is avoided that the horizontal block phenomenon upper and lower brightness disproportionation occur, improves display quality.
Although illustrate and describing the present invention relative to one or more implementations, but those skilled in the art will appreciate that equivalent variations and amendment based on to reading and the understanding of the specification and drawings.The present invention includes all such amendments and modification, and is limited only by the scope of the following claims.Particularly with the various functions performed by said modules, the random component (unless otherwise instructed) of the appointment function (such as it is functionally of equal value) corresponding to performing described assembly it is intended to, even if structurally the open structure with the function in the exemplary implementations performing this specification shown in this article is not equal to for describing the term of such assembly.In addition, although the special characteristic of this specification is disclosed relative to the only one in some implementations, but this feature can combine with other features one or more that can be such as expectation and other favourable implementations for given or application-specific.And, term " is included ", " having ", " containing " or its deformation be used in detailed description of the invention or claim for, such term be intended to by " comprise " to term similar in the way of include.
In sum; although the present invention is disclosed above with preferred embodiment; but above preferred embodiment also is not used to limit the present invention; those of ordinary skill in the art; without departing from the spirit and scope of the present invention; all can make various change and retouching, therefore protection scope of the present invention defines in the range of standard with claim.

Claims (10)

1. a display device, it is characterised in that described display device includes:
One display floater, described display floater includes:
One pel array, described pel array includes that at least four pixels, described pel array include:
First integer pixel row, described pixel column includes pixel described in the second integer, and wherein, described first integer and described second integer are the integer more than or equal to 2;
Described second integer pixel row, described pixel column includes pixel described in described first integer;
Described first integer scan line, each described scan line is connected with the described pixel in pixel column described in;
Described second integer data line, the described pixel in pixel column described in each described data wire and connects;
Described second integer adjusting means row, described adjusting means row include the 3rd integer adjusting means, and described 3rd integer is less than or equal to described first integer, and described adjusting means is arranged in described pixel column described in adjacent two between pixel;
Scan driving circuit, described scan drive circuit includes described first integer scanner driver, and scan line described in each described scanner driver and connects;
One data drive circuit, described data drive circuit is connected with described data wire;
Wherein, each described adjusting means is corresponding with pixel described in, described adjusting means is for being adjusted the data signal time-delay value when being input to described pixel produced by described data drive circuit, so that the first persistent period that the switch of described pixel is in opening is corresponding with the second persistent period that described data signal is input to described pixel by described switch.
Display device the most according to claim 1, it is characterised in that in described pixel column, the regulation parameter of described adjusting means is corresponding with described time-delay value.
Display device the most according to claim 2, it is characterised in that the described adjusting means in described adjusting means row is for regulating described time-delay value according to described regulation parameter on the scanning direction of described display device;
Wherein, described scanning direction is that described scan drive circuit is to the direction corresponding to the precedence of pixel column scanning described in described first integer.
Display device the most according to claim 3, it is characterised in that described adjusting means includes resistance and/or electric capacity.
Display device the most according to claim 4, it is characterised in that in the case of described adjusting means is described electric capacity, described regulation parameter is the capacitance of described electric capacity;
Along the positive direction of scanning direction or the opposite direction of described display device, the capacitance of the described electric capacity in described adjusting means row is incremented by one by one.
Display device the most according to claim 4, it is characterised in that in the case of described adjusting means is described resistance, described regulation parameter is the resistance value of described resistance;
Along the positive direction of scanning direction or the opposite direction of described display device, the resistance value of the described resistance in described adjusting means row is incremented by one by one.
Display device the most according to claim 6, it is characterised in that described resistance is in data wire segmentation between pixel described in adjacent two in described data wire.
Display device the most according to claim 7, it is characterised in that the cross section of described data wire segmentation has preset area, the size of described preset area sets according to described time-delay value.
Display device the most according to claim 4, it is characterised in that in the case of described adjusting means includes described resistance and described electric capacity, described regulation parameter includes capacitance and the resistance value of described resistance of described electric capacity;
Along the positive direction of scanning direction or the opposite direction of described display device, the resistance value of described resistance and/or the capacitance of described electric capacity in described adjusting means row are incremented by one by one.
Display device the most according to claim 9, it is characterised in that the first pole plate of described electric capacity is connected with the first end of described resistance, the second pole plate of described electric capacity is connected with the second end of described resistance.
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CN115662353A (en) * 2022-12-26 2023-01-31 惠科股份有限公司 Pixel driving circuit, resistance compensation method and display panel
US12033579B1 (en) 2022-12-26 2024-07-09 HKC Corporation Limited Pixel drive circuit, resistance compensation method and display panel
CN117542317A (en) * 2023-12-19 2024-02-09 惠科股份有限公司 Light-emitting driving circuit and display panel

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