CN105810727A

CN105810727A - Bipolar transistor

Info

Publication number: CN105810727A
Application number: CN201410851417.9A
Authority: CN
Inventors: 王寅
Original assignee: Spreadtrum Communications Shanghai Co Ltd
Current assignee: Spreadtrum Communications Shanghai Co Ltd
Priority date: 2014-12-30
Filing date: 2014-12-30
Publication date: 2016-07-27
Anticipated expiration: 2034-12-30
Also published as: CN105810727B

Abstract

The invention discloses a bipolar transistor. The bipolar transistor comprises a substrate, wherein the substrate is provided with a first zone in a first conductive type, a second zone in a second conductive type and a third zone in a third conductive type, wherein the second zone is arranged to surround periphery of the first zone, the third zone is arranged to surround periphery of the second zone, a first insulation zone extends from one side of the third zone to the other side so as to separate the first zone from the second zone to be two relatively independent parts, two isolated parts of the first zone and the second zone are led out and are taken as electrodes, and the third zone is led out and is taken as an electrode. According to the bipolar transistor, an area of a chip can be reduced, and operation is convenient.

Description

Bipolar transistor

Technical Field

The invention relates to the field of semiconductors, in particular to a novel bipolar transistor.

Background

Since the first transistor invented by Bell laboratories in the United states came out, semiconductors have been rapidly developed, transistors have the ability to be mass produced using highly automated processes, and have gradually penetrated into various areas of life, including aerospace, and medical communication, and many sophisticated devices have been made without departing from transistors made from semiconductor materials.

The triode is a semiconductor device for controlling current, which is called a semiconductor triode, also called a bipolar transistor and a transistor. The function is to amplify weak signals into electrical signals with larger amplitude, and the switch is also used as a contactless switch. The triode is formed by manufacturing two PN junctions which are very close to each other on a semiconductor substrate, the whole semiconductor is divided into three parts by the two PN junctions, the middle part is a base region, the two side parts are an emitter region and a collector region, and the arrangement modes include PNP and NPN.

With the increasing demand for semiconductor devices, the size of semiconductor chips is important. The smaller semiconductor chip size means the higher integration degree of the device, and the smaller device size means that more transistors can be placed in the same area, thereby bringing more excellent device performance.

Therefore, how to continuously reduce the chip area has been the direction of research effort of those skilled in the art.

Disclosure of Invention

The invention provides a bipolar transistor which can well reduce the area of a chip, and in order to realize the technical effect, the invention adopts the following technical scheme:

a bipolar transistor, comprising a substrate;

forming a first region with a first conductive type, a second region with a second conductive type and a third region with the first conductive type in the substrate, wherein the second region is arranged around the periphery of the first region, and the third region is arranged around the periphery of the second region; wherein,

an insulating region extending from one side of the third region to the other to separate both the first region and the second region into two relatively independent portions;

and respectively extracting the two separated parts of the first region and the second region to be used as electrodes, and extracting the third region to be used as an electrode.

In the above bipolar transistor, the first conductivity type is N-type, and the second conductivity type is P-type.

In the bipolar transistor, the substrate is a silicon substrate.

In the bipolar transistor, intrinsic silicon is used as the silicon substrate.

In the bipolar transistor, the two isolated parts of the first region are led out to be used as a first emitter and a second emitter;

two isolated parts of the second region are led out to be used as a first base level and a second base level;

the third region serves as a collector;

the collector is shared by the first emitter, the first base, and the second emitter, the second base.

In the bipolar transistor, the insulating region is formed by a strip-shaped gap and/or an insulating material.

In the bipolar transistor, the first region and the second region are both heavily doped, and the third region is lightly doped.

In the bipolar transistor, bottoms of the first region, the second region, and the third region are spaced from a bottom surface of the substrate.

In the bipolar transistor, the first region has a circular shape, and the second region and the third region have both annular shapes.

In the bipolar transistor, the first region, the second region, and the third region are led out by a lead wire.

Based on the technical scheme, the invention can effectively reduce the area of the chip.

Drawings

The invention and its features, aspects and advantages will become more apparent from reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings. Like reference symbols in the various drawings indicate like elements. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention.

FIG. 1 is a schematic diagram of a bipolar transistor provided in an embodiment of the present invention;

FIG. 2 is a schematic view of the present invention corresponding to FIG. 1 in another orientation;

fig. 3 is a circuit diagram corresponding to fig. 1.

Detailed Description

In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention.

In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The following detailed description of the preferred embodiments of the invention, however, the invention is capable of other embodiments in addition to those detailed.

Compared with the prior art, the novel bipolar transistor design provided by the invention can greatly reduce the area of a chip, thereby providing a basis for further improving the precision of a device.

The present invention provides a bipolar transistor, as shown in fig. 1 and 2, including a substrate 1;

a first region 11 having a first conductivity type, a second region 12 having a second conductivity type and a third region 13 having the first conductivity type are formed in the substrate 1. The second region 12 is disposed around the first region 11, and the third region 13 is disposed around the second region 12. Wherein the second region 12 is in contact with both the first region 11 and the third region. Further, an insulating region 14 is further disposed in the substrate 1, and the insulating region 14 extends from one side of the third region 13 to the other side to separate each of the first region 11 and the second region 12 into two relatively independent portions;

In an optional embodiment of the invention, the first conductive type is an N-type, and the second conductive type is a P-type.

In an alternative embodiment of the invention, the substrate may be a silicon substrate. Further alternatively, for example, an intrinsic silicon material may be used as the silicon substrate.

In an alternative embodiment of the present invention, the two portions of the first region 11 separated by the insulating region 14 are extracted as a first emitter (e1)11a and a second emitter (e2)11 b;

the two portions of the second region 12 separated by the insulating region 14 are extracted as a first base level (b1)12a and a second base level (b2)12 b;

the third region 13 may be a collector (c);

the first emitter 11a, the first base 12a, and the second emitter 11b, the second base 12b share the collector of the third region 13, as shown in fig. 3.

In an alternative embodiment of the present invention, the insulating region 14 is formed by a strip-shaped gap and/or an insulating material. For example, in fig. 2, the first region 11 and the second region 12 are completely separated into two separate parts by a stripe-like gap and an insulating material, while one end of the insulating region 14 is terminated in the third region 13. At the same time, the two portions of the first region 11 will form a diffusion region therebetween, which does not have any substantial effect on the present invention.

In an alternative embodiment of the present invention, the first region 11 and the second region 12 are both heavily doped, and the third region 13 is lightly doped. The heavy doping of the first region 11 and the second region 12 is relative to the light doping of the third region 13, that is, the ion doping concentration of the first region 11 and the second region 12 is greater than that of the third region 13.

In an alternative embodiment of the present invention, the bottom portions of the first region 11, the second region 12 and the third region 13 are spaced from the bottom surface of the substrate 10, that is, the regions need to be located in the substrate 10 as a whole, so as to prevent the solder balls at the bottom of the substrate 10 from affecting the electrical contact of the electrodes.

In an alternative embodiment of the present invention, the first region 11 may be circular, and the second region 12 and the third region 13 surrounding the first region 11 are both annular. However, it should be understood by those skilled in the art that the circular first region 11 and the annular second and third regions 12 and 13 are merely a preferred embodiment, and in other alternative embodiments, the first region 11 is not limited to a circle, such as a polygon or an irregular pattern, and it is only necessary to ensure that the second region 12 surrounds the first region 11 and the third region 13 surrounds the periphery of the second region 12, which is not described herein again.

In an alternative embodiment of the present invention, the two portions of the first region 11 and the second region 12 separated by the lead lines are respectively led out, and the third region 13 is led out by the lead lines.

In summary, according to the present invention, as the above technical solution is adopted, the base is disposed around the emitter, the collector is disposed around the base, and the base and the emitter are divided into two regions and share the collector, such a structure can greatly reduce the area occupied by the chip, and further more devices can be placed on the same substrate, which is beneficial to improving the device performance. The invention has small structural change and is convenient to implement.

The above description is of the preferred embodiment of the invention. It is to be understood that the invention is not limited to the particular embodiments described above, in that devices and structures not described in detail are understood to be implemented in a manner common in the art; those skilled in the art can make many possible variations and modifications to the disclosed embodiments, or modify equivalent embodiments to equivalent variations, without departing from the spirit of the invention, using the methods and techniques disclosed above. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention, unless the contents of the technical solution of the present invention are departed.

Claims

1. A bipolar transistor, comprising a substrate;

the two separated parts of the first region and the second region are extracted as electrodes, and the third region is extracted as an electrode.

2. The bipolar transistor of claim 1 wherein said first conductivity type is N-type and said second conductivity type is P-type.

3. The bipolar transistor of claim 1 wherein said substrate is a silicon substrate.

4. The bipolar transistor of claim 3 wherein intrinsic silicon is employed as said silicon substrate.

5. The bipolar transistor of claim 1 wherein said isolated two portions of said first region are tapped as a first emitter and a second emitter;

the third region serves as a collector;

6. The bipolar transistor of claim 1 wherein said insulating region is a stripe of gap and/or insulating material.

7. The bipolar transistor of claim 1 wherein said first region and said second region are both heavily doped and said third region is lightly doped.

8. The bipolar transistor of claim 1 wherein a bottom of said first region, said second region, and said third region are spaced from a bottom surface of said substrate.

9. The bipolar transistor of claim 1 wherein said first region is circular in shape and said second region and said third region are both annular in shape.

10. The bipolar transistor of claim 1 wherein said first region, said second region and said third region are routed by wire bonding.