CN105704401A - Driving method for image pickup apparatus, and image pickup apparatus - Google Patents

Abstract

The present invention provides a driving method for an image pickup apparatus, and the image pickup apparatus. A pixel portion includes a plurality of first pixel rows and a plurality of second pixel rows each being arranged so as to be adjacent to the first pixel row. Among the first pixel row and the second pixel row arranged so as to be adjacent to each other, during at least a part of a period from an end of the electric charge accumulation period in the second pixel row until an end of an output period in which signals from pixels in the first pixel row are output, electric charges accumulated in photoelectric conversion units of pixels in the second pixel row are reset.

Description

Driving method of imaging device and imaging device

technical field

The present invention relates to a configuration for collectively reading out signals for each pixel group in an imaging device including a plurality of pixel groups.

Background technique

There have been proposed imaging devices in which a pixel group consisting of imaging pixel rows and a pixel group consisting of focus detection pixel rows are arranged on an imaging surface, and corresponding signals are read out. As an example of the above imaging device, Japanese Patent Laid-Open No. 2010-074243 describes an imaging device that collectively scans imaging pixel rows while skipping the focus detection pixel rows, and then collectively scans the focus detection pixel rows.

Contents of the invention

An image pickup device according to an aspect of the present invention includes a pixel section in which a plurality of pixels each including a photoelectric conversion unit is arranged in a matrix, and while the charge accumulation period of each pixel is controlled by an electronic shutter operation , outputting a signal based on charges generated in a charge accumulation period by sequentially scanning pixel rows, wherein the pixel section includes a first pixel group and a second pixel group, the first pixel group including a plurality of first pixel rows, And the second pixel group includes a plurality of second pixel rows each arranged adjacent to the first pixel row, charge accumulation of the first pixel row and the second pixel row arranged adjacent to each other The period is controlled in such a manner that after the charge accumulation period of each photoelectric conversion unit included in one pixel row ends, the charge accumulation period of each photoelectric conversion unit included in another pixel row starts, after the charge accumulation period of each photoelectric conversion unit included in the first pixel group After the plurality of first pixel rows are sequentially scanned, by sequentially scanning the plurality of second pixel rows of the second pixel group, the signals in the plurality of first pixel rows and the plurality of pixel rows are output. signal in the second pixel row, and at least in the period from the end of the charge accumulation period in the second pixel row until the end of the output period in which the signal of the pixel in the first pixel row ends During a part of the period, charges accumulated in the photoelectric conversion units of the pixels in the second pixel row among the first pixel row and the second pixel row arranged adjacent to each other are reset.

Other features of the present invention will become apparent from the following description of exemplary embodiments with reference to the accompanying drawings.

Description of drawings

FIG. 1 is a block diagram of an imaging device.

Fig. 2 is a circuit diagram of a pixel.

FIG. 3 is an explanatory diagram for describing a pixel portion.

Fig. 4 is a reading sequence diagram.

Fig. 5 is a driving timing chart for describing transmission.

FIG. 6 is a driving timing chart according to the first exemplary embodiment.

FIG. 7 is a driving timing chart according to the second exemplary embodiment.

FIG. 8 is a driving timing chart according to the third exemplary embodiment.

FIG. 9 is a driving timing chart according to the fourth exemplary embodiment.

Fig. 10 is a driving timing chart according to the fifth exemplary embodiment.

Fig. 11 is a driving timing chart according to the sixth exemplary embodiment.

FIG. 12 illustrates potential fluctuations of the FD according to the sixth exemplary embodiment.

detailed description

Hereinafter, an imaging device according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings. In the figures, components having similar functions are given the same reference numerals. Also, repeated descriptions will be omitted in the exemplary embodiments.

first exemplary embodiment

Referring to FIGS. 1 to 6 , an imaging device 10 according to the present exemplary embodiment will be described. The structure of the imaging device described with reference to FIGS. 1 and 2 can also be applied to other exemplary embodiments.

FIG. 1 is a block diagram of an imaging device 10 according to the present exemplary embodiment. The imaging device 10 includes a pixel unit 100 , a control unit 160 , a vertical scanning circuit 120 , signal lines 115 , a column circuit 140 , a horizontal scanning circuit 150 , and an output unit 170 .

The pixel part 100 includes a plurality of pixels 101 configured to convert light into charge signals and output converted electrical signals. A plurality of pixels 101 are arranged in a matrix.

The control unit 160 generates control pulses. The vertical scanning circuit 120 receives control pulses from the control unit 160 and supplies driving pulses to the respective pixel rows V1 to Vn. The control unit driving pulses include a driving pulse pTX for driving a transfer transistor to be described below, a driving pulse pRES for driving a reset transistor, and a driving pulse pSEL for driving a selection transistor. The column circuit 140 includes an analog-to-digital (AD) conversion unit, and the AD conversion unit converts a pixel signal corresponding to an analog signal output from a unit pixel into a digital signal. The horizontal scanning circuit 150 outputs the signals processed in parallel in the column circuit 140 to the output unit 170 for each column. It should be noted that the column circuit 140 may include amplifiers and noise reduction circuits in addition to the above components.

FIG. 2 shows an example of an equivalent circuit of a pixel. According to the present exemplary embodiment, electrons are used as signal charges, and a description will be given in the case where each transistor is composed of an N-type transistor. It should be noted, however, that holes (holes) may be used as signal charges, and P-type transistors may be used as transistors of pixels.

In addition, the equivalent circuit is not limited to this circuit, and a part of the structure may be commonly used by a plurality of pixels.

The pixel 101 includes a photoelectric conversion unit 103 , a transfer transistor 104 , a reset transistor 105 , an amplification transistor 106 , a floating diffusion (to be referred to as FD hereinafter) 108 , and a selection transistor 107 .

The photoelectric conversion unit 103 generates the amount of charge pairs according to the amount of incident light by photoelectric conversion and accumulates electrons. For example, a photodiode is used as the photoelectric conversion unit 103 .

The transfer transistor 104 transfers electrons accumulated in the photoelectric conversion unit 103 to the FD 108 . The gate of the transfer transistor 104 is supplied with a drive pulse pTX, and an ON state and an OFF state are switched. FD 108 holds electrons transferred by transfer transistor 104 .

The gate of the amplification transistor 106 is connected to the FD108. The amplification transistor 106 amplifies a signal based on the electrons transferred to the FD 108 by the transfer transistor 104 and outputs the amplified signal. Specifically, electrons transferred to the FD 108 are converted into voltages according to their quantities, and electric signals according to the voltages are output to the signal line 115 via the amplification transistor 106 . The amplification transistor 106 constitutes a source follower circuit together with a current source not shown in the drawing.

The reset transistor 105 resets the potential of the input node of the amplification transistor 106 . In addition, by overlapping the ON period of the reset transistor 105 with the ON period of the transfer transistor 104, a reset operation for resetting the charge accumulated in the photoelectric conversion unit 103 (resetting the photoelectric conversion unit 103 at a predetermined potential) is performed. The gate of the reset transistor 105 is supplied with a drive pulse pRES, and the ON state and the OFF state are switched. It should be noted, however, that a structure in which the photoelectric conversion unit 103 is reset via the transfer transistor 104 is employed here, but a structure in which the reset transistor 105 is directly connected to the photoelectric conversion unit 103 to reset the photoelectric conversion unit 103 may also be employed.

The selection transistor 107 outputs signals for a plurality of pixels 101 arranged for one signal line 115 for one pixel or each of a plurality of pixels. The drain of the selection transistor 107 is connected to the source of the amplification transistor 106 , and the source of the selection transistor 107 is connected to the signal line 115 .

As an alternative to the structure according to the present exemplary embodiment, the selection transistor 107 may be arranged between the drain of the amplification transistor 106 and a power supply line supplied with a power supply voltage. The selection transistor 107 may be arranged in such a manner as to control the conduction state between the amplification transistor 106 and the signal line 115 . The gate of the selection transistor 107 is supplied with a drive pulse pSEL, and the ON state and the OFF state of the selection transistor 107 are switched.

It should be noted that the selection transistor 107 may be omitted. In such a structure, the source of the amplification transistor 106 is connected to the signal line 115 to switch the potential of the drain of the amplification transistor 106 or the gate of the amplification transistor 106 so that the selected state and the non-selected state are switched. This also applies to the following exemplary embodiments.

Next, the arrangement of the plurality of pixel rows V1 to Vn in the pixel section 100 will be described with reference to FIG. 3 . In FIG. 3 , 12 pixel rows ( V1 to V12 ) will be described as an example. In the pixel section 100, there are arranged a first pixel row and a second pixel row in which pixels configured to obtain an image are arranged to form a row (hereinafter will be referred to as an imaging pixel row) 201, In the second pixel row, pixels configured to obtain a signal for detecting focus are arranged to form a row (hereinafter will be referred to as a focus detection pixel row) 202 . Pixels configured to obtain an image are imaging pixels, and pixels configured to obtain a signal for detecting focus are focus detection pixels. A plurality of imaging pixel rows and a plurality of focus detection pixel rows are arranged. A plurality of imaging pixel rows 201 constitute a first pixel group (hereinafter will be referred to as an imaging pixel group), and a plurality of focus detection pixel rows 202 constitute a second pixel group (hereinafter will be referred to as a focus detection pixel group). According to the present exemplary embodiment, as shown in FIG. 3 , the focus detection pixel row 202 is arranged adjacent to the imaging pixel row 201 . Furthermore, according to the present exemplary embodiment, the number of focus detection pixel rows is smaller than the number of image pickup pixel rows, and a plurality of image pickup pixel rows ( V5 to V7 ) are arranged between two focus detection pixel rows ( V4 and V8 ).

In FIG. 3 , three pixel rows V4 , V8 , and V12 correspond to focus detection pixel rows, and the other pixel rows correspond to imaging pixel rows. By including imaging pixels, an imaging pixel row is constituted, and by including focus detection pixels, a focus detection pixel row is constituted. The imaging pixel row may include pixels for different purposes (for example, focus detection pixels) in addition to imaging pixels, but in this case, the number of imaging pixels is larger than the number of pixels for different purposes. Similarly, the focus detection pixel row may include pixels for different purposes (such as imaging pixels) in addition to the focus detection pixels, but in this case, the number of focus detection pixels is larger than the number of pixels for different purposes .

One focus detection pixel corresponds to one microlens, and a structure in which a photoelectric conversion unit is divided into a plurality of regions (or a plurality of photoelectric conversion units are arranged to correspond to one microlens) may be used, or a structure in which a photoelectric conversion unit is A structure that shields light in a part of the conversion unit. By using signals of focus detection pixels, it is possible to perform focus detection of a phase difference detection type in the related art.

FIG. 4 shows the signal reading sequence of the respective pixel groups shown in FIG. 3 . In FIG. 4, the vertical direction represents the number of pixel rows, and the horizontal direction represents time. Pixel rows are arranged in this prescribed numbered order in plan view. According to the present exemplary embodiment, in the pixel section 100 , the charge accumulation period Ts is controlled by an electronic shutter operation. According to the present exemplary embodiment, when focusing on a single pixel or a single pixel row, the charge accumulation period is started by resetting the photoelectric conversion unit of the pixel, and after a predetermined period has elapsed, the transfer of the charge by the photoelectric conversion unit is ended. accumulation period.

The charge accumulation period for each of the plurality of imaging pixel rows is started by sequentially resetting the charges accumulated in the photoelectric conversion units of the pixels in the respective imaging pixel rows for each row. Then, by sequentially transferring the charges accumulated in the photoelectric conversion units of the pixels in the respective imaging pixel rows for each row, the charge accumulation period of each of the plurality of imaging pixel rows ends.

On the other hand, the charge accumulation period of each of the plurality of focus detection pixel rows is started by sequentially resetting the charges accumulated in the photoelectric conversion units of the pixels in the respective focus detection pixel rows for each row. Then, by sequentially transferring the charges accumulated in the photoelectric conversion units of the pixels in the respective focus detection pixel rows for each row, the charge accumulation period of each of the plurality of focus detection pixel rows is ended.

After the charge accumulation period ends, a plurality of pixel rows are sequentially scanned for each row, and signals based on charges generated in the photoelectric conversion units during the charge accumulation period are sequentially output to the signal line 115 for each pixel row. Hereinafter, the period from the time point when the charge accumulation period in the predetermined pixel row ends to the time based on the charges generated in the respective photoelectric conversion units in the predetermined pixel row will be referred to as an output period Top of the signal. A period of time up to the time point when the output of the signal line 115 ends. In each row, periods indicated by the start and end points of the arrows in FIG. 4 represent periods obtained by combining the charge accumulation period Ts with the output period Top.

In FIG. 4 , a period including the start of the charge accumulation period and the end of the output period in all the pixel rows constituting the pixel section 100 is set as one frame period. In the case where a plurality of frame periods are continuous, the respective periods are represented as a first frame period FR1 and a second frame period FR2. It should be noted that the frame period FR3 and subsequent frame periods are omitted in FIG. 4 .

A first period S1 and a second period S2 are set in the first frame period (within FR1 ), and a third period S3 and a fourth period S4 are set in the second frame period (within FR2 ). The first period S1 and the third period S3 correspond to periods in which the read operation of the imaging pixel group is performed while the focus detection pixel row 202 is skipped. The second period S2 and the fourth period S4 correspond to periods in which a read operation of the focus detection pixel group is performed, which is not performed in the first period S1 and the third period S3. By repeating the above-described frame period for a predetermined period, movie shooting is enabled.

The read operation described here refers to an operation during a period from the start of the accumulation period Ts (more specifically, the start of the reset period Tres) in a predetermined pixel row until the end of the output period Top. Therefore, in the example of FIG. 4 , one frame period corresponds to the period from the start of the accumulation period Ts (more specifically, the start of the reset period Tres) in all the pixel rows constituting the pixel section 100 until the end of the output period Top. time period. The first period S1 and the third period S3 correspond to a period from the start of the accumulation period Ts (more specifically, the start of the reset period Tres) in the plurality of first pixel rows until the end of the output period Top. Similarly, the second period S2 and the fourth period S4 correspond to a period from the start of the accumulation period Ts (more specifically, the start of the reset period Tres) in the plurality of second pixel rows until the end of the output period Top.

In FIG. 5 , from the signal reading order of the pixel rows illustrated in FIG. 4 , a portion where the imaging pixel row 201 and the focus detection pixel row 202 are arranged adjacent to each other (pixel rows V3 to V5 in FIG. 4 ) is extracted , and the transmission of this exemplary embodiment will be described. The vertical direction in FIG. 5 represents the driving pulses of the respective pixel rows V3 to V5, and the horizontal direction represents the elapsed time. The horizontal scanning period HD is set by a horizontal sync pulse. The selection transistor of the pixel 101 is placed in an ON state during the horizontal scanning period HD during which the signal read out from the imaging device is read out from the pixel 101 .

In FIG. 5 , during a period in which each driving pulse is at a high level, each transistor is placed in an ON state. The respective transistors in the pixel row are supplied with corresponding driving pulses (pRES, pTX, and pSEL) from the vertical scanning circuit 120 during periods indicated by solid lines among the driving pulses of the respective transistors. During a period indicated by a dotted line, the respective signals are not supplied from the vertical scanning circuit 120, which means that the potentials of the respective control lines are held by parasitic capacitance. It should be noted, however, that drive pulses may be supplied from the vertical scanning circuit 120 even during the period indicated by the dotted line.

First, at time t0, the first horizontal scanning period HD1 is started by a horizontal sync pulse. At this time, the driving pulse pRES3 and the driving pulse pTX3 in the pixel row V3 turn to high level. Next, at time t1, the driving pulse pRES3 and the driving pulse pTX3 are turned to low level. Accordingly, the photoelectric conversion unit 103 is reset, and the charge accumulation period Ts of the photoelectric conversion unit 103 of each pixel constituting the pixel row V3 starts. That is, time t1 is the start time of the charge accumulation period Ts in the pixel row V3.

The period t0 to t1 corresponds to the reset period Tres in which the reset operation of the photoelectric conversion unit 103 is performed. Although not shown in FIG. 5 , in some cases, during a part of the first horizontal scanning period HD1, the horizontal scanning circuit 150 may scan pixels in a predetermined pixel row (for example, pixel row V1 in FIG. 4 ). Signals of the pixels are output to the outside of the imaging device. At time t2, the first horizontal scanning period HD1 ends.

At time t3, the second horizontal scanning period HD2 starts. At this time, the driving pulse pRES5 and the driving pulse pTX5 in the pixel row V5 turn to high level. Next, at time t4, the driving pulse pRES5 and the driving pulse pTX5 turn to low level. Accordingly, the photoelectric conversion unit 103 is reset, and the charge accumulation period Ts in the photoelectric conversion unit of the pixel in the pixel row V5 starts. That is, time t4 corresponds to the start time of the charge accumulation period Ts in the pixel row V5. At time t5, the second horizontal scanning period HD2 ends.

At time t6, the third horizontal scanning period HD3 starts, and the drive pulses pSEL3 and pRES3 in the pixel row V3 turn to high level. At time t7, pRES3 turns to low level. When the driving pulse pSEL3 turns to high level, the selection transistor 107 is placed in an ON state. In addition, the driving pulse pRES3 turns to a high level, so that the FD is reset.

For this reason, the noise signal in the pixel row V3 is output to the signal line 115 during the period t7 to t8.

At time t8, the driving pulse pTX3 turns to high level, and at time t9, the driving pulse pTX3 turns to low level. With this operation, the charges accumulated in the photoelectric conversion unit 103 are transferred to the FD 108 . The period t1 to t9 from time t1 to time t9 corresponds to the charge accumulation period Ts in the pixel row V3.

At time t10, the driving pulse pSEL turns to low level to be placed in an OFF state, and the third horizontal scanning period HD3 ends.

For this reason, charges generated by the photoelectric conversion units constituting the respective pixels in the pixel row V3 during the charge accumulation period Ts are output to the signal line 115 during the period t9 to t10 from time t9 to time t10 . Here, the period t9 to t10 will be referred to as an output period Top.

It should be noted that when differential processing is performed for the signal output during the period t7 to t8 and the signal output during the period t9 to t10 by the column circuit 140 or a correlated double sampling (CDS) circuit not shown in the drawing, it is possible to obtain signal with reduced noise.

A state in which charge can be accumulated in the photoelectric conversion unit 103 in the pixel row V3 is established during the period from time t9 corresponding to the end of the charge accumulation period Ts and time t19 corresponding to the pixel row Start of reset operation for the second frame period in V3. However, during this period, since the charges accumulated in the respective photoelectric conversion units 103 in the pixel row V3 are not used for the signal output from the pixel row V3, this period is called a null period Tnu of the pixels constituting the pixel row V3.

It should be noted that after the reset period Tres in the pixel row V3, during the second horizontal scanning period HD2 corresponding to the next horizontal scanning period, the charge accumulation operation in the pixel row V5 is started (during the second horizontal scanning period HD2 , the reset period Tres in the pixel row V5 occurs).

When the first period S1 (period of the read operation of the imaging pixel group) ends, the second period S2 (period of the read operation of the focus detection pixel group) starts from time t14. During the second period S2, the focus detection pixel group (the plurality of focus detection pixel rows V4, V8, and V12) is operated similarly to the imaging pixel group described with reference to FIG. 5 during the first period S1. read operation.

In this example, imaging pixel rows ( V3 , V5 , V7 , V9 , and V11 ) and focus detection pixel rows ( V4 , V8 , and V12 ) are arranged adjacent to each other. The charge accumulation period of each of the imaging pixel rows and focus detection pixel rows arranged adjacent to each other is controlled in such a manner that after the charge accumulation period of each photoelectric conversion unit included in one pixel row ends, the other pixel row starts The charge accumulation period of each photoelectric conversion unit included in .

When the above-described signal reading sequence of the pixel section 100 is performed, for example, during the first period S1, charge leakage from the pixel row V4 to the pixel rows V3 and V5 arranged adjacent to the pixel row V4 occurs. For this reason, in some cases, adverse effects such as noise may affect the signal output to the signal line 115 from the pixel rows ( V3 and V5 ) arranged adjacent to the pixel row V4 .

It should be noted that, as in FIG. 4 , the other imaging pixel rows (from V5 to V10 ) among the imaging pixel rows are arranged last among the plurality of imaging pixel rows (among the first pixel group) to perform the read operation (or last Between the pixel row V11 in which the charge accumulation period Ts is started, and the focus detection pixel row V4 in which the read operation is first performed (or the charge accumulation period Ts is first started) among the plurality of focus detection pixel rows (among the second pixel group) In the case of , adverse effects become more prominent. When the amount of light reception is too large relative to the amount of charge that can be accumulated in the photoelectric conversion unit 103 , particularly in the case of obtaining an image of a subject of high luminance, when the empty period Tnu is too long relative to the charge accumulation period Ts, etc. , adverse effects may frequently occur. In the case where the charge accumulation period of each pixel is controlled by an electronic shutter operation, the above phenomenon often occurs. However, adverse effects may also occur in cases other than the case where the electronic shutter is operated, the case where an image of a subject with high brightness is obtained, and the like.

As shown in FIGS. 4 and 5 , during the first period S1 , the pixel row V4 (focus detection pixel row) is placed in a null period Tnu. For this reason, in some cases, when the read operation is performed on the pixel rows (imaging pixel rows) V3 and V5 adjacent to the pixel row (focus detection pixel row) V4, charges may leak from the pixels in the pixel row V4 to pixels in pixel rows V3 and V5, and this adverse effect may affect the signals read out from pixel rows V3 and V5.

FIG. 6 shows driving timing according to this exemplary embodiment. The difference from the driving timing of FIG. 5 is that during the output period Top in the pixel row V3 (before the end of the output period Top), the pixels in the pixel row V4 adjacent to the pixel row V3 are reset. That is, in the example of FIG. 6 , during the period from the start of the charge accumulation period in one pixel row among two adjacent pixel rows (V3 and V4, or V4 and V5) until the end of the output period Top, the reset Each photoelectric conversion unit in another pixel row.

Specifically, according to the features of the present exemplary embodiment, at least one of the following three operations is performed.

The first operation is an operation for resetting the photoelectric conversion units in the pixel row V4 during the output period Top (period t9 to t10 ) in the pixel row V3 (before the end of the output period Top). Specifically, the drive pulses pRES4 and pTX4 are set at high level. Therefore, leakage of charge from the pixel row V4 to the pixel row V3 can be reduced. Specifically, during the output period of the pixel row V3 , signals output to the signal line 115 from the respective pixels 101 constituting the pixel row V3 depend on the charges transferred to the FD 108 . For this reason, through the above-described reset operation, it is possible to reduce leakage of charges from the photoelectric conversion units in the pixel row V4 to the FDs in the pixel row V3.

The second operation is an operation for resetting the photoelectric conversion units in the pixel row V4 during the output period Top (period t12 to t13 ) in the pixel row V5 (before the end of the output period Top) (not shown). Specifically, during the period t12 to t13, the drive pulses pRES4 and pTX4 are placed at a high level. Therefore, leakage of charges from the pixel row V4 to the pixel row V5 can be reduced.

The third operation is an operation for resetting the photoelectric conversion unit of one of the pixel rows V3 and V5 during the output period Top (period t17 to t18 ) in the pixel row V4 (before the end of the output period Top). Specifically, during the period t17 to t18, the driving pulses pRES3 and pTX3 or the driving pulses pRES5 and pTX5 are placed at a high level. Therefore, leakage of charge from at least one of the pixel rows V3 and V5 to the pixel row V4 can be reduced.

Here, in the case where the first operation is compared with the second operation, the reset in the pixel row V4 may preferably be performed during the output period in the pixel row V3 in which the reading operation was previously performed. This is because, in both of the adjacent pixel rows V3 and V5, the above-mentioned effects can be caused accordingly. The same applies to the following exemplary embodiments as well.

Also, the three operations described above may be performed, but only the first operation is more preferably performed. This is because the signal output from the focus detection pixel s is not required to be highly accurate compared to the signal output from the imaging pixel. The reason why the first operation is better than the second operation is as described above.

The reset operation according to the present exemplary embodiment can also be applied to the pixel rows V8 and V12 for which the read operation is performed during the second period S2, as described in the pixel row V4.

Furthermore, according to the present exemplary embodiment, the pixel group performing the reading operation during the first period S1 and the third period S3 is set as an imaging pixel group, and the reading operation is performed during the second period S2 and the fourth period S4 The pixel group of is set as the focus detection pixel group, but the reverse configuration is also possible. That is, according to the present exemplary embodiment, the first period or the second period set in one frame period may come contextually first, and the second period S2 may be set before or after the first period S1.

Furthermore, according to the present exemplary embodiment, after the reading operation of the imaging pixel group is performed, the reading operation of the focus detection pixel group is performed, but the order is not limited to this prescribed order. For example, after the read operation of one pixel group is performed multiple times, the read operation of other pixel groups may be performed. In this case, for example, after the first period S1, the first period S1 occurs again during one frame, and thereafter, the second period S2 occurs.

Furthermore, according to the present exemplary embodiment, an example in which the pixels constituting the pixel section 100 are imaging pixels and focus detection pixels has been illustrated, but even in the case where the pixels constituting the pixel section 100 are only imaging pixels or only focus detection pixels , and also achieve the effect described according to this exemplary embodiment. For example, the above-mentioned effect can also be achieved by performing the reset operation according to the present exemplary embodiment in the case where the pixel section 100 is constituted only by a plurality of imaging pixel rows, and during the first period S1, part of the pixel row is removed. A predetermined pixel row is subjected to a read operation, and during the second period S2, the portion of the pixel row is subjected to a read operation.

According to the present exemplary embodiment, during the output period Top in a specific pixel row, when a pixel row located adjacent to the specific pixel row corresponds to the empty period Tnu, the output from the above-mentioned specific pixel row to the signal line can be reduced. Signal effects (such as noise).

second exemplary embodiment

Referring to FIG. 7 , an imaging device according to the present exemplary embodiment will be described.

The difference between the driving timing according to the present exemplary embodiment illustrated in FIG. 7 and the driving timing illustrated in FIG. 6 according to the first exemplary embodiment is timing when a reset operation is performed. According to the present exemplary embodiment, at the same time as the reset operation of the charge accumulation period of the imaging pixel row is started, the photoelectric conversion units in the focus detection pixel row V4 adjacent to the imaging pixel row are reset. Specifically, during the period t0 to t1 corresponding to the reset period Tres in the imaging pixel row V3, the drive pulses pRES4 and pTX4 in the focus detection pixel row V4 are set to high level.

Therefore, the start of the charge accumulation period Ts in the pixel row V3 and the start of the empty period Tnu in the pixel row V4 can be synchronized with each other. For this reason, it is possible to reduce the possibility of leakage of charges from the pixel row V4 to the pixel row V3 during the charge accumulation period Ts in the imaging pixel row V3.

In addition, at least one of the imaging pixel rows V3 and V5 can be reset at the same time as the reset operation of the charge accumulation period Ts in the pixel row V4 is started. Specifically, as shown in FIG. 7 , the imaging pixel rows V3 and V5 may be reset during the reset period Tres (period t14 to t15 ) in the pixel row V4.

According to the present exemplary embodiment, similar effects to those of the first exemplary embodiment can be achieved. Furthermore, according to the present exemplary embodiment, the control signals pTX3 and pRES3 in the pixel row V3 adjacent to the pixel row V4 or the control signals pTX5 and pRES5 in the pixel row V5 adjacent to the pixel row V4 are used as the control signals pTX5 and pRES5 in the pixel row V4. The control signals pTX4 and pRES4. Therefore, the control unit 160 does not need to generate a new control signal.

third exemplary embodiment

Referring to FIG. 8 , an imaging device according to the present exemplary embodiment will be described. The difference between the driving timing according to the present exemplary embodiment illustrated in FIG. 8 and the driving timing illustrated in FIG. 6 according to the first exemplary embodiment is that the charge accumulation period Ts (period t1 During the period to t9), the photoelectric conversion units in the focus detection pixel row V4 are reset. According to the present exemplary embodiment, it is also possible to reduce charge leakage from pixels in the focus detection pixel row V4 to pixels in the imaging pixel row V3. In addition, the photoelectric conversion units in the imaging pixel rows V3 and V5 may be reset during the charge accumulation period Ts (period t15 to t17) in the focus detection pixel row similarly to the above-described exemplary embodiment. It should be noted that, preferably, during the charge accumulation period Ts in the focus detection pixel row, the photoelectric conversion units of each of the imaging pixel row V3 and the imaging pixel row V5 are simultaneously reset.

According to this exemplary embodiment, similar effects to the above-described exemplary embodiments can also be achieved.

Fourth Exemplary Embodiment

Referring to FIG. 9 , an imaging device according to the present exemplary embodiment will be described.

The difference between the driving timing illustrated in FIG. 9 according to the present exemplary embodiment and that illustrated in FIG. 6 according to the first exemplary embodiment is timing for performing a reset operation. Specifically, the difference is that the photoelectric conversion units in the pixel row V4 are reset during at least a part of the period from time t18 until time t19, which corresponds to the end of the output period Top in the focus detection pixel row V4, and time t19 corresponds to the start of the reset period Tres in the imaging pixel row V3. According to the present exemplary embodiment, it is also possible to reduce charge leakage from pixels in the focus detection pixel row V4 to pixels in the imaging pixel row V3. The photoelectric conversion units in the pixel row V3 may be reset during at least a part of the period from time t10 corresponding to the end of the output period Top in the imaging pixel row V3 to time t14 corresponding to the focus detection pixel row Start of reset period Tres in V4. In addition, the photoelectric conversion units in the pixel row V5 may be reset during at least a part of the period from time t13 corresponding to the end of the output period Top in the imaging pixel row V5 to time t14 corresponding to focus detection Start of reset period Tres in pixel row V4.

According to this exemplary embodiment, similar effects to those of the first exemplary embodiment can also be achieved.

Fifth Exemplary Embodiment

Referring to FIG. 10 , an imaging device according to the present exemplary embodiment will be described.

The difference between the driving timing illustrated in FIG. 10 according to the present exemplary embodiment and that illustrated in FIG. 6 according to the first exemplary embodiment is that the charge accumulation period Ts and During all periods of the output period Top, the photoelectric conversion units in the pixel row V4 are kept reset. According to the present exemplary embodiment, since most charges generated during the empty period Tnu in the pixel row V4 are reset, leakage of charges to the pixel row V3 adjacent to the pixel row V4 can be reduced compared to the above-described exemplary embodiment. and V5.

Furthermore, as shown in FIG. 10 , according to the present exemplary embodiment, an operation similar to the reset operation performed on the pixel row V4 described above can also be performed on the imaging pixel rows V3 and V5 .

Sixth Exemplary Embodiment

As the driving timing of the present exemplary embodiment, FIG. 11 illustrates a modified example of the driving timing of FIG. 7 . Here, FIG. 7 is used as an example, but drawings other than FIG. 7 may also be used. Descriptions about driving similar to the driving timing chart of FIG. 7 will be omitted.

According to this exemplary embodiment, the pixels in the imaging pixel row V1 and the pixels in the imaging pixel row V2 illustrated in FIG. 3 use the FD 108 in common. The pixels in the imaging pixel row V3 and the pixels in the focus detection pixel row V4 use the FD108 in common. In the following pixel row, in the same order, two pixels share FD108. Therefore, FD 108 is used in common for pixels in a part of the plurality of imaging pixel rows and pixels in the focus detection pixel row.

As for the pixels in other parts (for example, V1 ) of the plurality of imaging pixel rows, the FD is shared by common pixels in the imaging pixel rows. In addition to the above, a configuration may be adopted in which the FD 108 is used in common for pixels in a part of the imaging pixel row and pixels in the pixel row for purposes other than imaging or focus detection.

According to the present exemplary embodiment, pixels that commonly use the FD 108 commonly use the reset transistor 105 , the amplification transistor 106 , and the selection transistor 107 . For this reason, reset operations in the imaging pixel row V3 and the focus detection pixel row V4 are controlled by the drive pulses pSEL3 and pRES3.

During the period t7 to t10 in the first period S1, by turning OFF the drive pulse pTX4, the signal in the focus detection pixel row V4 is not output to the FD108, and the period t7 to t10 is a period from which the imaging pixels A period from time t7 when the drive pulse pRES3 of FD reset in rows V3 and V4 is turned OFF, until time t10 when the output period Top ends.

Therefore, when a noise signal in the imaging pixel row V3 is output, or when a signal in the imaging pixel row V3 is output, the signal in the focus detection pixel row V4 is suppressed from being mixed. Here, the description has been made while the first period of time is used as an example. During the period t22 to t18 in the second period S2, by turning off pRES3, a similar effect can be achieved.

It should be noted that according to the present exemplary embodiment, the timing when the drive pulse pTX4 or pTX3 is turned from ON to OFF in the first period S1 and the second period S2 is the same timing as the timing when the reset operation of the FD 108 ends. In case, the potential fluctuation of FD108 is caused by the coupling capacitance of the transfer transistor 104 and the gate of the FD108, and the return charge generated when the transfer transistor 104 is turned off, and noise may be generated, in which, the moment when the reset operation of the FD108 ends Closest to the output period, in the output period, signals from pixels in a part of each pixel row are output during each period.

In view of the above, in the first period S1 and the second period S2, the timing when the drive pulse pTX4 or pTX3 is turned from ON to OFF is preferably set to be before the timing when the reset operation of the FD108 ends, and the reset of the FD108 The timing when the operation ends is closest to the output period in which signals from pixels in a part of each pixel row are output during each period.

Preferably, no operation for turning the drive pulse pTX4 or pTX3 from ON to OFF is performed during the horizontal scanning period HD, which includes the time when the reset operation of the FD108 ends, the time when the reset operation of the FD108 ends Closest to the output period, in the output period, signals from pixels in a part of the respective pixel rows are output in the first period S1 and the second period S2. In this case, for example, the above-described operation is performed during the last horizontal scanning period HD preceding the above-described horizontal scanning period HD. Therefore, noise generated when the potential of the FD fluctuates can be suppressed.

As an alternative to the above, as shown in FIG. 12 , in the case where the capacitance of the FD is 3 fF to 6 fF, before 9 μs or more elapses from the time when the reset operation of the FD 108 ends, in the first period S1 and the second In the second period S2, the operation for turning the drive pulse pTX4 or pTX3 from ON to OFF is not performed, and the time when the reset operation of the FD108 ends is closest to the output period in which pixels from a part of each pixel row signal is output. According to the above structure, the potential fluctuation of the FD 108 caused by turning OFF the driving pulse pTX4 or pTX3 is suppressed. Therefore, kTC noise included in the output signal can be suppressed.

The present invention has been described above through specific exemplary embodiments, but the present invention is not limited to each exemplary embodiment, and can be appropriately modified and combined within the concept of the present invention.

The mutually different reset periods are set according to the first to fourth exemplary embodiments, but the respective reset periods may be appropriately combined with each other to be implemented.

Furthermore, since the reset operation is sequentially performed for each pixel row according to each exemplary embodiment, a signal is read out through a rolling shutter operation in which a charge accumulation period is different for each pixel row. However, a global electronic shutter operation in which the charge accumulation period is set to be the same may be performed. Instead, an operation in which the charge accumulation period differs for every plurality of pixel rows may be performed.

In the global electronic shutter operation, for example, the start timing of the accumulation period Ts in all imaging pixel rows may be set to be the same, and the end timing of the accumulation period Ts in all imaging pixel rows may also be set to be the same. Furthermore, regarding the focus detection pixel rows, the start timing of the accumulation period Ts in all the focus detection pixel rows may also be set to be the same, and during a different period (non-overlapping period) from the accumulation period Ts in the imaging pixel rows , the end times of the accumulation period Ts may be set to be the same.

Furthermore, according to the above-described respective exemplary embodiments, an example in which a single focus detection pixel row ( V4 ) is arranged between two imaging pixel rows ( V3 and V5 ) has been illustrated, but a plurality of focus detection pixel rows ( V4 ) are also Can be arranged between two imaging pixel rows (V3 and V5).

In addition, the position of the focus detection pixel row is not particularly limited as long as the focus detection pixel row is adjacent to at least one of the imaging pixel rows. For example, a mode may be employed in which one or more focus detection pixel rows are arranged at the farthest end of the pixel section 100 instead of being arranged between two imaging pixel rows ( V3 and V5 ). For example, in the case where n pixel rows ( V1 to Vn) are arranged in the pixel section 100 , the pixel row V1 and/or the pixel row Vn may be set as the focus detection pixel row. Also, for example, the pixel row V1 to the pixel row V5 and/or the pixel row Vn-4 to the pixel row Vn may be set as the focus detection pixel row. Furthermore, according to the respective exemplary embodiments described above, the imaging pixel group and the focus detection pixel group are provided as a combination of the respective pixel groups, but the configuration is not limited thereto. For example, the focus detection pixel group may be replaced by a pixel group configured to detect temperature or a pixel group configured to detect nearby infrared rays.

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the appended claims should be given the broadest interpretation to cover all such modifications and equivalent structures and functions.

Claims (18)

1. a driving method for camera head, described camera head includes multiple pixel column, and each pixel column includes multiple pixel, and each pixel includes photoelectric conversion unit, and described driving method comprises the following steps:

By in the way of the first period terminated to start for the second period afterwards, control described first period during the frame period and described second period, the accumulation of electric charge from each photoelectric conversion unit started in the first pixel column of described first period, until terminating to read the signal based on the electric charge in each photoelectric conversion unit described first pixel column from described first pixel column, the accumulation of electric charge from each photoelectric conversion unit starting to be arranged in the second pixel column contiguous with described first pixel column of described second period, until terminating to read the signal based on the electric charge in each photoelectric conversion unit described second pixel column from described second pixel column, and

During read described first period before the end of described signal from described first pixel column, reset each photoelectric conversion unit in described second pixel column。

2. the driving method of camera head according to claim 1,

Wherein, by the electric charge of accumulation in the photoelectric conversion unit of the pixel sequentially resetted in each first pixel column for each row, start the accumulation of electric charge in the plurality of first pixel column, and by sequentially transmitting the electric charge of accumulation in the photoelectric conversion unit of the pixel in described each first pixel column for each row, terminate the accumulation of electric charge in the plurality of first, and

Wherein, by the electric charge of accumulation in the photoelectric conversion unit of the pixel sequentially resetted in each second pixel column for each row, start the accumulation of electric charge in the plurality of second pixel column, and by sequentially transmitting in the photoelectric conversion unit of the pixel in described each second pixel column the electric charge of accumulation for each row, terminate the accumulation of electric charge in the plurality of second pixel column。

3. the driving method of camera head according to claim 2,

Wherein, while when the reset operation of the accumulation carried out for starting the electric charge in described first pixel column, the photoelectric conversion unit of the pixel resetted in described second pixel column contiguous with described first pixel column。

4. the driving method for camera head according to any one of claim 1 to 3,

Wherein, from the accumulation of the electric charge terminated in described first pixel column, until the end at least some of period to the period of the reading of the signal in described first pixel column, reset the photoelectric conversion unit with the pixel in described second pixel column of described first pixel column vicinity。

5. the driving method of camera head according to any one of claim 1 to 3,

Wherein, during from terminating to read signal from described first pixel column, until the period of the accumulation of the electric charge started in described second pixel column contiguous with described first pixel column, the photoelectric conversion unit of the pixel resetted in described second pixel column。

6. the driving method of camera head according to any one of claim 1 to 3,

Wherein, except from the accumulation of the electric charge started in described second pixel column until during terminating the period except the period of the reading of signal, making the photoelectric conversion unit of the pixel in described second pixel column remain and be reset。

7. the driving method of camera head according to any one of claim 1 to 3,

Wherein, described first pixel column includes imaging pixels, and described second pixel column includes focus detection pixel。

8. the driving method of camera head according to any one of claim 1 to 3,

Wherein, during whole described first period, the photoelectric conversion unit of the pixel resetted in described second pixel column。

9. the driving method of camera head according to any one of claim 1 to 3,

Wherein, the plurality of pixel column includes multiple first pixel column and multiple second pixel columns fewer than described first pixel column, and

Wherein, a pixel column in the middle of the plurality of first pixel column, it is arranged to and each vicinity in the plurality of second pixel column。

10. the driving method of camera head according to claim 9,

Wherein, other pixel columns in the middle of the plurality of first pixel column are disposed in, during the one frame period, between the pixel column of the accumulation being first begin to electric charge in the middle of the pixel column of the accumulation finally starting electric charge in the middle of the plurality of first pixel column and the plurality of second pixel column。

11. the driving method of camera head according to claim 10,

Wherein, at least some of pixel column in the middle of the plurality of first pixel column is disposed in, between a pixel column and other pixel columns in the middle of the plurality of second pixel column。

12. the driving method of camera head according to claim 11,

Wherein, for each row, sequentially start the accumulation of electric charge in each photoelectric conversion unit in the plurality of first pixel column, and for each row, sequentially start the accumulation of electric charge in each photoelectric conversion unit in the plurality of second pixel column。

13. a driving method for camera head, described camera head includes multiple pixel column, and each pixel column includes multiple pixel, and each pixel includes photoelectric conversion unit,

The plurality of pixel column includes the first pixel groups and the second pixel groups, and described first pixel groups is made up of multiple first pixel columns, and described second pixel groups is made up of multiple second pixel columns, and

A pixel column in the middle of the plurality of second pixel column be arranged to the plurality of first pixel column in the middle of at least one pixel column contiguous, described driving method comprises the following steps:

It is controlled, after the charge accumulation period of each photoelectric conversion unit of described first pixel groups terminates, starts the charge accumulation period of each photoelectric conversion unit of described second pixel groups, and

Reset each photoelectric conversion unit at least one pixel column described in the middle of the plurality of first pixel column, to start the charge accumulation period of each photoelectric conversion unit at least one pixel column described, and reset simultaneously with described first pixel column in the middle of contiguous the plurality of second pixel column of at least one pixel column described in the middle of one pixel column in each photoelectric conversion unit。

14. a camera head, described camera head includes:

Multiple pixel columns, each pixel column includes multiple pixel, and each pixel includes photoelectric conversion unit；And

Control unit,

Wherein, described control unit

By in the way of the first period terminated to start for the second period afterwards, control described first period during a frame period and described second period, the accumulation of electric charge from each photoelectric conversion unit started in the first pixel column of described first period, until terminating to read the signal based on the electric charge in each photoelectric conversion unit described first pixel column from described first pixel column, the accumulation of electric charge from each photoelectric conversion unit starting to be arranged in the second pixel column contiguous with described first pixel column of described second period, until terminating to read the signal based on the electric charge in each photoelectric conversion unit described second pixel column from described second pixel column, and

During read described first period before the end of described signal from described first pixel column, reset each photoelectric conversion unit in described second pixel column。

15. camera head according to claim 14,

Wherein, the plurality of pixel column includes multiple first pixel column and multiple second pixel columns fewer than described first pixel column, and

Wherein, a pixel column in the middle of the plurality of first pixel column is arranged to and each vicinity in the plurality of second pixel column。

16. camera head according to claim 15,

Wherein, other pixel columns in the middle of the plurality of first pixel column are disposed in, during a frame period, between the pixel column of the accumulation being first begin to electric charge in the middle of the pixel column of the accumulation finally starting electric charge in the middle of the plurality of first pixel column and the plurality of second pixel column。

17. camera head according to claim 16,

Wherein, at least some of pixel column in the middle of the plurality of first pixel column, it is disposed between a pixel column and other pixel columns in the middle of the plurality of second pixel column。

18. the camera head according to any one of claim 14 to 17,

Wherein, each in the plurality of pixel includes floating diffusion, and

Wherein, a part for the pixel in a part for the pixel in the plurality of first pixel column and the plurality of second pixel column, it is used in conjunction with floating diffusion。