CN105703650A - Parallel control method employing selective harmonic elimination pulse width modulation (SHEPWM) for multiple T-type three-level inverters - Google Patents

Abstract

The invention discloses a parallel control method for multiple T-type three-level inverters using SHEPWM, which includes the following steps: determining the number of switching angles in each cycle according to the number of harmonics to be eliminated; The particle swarm optimization method solves the switching angle of the specific harmonic elimination pulse width modulation, and generates the corresponding specific harmonic elimination pulse width modulation signal; collects the midpoint voltage and zero-sequence circulating current of the T-type three-level inverter parallel system; sets Sequence: Carry out small vector control on the specific harmonic elimination pulse width modulation signal according to the set timing according to the midpoint voltage or zero-sequence circulating current, and rewrite the specific harmonic elimination pulse width modulation signal. The invention controls the midpoint voltage or the zero-sequence circulating current according to the set time sequence. Since the midpoints of multiple inverters are connected, as long as the midpoint voltage of any one of the inverters is well controlled at a certain moment, the midpoint voltage of the system will be balanced.

Description

A parallel control method for multiple T-type three-level inverters using SHEPWM

technical field

The invention relates to a parallel control method for multiple T-type three-level inverters using SHEPWM.

Background technique

With the large-scale access of distributed energy sources including photovoltaic power generation systems to the low-voltage distribution network, the power grid puts forward higher requirements on the output current waveform quality of grid-connected inverters. It is difficult for traditional two-level grid-connected inverters to meet large-scale Grid high power quality requirements. The emergence of the T-type three-level grid-connected inverter solves the above problems. As shown in Figure 2, compared with the traditional two-level inverter, the inverter has the advantages of small harmonics, low switching loss, and small electromagnetic interference; Compared with the traditional diode-clamped three-level inverter, the inverter has the advantages of less number of switches, small conduction loss and uniform power loss; and the switching frequency of the T-type three-level inverter is 4kHz to 30kHz among the most efficient. Therefore, the T-type three-level inverter has been widely used in distributed power generation occasions such as photovoltaic power generation and micro-grid, but capacity has always been the bottleneck restricting its rapid development.

The parallel connection of multi-unit T-type three-level grid-connected inverters can increase system capacity, reliability and efficiency, and has become an important choice for high-power distributed power generation. However, hardware mismatch between modules, dead time and control algorithm execution Time and other differences will produce circulation. Circulating current will increase system loss and cause grid-connected current distortion, seriously affecting the life of IGBT switch tubes. Therefore, it is of great significance to study the circulating current suppression of parallel T-type three-level inverters.

Compared with sinusoidal pulse width modulation (SPWM) and space vector pulse width modulation (SVPWM) modulation, specific harmonic elimination method (SHEPWM) has a series of advantages such as low switching frequency, low switching loss, good output voltage quality and low loss. Suitable for high-power occasions, it is a modulation method often used in the field of power electronics to eliminate low-order harmonics.

Contents of the invention

In order to solve the above problems, the present invention proposes a multiple T-type three-level inverter parallel control method using SHEPWM. The present invention studies the key technology of the three-level inverter parallel system. The mid-point voltage balance problem on the DC side is analyzed in detail. Aiming at the advantages of parallel connection of SHEPWM and T-type three-level inverters, a new SHEPWM method suitable for the parallel connection of multiple T-type three-level inverters is proposed. The system calculates the switching angle by the traditional SHEPWM related formula, and then adds a small vector replacement system after the modulation of the traditional three-phase SHEPWM. In the parallel system, the inverters control the midpoint voltage or zero-sequence circulating current according to the set time sequence. Since the midpoints of multiple inverters are connected, as long as the midpoint voltage of any one of the inverters is well controlled at a certain moment, the midpoint voltage of the system will be balanced. At this time, other inverters calculate and control the zero-sequence circulating current by measuring the output current. The proposed method does not affect the line voltage waveform output by the inverter, so it has the same function of eliminating low-order harmonics as the traditional SHEPWM, and can effectively suppress the circulating current, making the T-type three-level inverter parallel system stable and efficient run.

In order to achieve the above object, the present invention adopts the following technical solutions:

A parallel control method for multiple T-type three-level inverters using SHEPWM, comprising the following steps:

(1) Determine the number of switching angles per cycle according to the number of harmonic orders that need to be eliminated;

(2) Based on the multi-objective particle swarm optimization method, the switching angle of the specific harmonic elimination pulse width modulation is solved, and the corresponding specific harmonic elimination pulse width modulation signal is generated;

(3) Collect the midpoint voltage and zero-sequence circulating current of the T-type three-level inverter parallel system;

(4) Set the timing sequence, perform small vector control on the specific harmonic elimination pulse width modulation signal according to the midpoint voltage or zero-sequence circulating current according to the set timing sequence, and rewrite the specific harmonic elimination pulse width modulation signal.

In the step (1), the number of switching angles in each quarter cycle is the number of harmonics to be eliminated plus 1.

If you want to eliminate N-1 specific harmonic components, you need to set N switching angles to form N independent equations, so that while selecting the amplitude of the fundamental wave, you can also eliminate N-1 desired harmonic components. Harmonic components.

In the step (2), a multi-objective particle swarm optimization (MOPSO) algorithm is used to solve the three-level specific harmonic elimination pulse width modulation switching angle.

In the step (4), the period of the parallel system is set as T. When n inverters are running in parallel, in each period T of the parallel system: the i-th inverter is at (i-1)T/n～ It is responsible for controlling the midpoint voltage during the iT/n time period, and is responsible for controlling the zero-sequence circulating current in other periods.

In the step (4), when controlling the midpoint voltage, if the midpoint voltage of the T-type three-level inverter is within the threshold range, the T-type three-level inverter will not be changed, so that it directly enters the three-level inverter. Otherwise, modify the switch state to a small vector signal, and rewrite the pulse width modulation signal for specific harmonic elimination.

Further, in the step (4), when the absolute value of the midpoint voltage is greater than the midpoint voltage threshold, if the midpoint voltage is greater than zero, the switch state is changed to an N-type small vector; if the midpoint voltage is less than zero, the switch state is It is changed to a P-type small vector, and when the absolute value of the midpoint voltage is less than the midpoint voltage threshold, the switch state does not change.

In the step (4), when controlling the zero-sequence circulating current, if the zero-sequence circulating current exceeds the threshold range, if the zero-sequence circulating current is greater than zero, the switch state is changed to an N-type small vector, and if the zero-sequence circulating current is less than zero, the switch state is changed It is a P-type small vector, if the zero-sequence circulating current is within the threshold range, the switch state does not change.

A parallel control method for multiple T-type three-level inverters using SHEPWM, including a specific harmonic elimination pulse width modulation signal generator, a small vector controller, a switch group, a PWM signal generator and a T-type three-level inverter Inverter parallel connection system, wherein, the T-type three-level inverter parallel system includes multiple T-type three-level inverters, and all T-type three-level inverters share the AC and DC bus and are connected in parallel with each other;

The specific harmonic elimination pulse width modulation signal generator outputs a specific harmonic elimination pulse width modulation signal to the switch group, and the small vector controller collects the midpoint voltage and zero-sequence circulating current of the T-type three-level inverter parallel system , according to the set timing, respectively control the midpoint voltage and zero-sequence circulating current, and judge whether they are within their respective set thresholds; according to the magnitude of the midpoint voltage and zero-sequence circulating current, confirm whether to eliminate the specific harmonic pulse width The modulation signal is rewritten, and the control signal is generated by the PWM signal generator to control the switching device of the T-type three-level inverter parallel system.

Further, the small vector controller judges according to the midpoint voltage, if the midpoint voltage is within the set threshold range, the state of the switch group is not changed, and the specific harmonic elimination pulse width modulation signal is generated by the PWM signal generator Control signal to control the switching devices of the T-type three-level inverter parallel system;

If the midpoint voltage is not within the set threshold range, the small vector controller changes the state of the switch group, so that the specific harmonic elimination pulse width modulation signal is changed into a small voltage vector, and the control signal is generated by the PWM signal generator to control the T-type three-level Switching devices for inverter parallel systems.

The midpoint voltage is half of the voltage difference between the two capacitors connected in parallel at the DC side of the T-shaped three-level inverter.

When the absolute value of the midpoint voltage is greater than the midpoint voltage threshold, if the midpoint voltage is greater than zero, the switch state is changed to an N-type small vector; if the midpoint voltage is less than zero, the switch state is changed to a P-type small vector.

When the small vector controller controls according to the zero-sequence circulating current, if the zero-sequence circulating current exceeds the threshold range, if the zero-sequence circulating current is greater than zero, the switch state is changed to N-type small vector, and if the zero-sequence circulating current is less than zero, the switch state is changed to For P-type small vectors, if the zero-sequence circulating current is within the threshold range, the switch state does not change.

The beneficial effects of the present invention are:

(1) The SHEPWM control method in the present invention can limit the midpoint voltage to a smaller fluctuation area, and quickly restore the balance when the midpoint voltage deviates from the balance point, which is basically the same as the traditional SHEPWM's ability to eliminate specific harmonics.

(2) The T-type three-level inverter parallel system using SHEPWM in the present invention has the advantages of small three-level topology harmonic content and high system efficiency, and also has good maintainability and high redundancy of the parallel system , The advantage of easy expansion.

(3) The T-type three-level inverter parallel system using SHEPWM in the present invention well solves the problem of circulating current suppression and the problem of neutral point voltage balance.

Description of drawings

Figure 1 is a topology diagram of a parallel system with multiple three-level inverters;

Figure 2 is a topology diagram of a three-level inverter;

Figure 3 is a typical waveform of the three-level inverter SHEPWM;

Figure 4 is a schematic diagram of the influence of a small vector on the midpoint voltage;

Figure 5(a) is a schematic diagram of the influence of the large voltage vector [PPN] on the midpoint voltage of the three-level inverter.

Figure 5(b) is a schematic diagram of the influence of the medium voltage vector [PON] on the midpoint voltage of the three-level inverter;

Figure 5(c) is a schematic diagram of the influence of the zero voltage vector [PPP] on the midpoint voltage of the three-level inverter;

Figure 5(d) is a schematic diagram of the influence of the P-type small voltage vector [POO] on the midpoint voltage of the three-level inverter;

Figure 5(e)) is a schematic diagram of the influence of the N-type small voltage vector [ONN] on the midpoint voltage of the three-level inverter;

Fig. 6 is the control principle of the midpoint voltage in the T-type three-level inverter by the proposed specific harmonic elimination method;

Fig. 7 is the control flowchart of the midpoint voltage in the T-type three-level inverter of the proposed specific harmonic elimination method;

Figure 8 shows the control principle of the zero-sequence current in the T-type three-level inverter by the proposed specific harmonic elimination method;

Fig. 9 is the control flowchart of the zero-sequence current in the T-type three-level inverter of the proposed specific harmonic elimination method;

Figure 10 shows the grid-side voltage and output current of the parallel system of three inverters;

Figure 11(a) is the simulation result of the first inverter;

Figure 11(b) is the simulation result of the second inverter;

Figure 11(c) is the simulation result of the third inverter;

Figure 12 is the harmonic analysis of the simulation results of the inverter output voltage;

Figure 13(a) is the simulation result of the first inverter, where the solid line represents the voltage value of the upper capacitor, and the dotted line represents the voltage value of the lower capacitor (the same below);

Figure 13(b) is the simulation result of the second inverter;

Figure 13(c) is the simulation result of the third inverter;

Figure 14 shows the simulation results of the zero-sequence currents of the three inverters.

detailed description:

The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

As shown in Figure 1, the topology diagram of the three-level inverter parallel system is shown in Figure 1. Multiple inverters share the AC and DC busbars, and P and N are the positive and negative busbars of the parallel system; A, B, and C are parallel The three-phase grid-connected point of the system; aj, bj, cj are the AC terminals output by the inverter, C _j1 and C _j2 are two capacitors connected in parallel with the DC side, the midpoint is Z _j , the system uses an L filter, and the filter inductor is L _i , the zero-sequence current is i _zj , and i _mj is the m-phase output current of the jth inverter, m=a, b, c, j=1, 2,; i _A , i _B , i _C are System grid current.

The inverter control strategy is described with a single inverter structure as shown in Figure 2. Two capacitors C ₁ and C ₂ are connected in series on the DC side to create a midpoint Z, so that the switches of the upper device and the lower device of the inverter will generate positive and negative levels. The three phases a, b, and c are each connected with four switching devices with anti-parallel diodes, and supply power to the three-phase load through L _A , L _B , and L _C . Each half-bridge inverter has three states: the upper arm switching device is turned on, the lower arm switching device is turned on, and the auxiliary switching device is turned on, and outputs positive level, negative level, and zero level respectively. A kind of multiple T-type three-level inverter parallel control method that adopts SHEPWM among the present invention mainly comprises the following steps:

(1) Determine the number of switching angles in each quarter cycle according to the number of harmonic times eliminated;

(2) Calculate the switch angle according to the traditional SHEPWM principle;

(3) Add a small vector control system to control the midpoint voltage and circulation after the modulation of the traditional three-phase SHEPWM;

(4) Multiple inverters share the AC and DC bus to realize parallel operation.

(5) In the parallel system, the inverter controls the midpoint voltage or zero-sequence circulating current according to the set time sequence.

In step (1), if you want to eliminate N-1 specific harmonic components, you need to set N switching angles, and you can form N independent equations, so that while selecting the amplitude of the fundamental wave, you can also eliminate N -1 harmonic component that you wish to eliminate.

In step (2), the multi-objective particle swarm optimization (MOPSO) algorithm is used to solve the switching angle of the three-level SHEPWM.

In step (3), the SHEPWM switch signal is generated by a traditional SHEPWM signal generator, and then a small vector replacer is added. When the switch state of the small voltage vector appears, the small voltage vector replacement system replaces the small vector by detecting the midpoint voltage and the direction of the circulating current; when the switch state of the small voltage vector does not appear, the small vector replacement system does not change the switch state.

In step (4), multiple inverters share the AC and DC bus to realize parallel operation.

In the step (5), the period of the parallel system is set as T=0.02s. When n inverters are running in parallel, in each cycle T of the parallel system: the i-th inverter is responsible for controlling the midpoint voltage V _Zi during the period of (i-1)T/n～iT/n, and the other The period is responsible for controlling the zero-sequence circulating current i _Zi .

Inverter control strategy responsible for controlling zero-sequence circulating current: when i _Z is greater than the set circulating current threshold I _range , if i _Z >0, the switch state is changed to an N-type small vector; if i _Z <0, the switch state is changed to Change to P-type small vector. When |i _Z |<I _range , the switch state does not change.

Inverter control strategy responsible for controlling the midpoint voltage: when |V _Z2 |>V _range , if V _Z2 >0, the switch state is changed to N-type small vector; if V _Z2 <0, the switch state is changed to P small vector. When |V _Z2 |<V _range , the switch state does not change.

The traditional SHEPWM modulation method is to calculate the N switching angles in each quarter cycle. In order to solve the N switching angles, it is necessary to form N equations, of which N-1 equations eliminate low-order harmonics, and one equation determines the modulation ratio M . A typical three-level SHEPWM waveform is shown in Figure 3, where Vxz is the single-phase output voltage, and its Fourier series is

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; Z</span>}}<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ...</span>}{\overset{\mathrm{<span\; class="notranslate">\; \&infin;</span>}}{<span\; class="notranslate">\; \&Sigma;</span>}}{\mathrm{<span\; class="notranslate">\; b</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\mathrm{<span\; class="notranslate">\; sin</span>}\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; q</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span><span\; class="notranslate">\; ...</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

where x = a, b, c; bn are the Fourier coefficients; bn is given by

${\mathrm{<span\; class="notranslate">\; b</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}}<span\; class="notranslate">\; (</span>\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; N</span>}}{<span\; class="notranslate">\; \&Sigma;</span>}}{<span\; class="notranslate">\; (</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; cosn\&alpha;</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; <</span>{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; <</span>{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; <</span><span\; class="notranslate">\; ...</span><span\; class="notranslate">\; <</span>{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}_{\mathrm{<span\; class="notranslate">\; N</span>}}<span\; class="notranslate">\; <</span>\mathrm{<span\; class="notranslate">\; \&pi;</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

where n=1, 5, 7, . . . , 3N-2.

The optimal solution of the equation is selected by the following value function

$\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; ,</span>{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; ,</span><span\; class="notranslate">\; ...</span><span\; class="notranslate">\; ,</span>{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}_{\mathrm{<span\; class="notranslate">\; N</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>{<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; b</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; b</span>}}_{\mathrm{<span\; class="notranslate">\; 5</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; ...</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; b</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span>$

where M is the modulation index. The switch state can be expressed as a space voltage vector, which can be divided into zero vector, small vector, large vector, and medium vector according to the size of the space voltage vector, and the small voltage vector can be divided into P-type vector and N-type vector, as shown in Figure 4 and shown in Table 1.

Table 1

The mid-point voltage V _Z of the inverter using SHEPWM is expressed as

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; Z</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>$

Among them, V _C1 and V _C2 are the voltage values of DC side capacitors C ₁ and C ₂ . The effect of the switch state on the midpoint voltage is shown in Figure 5: large vectors and zero vectors have no effect on the midpoint voltage, because in this case the midpoint Z is not connected to the positive and negative poles of the DC side, because the two capacitors have no Charge and discharge, so the voltage of the two capacitors does not change, and the voltage of the midpoint does not change, as shown in Figure 5(a) and (c); Figure 5(b) shows the effect diagram of the vector, at this time the midpoint and the DC side The positive and negative sides of the inverter are connected, and the change of the midpoint voltage is determined by the midpoint current at this time; when the inverter selects the P-type small vector switch state, the load is connected to the midpoint and the positive pole of the DC side, and the capacitor C ₁ discharges , the current flows into the midpoint, and the midpoint voltage rises, as shown in Figure 5(d); on the contrary, the N-type small vector will cause the midpoint voltage to drop, as shown in Figure 5(e).

The zero-sequence current i _zi of the i-th inverter is:

i _zi =i _ai +i _bi +i _ci (5)

Where i is the device number of the inverter. The zero-sequence circulating current of the T-type three-level inverter is related to the output filter inductance L, the midpoint potential and the switch state. For a parallel system of n T-type three-level inverters, the zero-sequence output of the i-th inverter The sequence circulation i _zi is:

${\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; z</span>}\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; =</span>\frac{\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 6</span>}}\underset{\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; \&NotEqual;</span>\mathrm{<span\; class="notranslate">\; i</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}}{<span\; class="notranslate">\; \&Sigma;</span>}}\underset{\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; b</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; c</span>}}{<span\; class="notranslate">\; \&Sigma;</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; \&Delta;V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; \&Delta;V</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; )</span>}{<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 6</span>}<span\; class="notranslate">\; )</span>$

In view of the fact that adjusting the midpoint voltage of some inverters may conflict with suppressing the circulating current, the timing sequence is set for the inverters in the parallel system. When the system is working, each inverter adjusts the midpoint voltage or zero sequence Circulation is controlled. In the present invention, the cycle of the parallel system is set as T=0.02s. When n inverters are running in parallel, in each cycle T of the parallel system: the i-th inverter is at (i-1)T/n～iT/ It is responsible for controlling the midpoint voltage V _Zi in the n time period, and is responsible for controlling the zero-sequence circulating current i _Zi in other periods.

In the present invention, the inverter adopting SHEPWM maintains the midpoint voltage balance by replacing the small voltage vector, and the control principle is shown in FIG. 6 . The SHEPWM switch signal is generated by the traditional SHEPWM system. When the small voltage vector switch state appears, the small voltage vector controller acts; when the small voltage vector switch state does not appear, the small vector controller is blocked and the switch state remains unchanged.

The flow chart of midpoint voltage balance control among the present invention is provided by Fig. 7, and wherein V _range is the limited fluctuation range of midpoint voltage, and V _Z is midpoint voltage, and the operating state of small vector controller is as follows:

State 1: |V _Z |>V _range , the small vector is replaced in this state.

a) V _Z >0: According to Table 2, the switch state is changed to N-type small vector.

b) V _Z <0: According to Table 2, the switch state is changed to a P-type small vector.

State 2: |V _Z |<V _range , the switch state does not change.

In the present invention, the midpoint voltage balance is maintained by replacing the small voltage vector, and the control principle is shown in FIG. 8 . The switching signal of the inverter is generated by the traditional SHEPWM system. When the small vector switch state appears, the small voltage vector controller acts; when the small voltage vector switch state does not appear, the small vector controller is blocked and the switch state remains unchanged.

The flow chart of zero-sequence current control among the present invention is provided by Fig. 9, and wherein I _range is the limited fluctuation range of zero-sequence current, and i _Z is zero-sequence current, and the working state of small vector controller is as follows:

State 1: |i _Z |>I _range , the small vector is replaced in this state.

a) i _Z >0: According to Table 2, the switch state is changed to an N-type small vector.

b) i _Z <0: According to Table 2, the switch state is changed to a P-type small vector.

State 2: |i _Z |<I _range , the switch state does not change.

simulation Research

A parallel control method for multiple T-type three-level inverters using SHEPWM proposed in the present invention can significantly reduce the oscillation range of the midpoint voltage on the DC side, and not only has a small harmonic content in the three-level topology, and the system The advantage of high efficiency also has the advantages of good maintainability, high redundancy, and easy expansion of the parallel system, which solves the problems of circulating current suppression and midpoint voltage balance.

In MATLAB/simulink2012B, the control strategy proposed by the present invention is simulated and studied with the parallel system topology of multiple three-level inverters shown in FIG. 1, and n=3 is selected. The given currents of the three inverters are 15A, 15A, and 25A respectively, and the simulation results are shown in Figure 10 to Figure 14. From Figure 8, we know that the magnitude of the output current of the parallel system to the grid is 55A, which is the sum of the output currents of the three inverters. Figure 9 shows the output voltage waveform of the inverter using SHEPWM. From the harmonic analysis of the voltage shown in Figure 10, it can be seen that the specified low-order harmonics are eliminated through SHEPWM. Since the two inverters share the AC-DC bus and the midpoints are connected to each other, the potentials of the midpoints on the DC side of the two inverters are equal, as shown in Figure 11(a)-Figure 11(c), and the upper and lower capacitors on the DC side The voltage values are all 100V, and the midpoint voltage is limited to a small fluctuation range. At the same time, it can be seen from Figure 12 that the circulating current between the two inverters is limited to 0A, and the circulating current is effectively suppressed.

From the above simulation results, it can be seen that a parallel control method of multiple T-type three-level inverters using SHEPWM in the present invention can limit the midpoint voltage and zero-sequence circulating current to a small fluctuation area, and keep the traditional SHEPWM to eliminate The ability of specific harmonics solves the problem of circulating current suppression and neutral point voltage balance well.

Although the specific implementation of the present invention has been described above in conjunction with the accompanying drawings, it does not limit the protection scope of the present invention. Those skilled in the art should understand that on the basis of the technical solution of the present invention, those skilled in the art do not need to pay creative work Various modifications or variations that can be made are still within the protection scope of the present invention.

Claims (10)

1. adopt the T-shaped three-level inverter control method for parallel of multiple stage of SHEPWM, it is characterized in that: comprise the following steps:

(1) number of the overtone order eliminated as required determines the switching angle number in each cycle；

(2) solve the switch angle of selective harmonic elimination pulsewidth modulation based on multi-objective particle swarm optimization method, generate corresponding selective harmonic elimination pulsewidth modulation signal；

(3) mid-point voltage and the zero sequence circulation of T-shaped three-level inverter parallel system are gathered；

(4) set sequential, according to mid-point voltage or zero sequence circulation, selective harmonic elimination pulsewidth modulation signal is carried out small vector control according to setting sequential, selective harmonic elimination pulsewidth modulation signal is rewritten。

2. a kind of T-shaped three-level inverter control method for parallel of multiple stage adopting SHEPWM as claimed in claim 1, is characterized in that: in described step (1), and the switching angle number in per quart the cycle is need the overtone order eliminated to add 1。

3. a kind of T-shaped three-level inverter control method for parallel of multiple stage adopting SHEPWM as claimed in claim 1, it is characterized in that: in described step (4), set the parallel system cycle as T, when n platform inverter parallel, in each cycle T of parallel system: i-th inverter is responsible for controlling mid-point voltage within (i-1) T/n～iT/n time period, is responsible for controlling zero sequence circulation in other periods。

4. a kind of T-shaped three-level inverter control method for parallel of multiple stage adopting SHEPWM as claimed in claim 1, it is characterized in that: in described step (4), when controlling mid-point voltage, if the mid-point voltage of T-shaped three-level inverter is in threshold range, then do not change T-shaped three-level inverter, make it be directly entered three-level inverter, otherwise on off state is revised as small vector signal, selective harmonic elimination pulsewidth modulation signal is rewritten。

5. a kind of T-shaped three-level inverter control method for parallel of multiple stage adopting SHEPWM as claimed in claim 4, it is characterized in that: in described step (4), when the absolute value of mid-point voltage is more than mid-point voltage threshold value, if mid-point voltage is more than zero, on off state is changed to N-type small vector；If mid-point voltage is less than zero, on off state is changed to P type small vector, and when the absolute value of mid-point voltage is less than mid-point voltage threshold value, on off state does not change。

6. a kind of T-shaped three-level inverter control method for parallel of multiple stage adopting SHEPWM as claimed in claim 1, it is characterized in that: in described step (4), when controlling zero sequence circulation, if zero sequence circulation exceedes threshold range, if zero sequence circulation is more than zero, on off state is changed to N-type small vector, if zero sequence circulation is less than zero, on off state is changed to P type small vector, if zero sequence circulation is in threshold range, on off state does not change。

7. the T-shaped three-level inverter control method for parallel of multiple stage adopting SHEPWM, it is characterized in that: include selective harmonic elimination pulsewidth modulation signal generator, small vector controller, switches set, PWM signal generator and T-shaped three-level inverter parallel system, wherein, T-shaped three-level inverter parallel system, including multiple T-shaped three-level inverters, all T-shaped three-level inverters share alternating current-direct current bus, are connected in parallel to each other；

Described selective harmonic elimination pulsewidth modulation signal generator output selective harmonic elimination pulsewidth modulation signal is to switches set, described small vector controller gathers mid-point voltage and the zero sequence circulation of T-shaped three-level inverter parallel system, according to the sequential set, alignment voltage and zero sequence circulation are controlled respectively, it is judged that whether it is in respective setting threshold value；Size according to mid-point voltage and zero sequence circulation, is confirmed whether selective harmonic elimination pulsewidth modulation signal is rewritten, generates control signal by PWM signal generator, control the switching device of T-shaped three-level inverter parallel system。

8. a kind of T-shaped three-level inverter control method for parallel of multiple stage adopting SHEPWM as claimed in claim 7, it is characterized in that: described small vector controller judges according to mid-point voltage, if mid-point voltage is in setting threshold range, then do not change the state of switches set, make selective harmonic elimination pulsewidth modulation signal generate control signal by PWM signal generator, control the switching device of T-shaped three-level inverter parallel system；

If mid-point voltage is not in setting threshold range, small vector controller changes switches set state, make selective harmonic elimination pulsewidth modulation signal change become small voltage vector, generate control signal by PWM signal generator, control the switching device of T-shaped three-level inverter parallel system。

9. a kind of T-shaped three-level inverter control method for parallel of multiple stage adopting SHEPWM as claimed in claim 7, is characterized in that: described mid-point voltage is the half of the voltage difference between two shunt capacitances of DC side of T-shaped three-level inverter。

10. a kind of T-shaped three-level inverter control method for parallel of multiple stage adopting SHEPWM as claimed in claim 7, it is characterized in that: when described small vector controller controls according to zero sequence circulation, if zero sequence circulation exceedes threshold range, if zero sequence circulation is more than zero, on off state is changed to N-type small vector, if zero sequence circulation is less than zero, on off state is changed to P type small vector, if zero sequence circulation is in threshold range, on off state does not change。