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CN105678083A - Rapid detection method capable of performing single-bit frequency detection and frequency detection within block - Google Patents

Rapid detection method capable of performing single-bit frequency detection and frequency detection within block Download PDF

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Publication number
CN105678083A
CN105678083A CN201610016467.4A CN201610016467A CN105678083A CN 105678083 A CN105678083 A CN 105678083A CN 201610016467 A CN201610016467 A CN 201610016467A CN 105678083 A CN105678083 A CN 105678083A
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bit
frequency detection
block
detection
quick
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罗影
张文科
尹一桦
徐远泽
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Chengdu Westone Information Industry Inc
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Chengdu Westone Information Industry Inc
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    • G16INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR SPECIFIC APPLICATION FIELDS
    • G16ZINFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR SPECIFIC APPLICATION FIELDS, NOT OTHERWISE PROVIDED FOR
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Abstract

The invention provides a rapid detection method capable of performing single-bit frequency detection and frequency detection within a block. A system comprises a switch 1, a switch 2, a splitting sub-sequence module, a number module for looking up a table to calculate 1 in each sub-sequence, a calculation statistic module and a comparison statistic module. The calculation statistic module is further divided into a calculation accumulated sum Sn submodule and a calculation statistic V submodule. The comparison statistic module is further divided into a comparison accumulated sum Sn and threshold submodule and a comparison statistic V and threshold submodule. Compared with the prior art, the rapid detection method is ingeniously combined with single-bit frequency detection and frequency detection within the block, and the method has the advantages of high checking efficiency, small occupied storage space and module reusability and the like. After simple configuration, the detection system can be modified to be in a bit detection mode of only performing single-bit frequency detection, a block detection mode of only performing frequency detection within the block and a dual detection mode of simultaneously performing single-bit frequency detection and frequency detection within the block.

Description

A kind of have the method for quick of frequency detection in the detection of single-bit frequency and block
Technical field
The present invention relates to data communication and information security field, especially relate to a kind of have single-bit frequency detection and block in frequency detection method for quick.
Background technology
Random sequence occupies very important status in cipher application technology, and random sequence is all considered as the basic of security algorithm by the Perfect Secrecy system of Shannon and modern password system. Present computer safety system uses random sequence in a large number, and such as the generation of key, digital signature, authentication etc., this has fully demonstrated the using value of random number. In Applied cryptography, the purpose of randomness detection is the randomness of the sequence adopting probabilistic method analysis test randomizer etc. to generate, it is judged that whether sequence to be checked is statistically difficult to distinguishes with true random number. Different detection algorithms portrays the gap between sequence to be checked and true random sequence from different angles. Having been achieved for great successes in randomness detection after years of researches and development, existing substantial amounts of randomness detection algorithm, and new detection algorithm at present is also continuing to bring out.
National Institute of Standards and Technology (NationalInstituteofStandardsandTechnology, NIST) the SP800-22 standard issued suggested 16 kinds of Statistical Identifying Methods for Randomness test, 2009, Password Management office of country of China has issued randomness inspection criterion and suggested 15 kinds of Statistical Identifying Methods for Randomness test, and wherein the detection of single-bit frequency is the two total detection with frequency detection in block. The purpose of single-bit frequency detection be inspection n-bit sequence to be checked in 0,1 bit whether obey and be uniformly distributed, namely ensure that the number of 0,1 bit is roughly the same. In block frequency detection be the sequence to be checked of detection n-bit the subsequence that block length is m in ratio shared by 1. If the ratio of 1 is close to half, then it is believed that sequence is random.When m takes 1, in block, frequency detection deteriorates to the detection of single-bit frequency. Frequency test is the basis of Randomness test, should first carry out. If frequency detecting all cannot be passed through, then other tests need not be carried out and namely can be shown that this sequence is not random. Therefore, both detections have very important effect. Must possess high detection efficiency, in order to quickly reject those samples to be checked being substantially unsatisfactory for random nature.
The data to be checked of input first can be converted into single-bit by common implementation represent, so that two kinds of algorithms carry out number of bits statistics, then two kinds of detection algorithms are added up respectively different statistics and P value, and compares with significant level, it is judged that whether inspection sequence is by detecting. The cumulative sum calculating n-bit sequence in single-bit frequency detection algorithm needs to perform to table look-up for n time and n sub-addition, additionally also needs the remaining difference function of counting statistics amount; Needing to perform n times subtraction, n times square, n times division, mN+N sub-addition and 2 multiplication to calculate statistic in frequency detection algorithm in block, wherein N is the number of complete subsequence. Above amount of calculation illustrates that the efficiency of the two detection algorithm is not high, actually detected work needs the detection method with the efficient quick more of both detection algorithms, to strengthen the screening effect that both algorithms are played, and then it is greatly improved the detection efficiency of whole randomness inspection criterion.
Summary of the invention
It is an object of the invention to: for prior art Problems existing, there is provided a kind of and there is the method for quick of frequency detection in the detection of single-bit frequency and block, solve computer when performing frequency detection method in existing single-bit frequency detection method or block, inefficient problem.
The goal of the invention of the present invention is achieved through the following technical solutions:
A kind of have the method for quick of frequency detection in the detection of single-bit frequency and block, it is characterised in that the method comprising the steps of:
(1) by bit length 2m, sequence to be checked for n-bit being divided into N/2 non-overlapped subsequence pair, each subsequence is m subsequence to comprising 2 bit lengths;
(2) to all subsequences pair, look-up table is utilized to draw bit 1 number that two subsequences therein comprise respectively;
(3) calculating specific statistics, step is as follows:
(3.1) if desired carry out single-bit frequency detection, then the number of the cumulative bit 1 of all subsequences is obtained S1, and calculate the statistic cumulative sum of single-bit frequency detection | Sn|=| n-2S1|;
(3.2) if desired carry out frequency detection in block, then each subsequence is calculated the square value of the number of wherein bit 1 and the difference of average m/2, and obtains S by cumulative for these square values2, the then statistic V=4S of frequency detection in computing block2/ m;
(4) comparing specific statistics, step is as follows:
(4.1) if desired carry out single-bit frequency detection, then utilize cumulative sum to judge | Sn| whether≤s sets up, and s is for utilizingCalculated in advance is out | Sn| threshold value, such as | Sn|≤s sets up and then thinks that sequence to be checked is for detect by single-bit frequency;
(4.2) frequency detection in block is if desired carried out, statistic V is then utilized to judge whether V≤v sets up, v, for utilizing the threshold value of igamc (N/2, V/2) >=α calculated in advance V out, if V≤v sets up, thinks that sequence to be checked is for detect by frequency in block.
As further technical scheme, described look-up table is: to each subsequence, from first to last sequentially take w bit-, and utilize look-up table to immediately arrive at the number of this w bit-middle bit 1, by that analogy.
As further technical scheme, it is most suitable that the w value of described look-up table takes 8: 8 bits are complete bytes, it is not necessary to carry out the splicing between byte or fractionation; And now the scale of table is only 256 bytes, it is suitable for overwhelming majority process system.
As further technical scheme, the absolute value of accumulative sum in the detection of single-bit frequency | Sn| threshold value s calculate before detection, as sample bits number n=1000000, during significant level α=0.01, the value of integer s is 2575.
As further technical scheme, in block, in frequency detection, the threshold value v of statistic V calculates before detection, as sample bits number n=1000000, subsequence number N=10000, during significant level α=0.01, v value took for 10331.933578 (retaining six decimals).
As further technical scheme, first Guan Bi switch 1, disconnect switch 2, enable the single-bit frequency detection pattern of method for quick: data are only sent in counting statistics amount module and calculated cumulative sum S by data to be checkednData are only sent in relatively statistic module and are compared cumulative sum S by submodulenWith threshold value submodule.
As further technical scheme, first switch 1 is disconnected, Guan Bi switch 2, enable frequency detection pattern in the block of method for quick: data are only sent into counting statistics amount V submodule by data to be checked in counting statistics amount module, only data are sent in relatively statistic module and compare counting statistics amount V and threshold value submodule.
As further technical scheme, first Guan Bi switch 1 and switch 2, enable double; two detection patterns of method for quick: data are sent in counting statistics amount module and calculated cumulative sum S by data to be checkednData are sent in relatively statistic module and are compared cumulative sum S by submodule and counting statistics amount V submodulenWith threshold value submodule and compare counting statistics amount V and threshold value submodule.
Compared with prior art, the present invention is by conjunction with the feature of frequency detection in the detection of single-bit frequency and block, achieve a kind of have single-bit frequency detection and block in frequency detection method for quick, this system has that inspection efficiency is high, take the advantages such as little, the Module Reusable of memory space, and this detection method can be changed to the bit detection mode only carrying out single-bit frequency detection after simply configuration, the block detection pattern that only carries out frequency detection in block and simultaneously carry out double; two detection patterns of frequency detection in single-bit frequency detection and block.
Accompanying drawing explanation
Fig. 1 is a kind of framework map with the method for quick that the detection of single-bit frequency detects with frequency in block;
Fig. 2 is the flow chart of a kind of single-bit frequency detection pattern with the method for quick of frequency detection in the detection of single-bit frequency and block;
Fig. 3 is the flow chart of frequency detection pattern in a kind of block with the method for quick that the detection of single-bit frequency detects with frequency in block;
Fig. 4 is the flow chart of a kind of double; two detection patterns with the method for quick that the detection of single-bit frequency detects with frequency in block.
Detailed description of the invention
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Embodiment
The inventive method realizes based on computer, need to set up software module as shown in Figure 1, and this system includes number module, the counting statistics amount module of 1 in switch 1, switch 2, fractionation subsequence module, each subsequence of statistics of tabling look-up, compares statistic module; Wherein counting statistics amount module is divided into again calculating cumulative sum SnSubmodule and counting statistics amount V submodule;Relatively statistic module is divided into again and compares cumulative sum SnWith threshold value submodule and compare statistic V and threshold value submodule. N-bit enters to table look-up until data stream to be checked after splitting subsequence module adds up the number module of 1 in each subsequence, the latter adds up the number of in each subsequence 1 and sends into counting statistics amount module, and counting statistics amount module is according to whether the Determines of switch 1 and switch 2 calculates cumulative S by the output feeding of a upper modulenSubmodule and counting statistics amount V submodule, compare the comparison cumulative sum S of statistic modulenWith threshold value submodule and compare statistic V and threshold value submodule and process the calculating cumulative sum S of counting statistics amount module respectivelynThe statistical result of submodule and counting statistics amount V submodule, comparative result is as final testing result output.
Split subsequence module:
Mainly complete to split subsequence step S1: owing in China's randomness inspection criterion specified block, the parameter m of frequency detection takes 100, so sequence to be checked for n-bit is divided into non-overlapped subsequence pair by bit length 2m, N/2 pair altogether, wherein each subsequence is the subsequence of m to comprising 2 bit lengths.
Disposable in this step taking two subsequences, reason is that in block, the parameter m value of frequency detection is 100, and this makes subsequence not by byte-aligned, therefore changes into and disposable take two subsequences and ensure by byte-aligned.
Table look-up and add up the number module of 1 in each subsequence:
Mainly complete to table look-up and add up the number step S2 of 1 in each subsequence: to all subsequences pair, utilize look-up table to draw bit 1 number that two subsequences therein comprise respectively. Its basic thought is: first, utilizes look-up table to immediately arrive at the number of bit 1; Secondly because two algorithms will use bits count, so the merging that combined by two detection algorithms realizes, the result of shared bits statistics. Note B=B1||…||BLFor the array that continuous multiple bytes are formed, wherein Bi, 1≤i≤L is a byte. (B t) represents calculating B=B to note g1||…||BtTotal number of bit 1 in this t byte. If t takes 1, then g (B, 1) represents calculating byte B1The number of middle bit 1, g (B, 1) can pass through realization of once tabling look-up, and (B t) can pass through realization of repeatedly tabling look-up to g. In each subsequence of statistics of tabling look-up, the number module of 1 adds up a sub-sequence pair (containing two subsequences) 2m=200 bit data stream E to be checked altogetheri, the number of bit 1 in 1≤i≤25, its step is as follows:
(1) calculate in the previous subsequence of each subsequence centering 1 number: N1=g (E1,12)+g(E13>>4,1)
(2) calculate in the later subsequence of each subsequence centering 1 number: N2=g (E14,12)+g(E13^0xF,1)
(3) calculate in two subsequences of each subsequence centering 1 total number: N3=N1+N2
The bit width tabled look-up is designated as w, then in table, element number is 2w. Find after considering the acquisition difficulty of continuous w bit and the scale of table that w takes 8 proper. First, 8 bits are just bytes, it is not necessary to do extra process and can obtain continuous 8 Bit datas; Secondly, it is not necessary to the data to be checked of input are split as single-bit and represent; 3rd, now the scale of table is 256 bytes, and overwhelming majority processor can accept.
The bits count process of two kinds of detection algorithms is optimized combination by this step. Consider that traditional bits count result can be shared between two algorithms, merge so can be combined by two detection algorithms to optimize and realize: in block, in frequency detection, the statistical result of continuous two subsequences is the result that in block, frequency detection is required, and itself and value are the sums of bit 1 of the two subsequence, should and value add up and just can calculate the cumulative sum that single-bit frequency detects.
Counting statistics amount module
Mainly complete counting statistics amount step S3: according to whether the Determines of switch 1 and switch 2 calculates cumulative S by the output feeding of a upper modulenStep S31 and counting statistics amount V step S32; If desired carry out single-bit frequency detection, i.e. switch 1 Guan Bi, then the number of the cumulative bit 1 of all subsequences is obtained S1, and calculate the statistic cumulative sum of single-bit frequency detection | Sn|=| n-2S1|; If desired carry out frequency detection in block, i.e. switch 2 Guan Bi, then each subsequence is calculated the square value of the number of wherein bit 1 and the difference of average m/2, and obtains S by cumulative for these square values2, the then statistic V of frequency detection in computing block2=4S2/ m. Its step is as follows:
(S31) if desired carry out single-bit frequency detection, i.e. switch 1 Guan Bi, then perform successively: obtain total number N of each subsequence centering calculates 13And update S1, S1=S1+N3; If all subsequences are to all taking, desirable without subsequence, calculate cumulative sum | Sn|=| n-2S1|。
(S32) if desired carrying out frequency detection in block, namely switch 2 Guan Bi, then perform: obtain the N that each subsequence centering is calculated successively1And N2, and update aggregate-value S2, S2=S2+(N1-m/2)2+(N2-m/2)2; If all subsequences are to all taking, without the statistic V of frequency detection in the desirable then computing block of subsequence2=4S2/m。
In conventional implementation, in block, frequency detection employs substantial amounts of division when counting statistics amount, but the cost that processor performs division arithmetic is very high, is about multiplying and performs 10~20 times of the time. Note NiFor the number of bit 1 in i-th subsequence, the calculation process of statistic can be reduced to and have only to 1 division
V = 4 m Σ i = 1 N ( N i m - 1 2 ) 2 = 4 m Σ i = 1 N ( N i - m / 2 ) 2 .
Relatively statistic module
Mainly complete to compare statistic step S4: according to whether the Determines of switch 1 and switch 2 performs to compare cumulative sum SnWith threshold step S41 and compare statistic V and threshold value sub-step S42; If desired carrying out single-bit frequency detection, namely switch 1 Guan Bi, then judge the magnitude relationship between the threshold value s that cumulative sum and calculated in advance go out, to decide whether to be detected by single-bit frequency; If desired carrying out frequency detection in block, namely switch 2 Guan Bi, then judge the magnitude relationship between the threshold value v that statistic and calculated in advance go out, to decide whether to be detected by single-bit frequency; Its step is as follows:
(S41) if desired carry out single-bit frequency detection, i.e. switch 1 Guan Bi, then perform: the absolute value of relatively more accumulative sum | Sn| with the magnitude relationship of threshold value s, if | Sn|≤s, then it is assumed that sequence to be checked is by detecting; Here s be calculated in advance go out erfc (| Sn|/(2n)1/2During) >=α | Sn| threshold value (upper bound) s.
(S42) frequency detection in block is if desired carried out, i.e. switch 2 Guan Bi, then perform: compare statistic V and threshold value v, if V is<v, then think that sequence to be checked is by detecting, wherein v be calculated in advance go out igamc (N/2, V/2)>=α time statistic V threshold value (upper bound).
The absolute value of accumulative sum in the detection of single-bit frequency | Sn| threshold value s calculate before detection, as sample bits number n=1000000, during significant level α=0.01, the value of integer s is 2575.
In block, in frequency detection, the threshold value v of statistic V calculates before detection, and as sample bits number n=1000000, subsequence number N=10000, during significant level α=0.01, v value took for 10331.933578 (retaining six decimals).
The present invention is by conjunction with the feature of frequency detection in the detection of existing single-bit frequency and block, achieve frequency detection method for quick in a kind of detection of single-bit frequency and block having and checking efficiency height, take the advantages such as little, the Module Reusable of memory space, meanwhile, this include mode can be changed to the bit detection mode only carrying out single-bit frequency detection after easy configuration, the block detection pattern that only carries out the detection of frequency in block and simultaneously carry out double; two detection patterns of frequency detection in single-bit frequency detection and block.
By the control of two switches, this system can realize frequency detection pattern and double; two detection pattern in single-bit frequency detection pattern, block.
A, method for quick single-bit frequency detection pattern
What Fig. 2 illustrated the single-bit frequency detection pattern of the method for quick that the embodiment of the present invention provides realizes flow process, and details are as follows:
First Guan Bi switch 1, disconnects switch 2, enables the single-bit frequency detection pattern of method for quick: data are only sent in counting statistics amount module and calculated cumulative sum S by data to be checkednData are only sent in relatively statistic module and are compared cumulative sum S by submodulenWith threshold value submodule.
B, method for quick block in frequency detection pattern
What Fig. 3 illustrated frequency detection pattern in the block of the method for quick that the embodiment of the present invention provides realizes flow process, and details are as follows:
First switch 1 is disconnected, Guan Bi switch 2, enable frequency detection pattern in the block of method for quick: data are only sent into counting statistics amount V submodule by data to be checked in counting statistics amount module, only data are sent in relatively statistic module and compare counting statistics amount V and threshold value submodule.
C, method for quick double; two detection patterns
What Fig. 4 illustrated double; two detection patterns of the method for quick that the embodiment of the present invention provides realizes flow process, and details are as follows:
First Guan Bi switch 1 and switch 2, enables double; two detection patterns of method for quick: data are sent in counting statistics amount module and calculated cumulative sum S by data to be checkednData are sent in relatively statistic module and are compared cumulative sum S by submodule and counting statistics amount V submodulenWith threshold value submodule and compare counting statistics amount V and threshold value submodule.
Traditional detection method performs frequency detection in the detection of single-bit frequency and block to be needed to perform to table look-up for n time, N+2 multiplication, n+ (m+2) n times addition and subtraction and n times division; Double; two detection patterns of method for quick hold frequency detection in the detection of single-bit frequency and block need to perform to table look-up for 13N time, 16N+1 addition and subtraction, shift for 0.5N+2 time, 0.5N time and computing, 1 division of n times quadratic sum, the scale of table is 256 bytes.
IntelCorei33400MHz processor, 4GBDDR31600MHz internal memory, WinXPSP3 operating system, VC6.0 test platform on actual measurement conventional implementation and the implementation of the present invention. From the contrast of table 1 it can be seen that the single-bit frequency detection that conventional implementation realizes detects 2790 microseconds consuming time with frequency in block, and double; two detection mode detection times of the present invention are 85.1 microseconds, and detection speed improves 32.8 times.
Table 1
The a kind of of present invention realization has the method for quick of frequency detection in the detection of single-bit frequency and block, have that inspection efficiency is high, take the advantages such as little, the Module Reusable of memory space, and this detection method can be changed to the bit detection mode only carrying out single-bit frequency detection after simply configuration, the block detection pattern that only carries out frequency detection in block and simultaneously carry out double; two detection patterns of frequency detection in single-bit frequency detection and block.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, it is noted that all any amendment, equivalent replacement and improvement etc. made within the spirit and principles in the present invention, should be included within protection scope of the present invention.

Claims (8)

1. one kind has the method for quick of frequency detection in the detection of single-bit frequency and block, it is characterised in that the method comprising the steps of:
(1) by bit length 2m, sequence to be checked for n-bit being divided into N/2 non-overlapped subsequence pair, each subsequence is the subsequence of m to comprising 2 bit lengths;
(2) to all subsequences pair, look-up table is utilized to draw bit 1 number that two subsequences therein comprise respectively;
(3) calculating specific statistics, step is as follows:
(3.1) if desired carry out single-bit frequency detection, then the number of the cumulative bit 1 of all subsequences is obtained S1, and calculate the statistic cumulative sum of single-bit frequency detection | Sn|=| n-2S1|;
(3.2) if desired carry out frequency detection in block, then each subsequence is calculated the square value of the number of wherein bit 1 and the difference of average m/2, and obtains S by cumulative for these square values2, the then statistic V=4S of frequency detection in computing block2/ m;
(4) comparing specific statistics, step is as follows:
(4.1) if desired carry out single-bit frequency detection, then utilize cumulative sum to judge | Sn| whether≤s sets up, and s is for utilizingCalculated in advance is out | Sn| threshold value, such as | Sn|≤s sets up and then thinks that sequence to be checked is for detect by single-bit frequency;
(4.2) frequency detection in block is if desired carried out, statistic V is then utilized to judge whether V≤v sets up, v, for utilizing the threshold value of-igamc (N/2, V/2) >=α calculated in advance V out, if V≤v sets up, thinks that sequence to be checked is for detect by frequency in block.
2. according to claim 1 a kind of have single-bit frequency detection and block in frequency detection method for quick, it is characterized in that, described look-up table is: to each subsequence, from first to last sequentially take w bit number, and utilize look-up table to immediately arrive at the number of bit 1 in this w bit number, by that analogy.
3. according to claim 2 a kind of have single-bit frequency detection and block in frequency detection method for quick, it is characterised in that the value of described w takes 8.
4. according to claim 1 a kind of have single-bit frequency detection and block in frequency detection method for quick, it is characterised in that as bit number n=1000000, during significant level α=0.01, the value of integer s is 2575.
5. according to claim 1 a kind of have single-bit frequency detection and block in frequency detection method for quick, it is characterised in that as bit number n=1000000, subsequence number N=10000, during significant level α=0.01, v value takes 10331.933578.
6. according to claim 1 a kind of have single-bit frequency detection and block in frequency detection method for quick, it is characterized in that, first Guan Bi switch 1, disconnect switch 2, enable the single-bit frequency detection pattern of method for quick: data are only sent in counting statistics amount module and calculated cumulative sum S by data to be checkednData are only sent in relatively statistic module and are compared cumulative sum S by submodulenWith threshold value submodule.
7. according to claim 1 a kind of have single-bit frequency detection and block in frequency detection method for quick, it is characterized in that, first switch 1 is disconnected, Guan Bi switch 2, enable frequency detection pattern in the block of method for quick: data are only sent into counting statistics amount V submodule by data to be checked in counting statistics amount module, only data are sent in relatively statistic module and compare counting statistics amount V and threshold value submodule.
8. according to claim 1 a kind of have single-bit frequency detection and block in frequency detection method for quick, it is characterized in that, first Guan Bi switch 1 and switch 2, enables double; two detection patterns of method for quick: data are sent in counting statistics amount module and calculated cumulative sum S by data to be checkednData are sent in relatively statistic module and are compared cumulative sum S by submodule and counting statistics amount V submodulenWith threshold value submodule and compare counting statistics amount V and threshold value submodule.
CN201610016467.4A 2016-01-11 2016-01-11 Rapid detection method capable of performing single-bit frequency detection and frequency detection within block Pending CN105678083A (en)

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CN109617653A (en) * 2018-12-06 2019-04-12 四川长虹电器股份有限公司 The optimization implementation method of sequential test
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CN112861121A (en) * 2020-12-23 2021-05-28 工业信息安全(四川)创新中心有限公司 Method and device for realizing maximum 1 and 0 run detection merging optimization in block
CN112861121B (en) * 2020-12-23 2023-04-07 工业信息安全(四川)创新中心有限公司 Method and device for realizing maximum 1 and 0 run detection merging optimization in block
CN115208589A (en) * 2021-04-13 2022-10-18 科大国盾量子技术股份有限公司 Rapid poker card detection method and device for high-speed noise source
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Application publication date: 20160615