CN105489162A - Signal driving circuit of display panel - Google Patents

Abstract

The invention provides a signal driving circuit of a display panel, comprising: the driving chip comprises a plurality of input pins and a plurality of output pins, wherein the input pins are used for receiving control signals or power signals, and the output pins are used for driving the light-emitting units of the sub-pixels; a plurality of transfer lines, each of which extends along a boundary of the sub-pixels and is electrically coupled to the input pins; and a plurality of driving lines, each driving line is arranged between two adjacent transmission lines corresponding to the sub-pixels and is electrically coupled to the output pins. Compared with the prior art, the transmission lines and the driving lines are wired in the vertical direction, the transmission lines are arranged on the boundaries of the sub-pixels, and the driving lines are arranged between two adjacent transmission lines, so that the framework that the driving chip drives the sub-pixels in multiple lines on one side is realized, signal interference caused by crossing among the wiring lines is avoided, the difficulty of wiring impedance balance control can be reduced, and the design efficiency and the picture display quality are improved.

Description

A signal drive circuit for a display panel

technical field

The present invention relates to a display panel, in particular to a signal driving circuit for the display panel.

Background technique

Flat panel display (Flat Panel Display, FPD) has been used in a variety of electronic products due to its low power consumption, low heat generation, light weight, non-radiation, etc., and gradually replaces the traditional cathode ray tube ( CathodeRayTube, CRT) display. Among them, although the production cost of the Active Matrix (Active Matrix) type display device is relatively expensive and the manufacturing process is relatively complicated, it is suitable for full-color display with large size, high resolution, and high information capacity, so it has become the mainstream of the display device. In addition, due to the continuous improvement of the process and materials of light emitting diodes (Light Emitting Diodes, LEDs), the luminous efficiency of light emitting diodes has been greatly improved. Different from general light sources, light-emitting diodes have the characteristics of low power consumption, low pollution, long service life, high safety, short light response time and small size, and have been widely used in many types of electronic products.

On the other hand, in the existing u-Device transfer technique (u-Device transfer technique), the first stage of application is to transfer the micro-LED to the array substrate and match it with active components (such as thin film transistors) driving circuit; the second stage The application is to place the driving circuit in the form of a chip on the active area (Active Area) of the display panel through transposition technology. The display panel only needs to provide wires to connect the signal provided by the front-end system to the driver chip, and then connect the output pins of the driver chip to each light-emitting element, so as to achieve the effect of driving the display. During the design process, if the driver chip is placed in the active area of the panel, the output signal and input signal routing of the chip need to be carefully considered. A current solution is to concentrate the wiring of input signals (such as power lines, data lines, and control signal lines) in one area, and the wiring of output signals is connected to the light emitting element. However, this routing method is not only complicated, but also prone to adverse situations such as many signal traces overlap (crossover), and impedance control between the output signal traces and the light-emitting element is difficult.

In view of this, how to design a signal driving circuit for a display panel so as to overcome the above-mentioned defects or deficiencies in the prior art is an urgent task to be solved by relevant technical personnel in the industry.

Contents of the invention

Aiming at the above-mentioned troubles caused by the signal drive circuit for display panel in the prior art when the input signal and output signal are routed, the present invention provides a novel signal drive circuit for display panel, by driving the chip The unique output pin arrangement and design method not only simplifies the difficulty of wiring, but also avoids the overlapping of signal lines.

According to one aspect of the present invention, a signal driving circuit of a display panel is provided, the display panel includes a plurality of pixels, each pixel has a plurality of sub-pixels, and each sub-pixel is provided with a light emitting unit, wherein the signal driving circuit includes :

At least one driver chip, including a plurality of input pins and a plurality of output pins, wherein the input pins are used to receive control signals or power signals, and the output pins are used to drive the light-emitting units of the sub-pixels;

a plurality of passlines, each passline extending along the boundary of the sub-pixel and electrically coupled to the input pin; and

A plurality of driving lines, each driving line is disposed between two adjacent transmission lines corresponding to the sub-pixel and electrically coupled to the output pin.

In one embodiment, the transmission line is a data line, a control signal line or a power line.

In one of the embodiments, the driver chip includes a first side and a second side that are oppositely arranged, and two adjacent output pins on the first side are respectively electrically coupled to two adjacent rows of the same color. and two adjacent output pins on the second side are respectively electrically coupled to sub-pixels of the same color and in two adjacent rows.

In one of the embodiments, the spacing between the multiple output pins of the driver chip satisfies the following relationship:

P=S/(n+1);

Wherein, P is the pitch between output pins, S is the width of each sub-pixel, and n is the number of rows of sub-pixels of the same color controlled by one side of the driving chip.

In one embodiment, the transmission line and the driving line are perpendicular to the connection between the input pin and the output pin of the driving chip.

In one embodiment, the light emitting unit is a light emitting diode.

In one of the embodiments, the signal driving circuit includes a first driver chip and a second driver chip extending along the horizontal direction and arranged at intervals, and each driver chip also includes a third side, wherein the driver chip located on the third side The output pin of the output pin is electrically coupled to the light emitting unit of the corresponding sub-pixel through the driving line.

In one embodiment, the driving lines electrically coupled to the output pins on the third side are L-shaped.

In one embodiment, the driving lines are located on a first metal layer, and the transfer lines are located on a second metal layer, wherein the second metal layer is different from the first metal layer.

The signal driving circuit for a display panel adopting the present invention includes at least one driving chip, a plurality of transmission lines and a plurality of driving lines, each driving chip has a plurality of input pins and a plurality of output pins, and these input pins The pins are used to receive control signals or power signals. These output pins are used to drive the light emitting unit of the sub-pixel. Each transfer line extends along the boundary of the sub-pixel and is electrically coupled to the input pin. Each drive line is set on Two adjacent transmission lines corresponding to the sub-pixels are electrically coupled to the output pin. Compared with the prior art, the present invention routes the transmission line and the driving line along the vertical direction, and sets the transmission line at the boundary of the sub-pixel and sets the driving line between two adjacent transmission lines, so as to realize the single drive chip The architecture of side-driving multiple rows of sub-pixels not only avoids the signal interference caused by the crossover between traces, but also reduces the difficulty of trace impedance equalization control, improving design efficiency and image display quality.

Description of drawings

Readers will have a clearer understanding of various aspects of the present invention after reading the detailed description of the present invention with reference to the accompanying drawings. in,

FIG. 1 shows a schematic diagram of a circuit principle of driving a light-emitting diode in an active area of a display panel based on a driver chip in the prior art;

FIG. 2A shows a plurality of driving chip arrangements of the driving circuit of FIG. 1 and a schematic diagram of the wiring of the input signal (inputsignal) and the driving signal (outputsignal);

2B shows a schematic circuit diagram of a plurality of drive signals of any drive chip of the drive circuit of FIG. 2A using fan-out (fan-out) wiring to drive light-emitting diodes;

FIG. 3 shows a schematic structural diagram of a signal driving circuit for a display panel according to an embodiment of the present invention;

FIG. 4 shows a schematic structural diagram of a signal driving circuit for a display panel according to another embodiment of the present invention; and

FIG. 5 shows a schematic structural diagram of a signal driving circuit for a display panel according to yet another embodiment of the present invention.

detailed description

In order to make the technical content disclosed in this application more detailed and complete, reference may be made to the drawings and the following various specific embodiments of the present invention, and the same symbols in the drawings represent the same or similar components. However, those skilled in the art should understand that the examples provided below are not intended to limit the scope of the present invention. In addition, the drawings are only for schematic illustration and are not drawn according to their original scale.

The specific implementation manners of various aspects of the present invention will be further described in detail below with reference to the accompanying drawings.

FIG. 1 shows a schematic diagram of a circuit principle of driving a light emitting diode in an active area of a display panel based on a driver chip in the prior art. FIG. 2A is a schematic diagram showing the arrangement of multiple driving chips and the routing of input signals and driving signals in the driving circuit of FIG. 1 . FIG. 2B shows a schematic circuit diagram in which multiple driving signals of any driving chip of the driving circuit shown in FIG. 2A are routed in a fan-out manner to drive a light emitting diode.

As mentioned in the background technology section, when a driving chip is used to drive the light-emitting diodes in the active area (Active Area) of the display panel, only wires need to be provided on the display panel, and the signals provided by the front-end system are connected to the driving chip through the wires. Then, the output pins of the driving chip are used to apply the driving signal to each light-emitting element (such as a light-emitting diode), so as to achieve the effect of driving the display.

Referring to FIG. 1 , the driving chip 100 includes a plurality of input pins (input pins) and a plurality of output pins (output pins). Wherein, the input pins are respectively marked by P1, P2 and P3, and the output pins are respectively marked by P4, P5 and P6. In addition, the display panel includes a plurality of pixels, each pixel has a plurality of sub-pixels, and each sub-pixel is provided with a light emitting diode. In FIG. 1 , LED1 corresponds to a red sub-pixel in a single pixel, LED2 corresponds to a green sub-pixel in a single pixel, and LED3 corresponds to a blue sub-pixel in a single pixel.

During normal operation, the input pin P1 of the driver chip 100 receives the signal IN1 of the front-end system, and applies a corresponding driving signal to the light-emitting diode LED1 through the output pin P4. Similarly, the input pin P2 of the driver chip 100 receives the signal IN2 of the front-end system, and applies the corresponding drive signal to the light-emitting diode LED2 through the output pin P5; the input pin P3 of the driver chip 100 receives the signal IN3 of the front-end system , and apply the corresponding driving signal to the light emitting diode LED3 through the output pin P6.

Referring to FIG. 2A and FIG. 2B , a conventional driving architecture includes a plurality of driving chips 100 , a plurality of passlines 20 and a plurality of driving lines 30 . For example, the transmission line 20 may be a power line, a data line or a control signal line. In this structure, the wiring of the transmission line serving as the input signal is concentrated in one area, and the wiring of the driving line serving as the output signal is connected to the light emitting element in a fan-out manner. In FIG. 2B, for example, the output signal of the driver chip 100 is connected to the light emitting diode D1 through the driving line 301, the output signal of the driving chip 100 is connected to the light emitting diode D2 through the driving line 303, and the output signal of the driving chip 100 is connected to the light emitting diode D2 through the driving line 305. To the light emitting diode D3, the output signal of the driving chip 100 is connected to the light emitting diode D4 through the driving line 307 .

However, the routing method shown in FIG. 2A or FIG. 2B is not only complex, but also prone to adverse situations such as many signal traces overlap (crossover), and impedance control between the output signal traces and the light-emitting element is difficult.

In order to solve the above problems in the prior art, the present invention discloses a signal driving circuit for a display panel. Wherein, FIG. 3 shows a schematic structural diagram of a signal driving circuit for a display panel according to an embodiment of the present invention.

Referring to FIG. 3 , in this embodiment, the signal driver circuit of the present invention includes at least one driver chip 100, a plurality of transfer lines (indicated by numerals 41, 43, 45 and 47) and a plurality of drive lines (indicated by numerals 51 , 53, 55 and 57 represent).

The driver chip 100 includes a plurality of input pins I and a plurality of output pins O. Wherein, the input pin I is used to receive a control signal or a power signal, and the output pin O is used to drive the light emitting unit of the sub-pixel. Each transfer line extends along the boundary of the sub-pixel and is electrically coupled to the corresponding input pin. Each driving line is disposed between two adjacent transmission lines corresponding to the sub-pixel and is electrically coupled to the corresponding output pin. In FIG. 3 , the transfer lines 41, 43, 45 and 47 are routed along the direction perpendicular to the driver chip 100. Specifically, the transfer lines 41 and 43 are located at the left and right borders of the red sub-pixel respectively, and the transfer line 45 and 47 are located at the left and right boundaries of the blue sub-pixel, respectively. In other words, transfer lines 43 and 45 are located at the left and right borders of the green sub-pixel, respectively.

In a specific embodiment, the driving chip 100 includes a first side (upper side in FIG. 3 ) and a second side (lower side in FIG. 3 ) oppositely disposed. Two adjacent output pins on the first side are respectively electrically coupled to sub-pixels of the same color and two adjacent rows, and two adjacent output pins on the second side are respectively electrically coupled to the same color and two adjacent rows of sub-pixels. It can be seen from FIG. 3 that two driving lines 51 and 53 are included between the transmission lines 41 and 43, and the driving line 51 is used to drive the light emitting unit of the red sub-pixel R2 in the second row, and the driving line 53 is used to drive the first row The light-emitting unit of the red sub-pixel R1. Correspondingly, the driving line 55 is used to drive the light-emitting units of the red sub-pixel R3 in the third row, and the driving line 57 is used to drive the light-emitting units of the red sub-pixel R4 in the fourth row. Similarly, the respective light-emitting units of the green sub-pixels G1-G4 in the first row to the fourth row are driven by corresponding four driving lines, and the respective light-emitting units of the blue sub-pixels B1-B4 in the first row to the fourth row are also driven. Driven by the corresponding four drive lines.

In a specific embodiment, when arranging the transmission lines and the driving lines, the driving lines may be located in a first metal layer, and the transmission lines may be located in a second metal layer, wherein the second metal layer is different from the first metal layer.

FIG. 4 shows a schematic structural diagram of a signal driving circuit for a display panel according to another embodiment of the present invention.

Comparing Fig. 4 with Fig. 3, the main difference is that the driving chip in the signal driving circuit in Fig. 3 drives two rows of sub-pixels on one side, while the driving chip in the signal driving circuit in Fig. 4 drives four sub-pixels on one side. row of subpixels. That is, four driving lines are included between the transmission lines 41 and 43 , between the transmission lines 43 and 45 , and between the transmission lines 45 and 47 .

Taking the red sub-pixels in the first row as an example, on the upper side of the driving chip 100, the driving line 51a is used to drive the light-emitting units of the red sub-pixels in the fourth row, and the driving line 53a is used to drive the red sub-pixels in the third row. For the light-emitting unit, the driving line 55a is used to drive the light-emitting unit of the red sub-pixel in the second row, and the driving line 57a is used to drive the light-emitting unit of the red sub-pixel in the first row. Correspondingly, on the lower side of the driving chip 100, the driving line 51b is used to drive the light-emitting unit of the red sub-pixel in the fifth row, the driving line 53b is used to drive the light-emitting unit of the red sub-pixel in the sixth row, and the driving line 55b is used to drive the light-emitting unit of the red sub-pixel in the sixth row. For the light-emitting units of the red sub-pixels in the seventh row, the driving line 57b is used to drive the light-emitting units of the red sub-pixels in the eighth row.

It can be known from FIG. 3 and FIG. 4 that the spacing between the multiple output pins O of the driver chip 100 satisfies the following relationship:

P=S/(n+1);

Wherein, P is the pitch between adjacent output pins, S is the width size of each sub-pixel, and n is the number of rows of sub-pixels of the same color controlled by one side of the driver chip.

FIG. 5 shows a schematic structural diagram of a signal driving circuit for a display panel according to yet another embodiment of the present invention.

Comparing FIG. 5 with FIG. 3 , the main difference is that the signal driving circuit in FIG. 5 includes a first driving chip 100 and a second driving chip 102 extending along the horizontal direction and arranged at intervals. Each driver chip also includes a third side, wherein the output pin OT on the third side (shown as the thick wire in FIG. 5 ) is electrically coupled to the light emitting unit of the corresponding sub-pixel through the driving line. Preferably, the driving line electrically coupled to the output pin OT on the third side of the driving chip 100 or 102 is in the shape of an L-shaped wiring.

The signal driving circuit for a display panel adopting the present invention includes at least one driving chip, a plurality of transmission lines and a plurality of driving lines, each driving chip has a plurality of input pins and a plurality of output pins, and these input pins The pins are used to receive control signals or power signals. These output pins are used to drive the light emitting unit of the sub-pixel. Each transfer line extends along the boundary of the sub-pixel and is electrically coupled to the input pin. Each drive line is set on Two adjacent transmission lines corresponding to the sub-pixels are electrically coupled to the output pin. Compared with the prior art, the present invention routes the transmission line and the driving line along the vertical direction, and sets the transmission line at the boundary of the sub-pixel and sets the driving line between two adjacent transmission lines, so as to realize the single drive chip The architecture of side-driving multiple rows of sub-pixels not only avoids the signal interference caused by the crossover between traces, but also reduces the difficulty of trace impedance equalization control, improving design efficiency and image display quality.

Hereinbefore, specific embodiments of the present invention have been described with reference to the accompanying drawings. However, those skilled in the art can understand that without departing from the spirit and scope of the present invention, various changes and substitutions can be made to the specific embodiments of the present invention. These changes and substitutions all fall within the scope defined by the claims of the present invention.

Claims (9)

1. A signal driving circuit of a display panel, the display panel including a plurality of pixels, each pixel having a plurality of sub-pixels, each sub-pixel being provided with a light emitting unit, the signal driving circuit comprising:

the driving chip comprises a plurality of input pins and a plurality of output pins, wherein the input pins are used for receiving control signals or power signals, and the output pins are used for driving the light-emitting units of the sub-pixels;

a plurality of transfer lines each extending along a boundary of the sub-pixel and electrically coupled to the input pin; and

and each driving line is arranged between two adjacent transmission lines corresponding to the sub-pixels and is electrically coupled to the output pin.

2. The signal driving circuit of the display panel according to claim 1, wherein the transfer line is a data line, a control signal line, or a power supply line.

3. The signal driving circuit of claim 1, wherein the driving chip comprises a first side and a second side disposed opposite to each other,

two adjacent output pins on the first side are electrically coupled to the sub-pixels in the same color and two adjacent rows respectively; and

and two adjacent output pins positioned on the second side are respectively and electrically coupled to the sub-pixels in the same color and two adjacent rows.

4. The signal driving circuit of claim 1, wherein the spacing between the plurality of output pins of the driving chip satisfies the following relation:

P＝S/(n+1)；

and P is the distance between output pins, S is the width of each sub-pixel, and n is the row number of the same-color sub-pixels controlled by the single side of the driving chip.

5. The signal driving circuit of claim 1, wherein the transmission lines and the driving lines are perpendicular to connection lines between input pins and output pins of the driving chip.

6. The signal driving circuit of the display panel according to claim 1, wherein the light emitting unit is a light emitting diode.

7. The signal driving circuit of claim 1, wherein the signal driving circuit comprises a first driving chip and a second driving chip extending in a horizontal direction and disposed at an interval, each driving chip further comprises a third side, and an output pin on the third side is electrically coupled to the light emitting unit of the corresponding sub-pixel via the driving line.

8. The signal driving circuit according to claim 7, wherein the driving lines electrically coupled to the output pins on the third side are in an L-shaped trace.

9. The signal driving circuit of claim 1, wherein the driving line is located on a first metal layer and the transmission line is located on a second metal layer, wherein the second metal layer is different from the first metal layer.