CN105468562B - Chipset and server system - Google Patents

Abstract

The chip set applied to the server node of the server system has a south bridge, a north bridge, and an embedded management controller. The embedded management controller collects node internal information of the server node for server system management. The embedded management controller is coupled to a baseboard management controller. The baseboard management controller is arranged outside the server node, and communicates with the remote terminal through the network.

Description

Chipsets and Server Systems

technical field

The present invention relates to the technical field of server system management (server system management), in particular to a chipset and a server system.

Background technique

In a server system, an important issue is to monitor the network and the physical status of each server node. The intelligent platform management interface (Intelligent Platform Management Interface, referred to as IPMI) protocol is often used on the server system, but its communication protocol is very complicated. A low-cost and low-complexity server system management architecture is an important topic in this technical field.

Contents of the invention

The invention provides a chip set and a server system using the chip set.

A chipset provided by an embodiment of the present invention is applied to a server node of a server system and has an embedded management controller. The chipset also includes a southbridge as well as a northbridge. The embedded management chipset collects internal information of the server node for server system management. The embedded management controller is coupled to a baseboard management controller. The baseboard management controller is arranged outside the server node, and communicates with the remote terminal through the network.

Another embodiment of the present invention is a server system, including a plurality of server nodes, a baseboard management controller and a switch module. The server nodes each include a chipset. Each chipset includes a south bridge and a north bridge. The chipset on the server node is integrated into a chip with an embedded management controller. The above-mentioned embedded management controller is used to collect node internal information of the corresponding server node for use in server system management. The baseboard management controller is arranged outside the server node, and communicates with a remote terminal through the network. The switch module selectively connects the embedded management controllers of different server nodes to the baseboard management controller.

In one embodiment, the server system includes a blade. The plurality of server nodes, switch modules, and baseboard management controllers are arranged on the blade to form a blade server.

In another embodiment, the server system includes a backplane for inserting a plurality of blades. The plurality of server nodes are divided into a plurality of groups, and the groups are arranged on the blades. The baseboard management controller is arranged on the backboard instead of the blade. The switch module includes a plurality of switch sub-modules, which are respectively arranged on the blades. The embedded management controller on each blade is selectively coupled to the baseboard management controller via a switch sub-module on each blade.

In the chip set of the foregoing embodiments of the present invention and the server system using such a chip set, since the node internal information of each server node is collected and delivered to the embedded The management controller eMC, so the communication between the server node and the embedded management controller eMC thereon does not need to rely on the complex intelligent platform management interface (IPMI) protocol. A low-cost and low-complexity server system management architecture is thus established.

Hereinafter, specific embodiments are cited, and the contents of the present invention are described in detail in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 illustrates a server system 100 according to an embodiment of the present invention;

FIG. 2A illustrates a server system with a blade 202 according to an embodiment of the present invention;

Fig. 2B illustrates a server system according to another embodiment of the present invention, has a backplane (backplane) 204, and a plurality of blades (blades) Blade1 and Blade2 inserted on the backplane 204;

3 is a block diagram illustrating an embedded management controller eMC implemented according to an embodiment of the present invention;

4 is a flowchart illustrating how the embedded management controller eMC transmits the internal information of the node to the baseboard management controller BMC through a first switch (such as an I2C switch);

FIG. 5 illustrates the spatial configuration of the non-volatile memory 312, wherein the non-volatile memory 312 is shared by a server node and an embedded management controller eMC installed on the server node;

Fig. 6 illustrates the spatial configuration of the non-volatile memory 312, wherein the non-volatile memory 312 is shared by a plurality of server nodes and a plurality of embedded management controllers eMC installed on the server nodes;

FIG. 7A illustrates a logic circuit for setting the boot sequence of a server system. The server system has a plurality of server nodes Node1...Node4, and chipsets and embedded management controllers eMC on different server nodes Node1...Node4 are shown in the figure. 6 share the same flash memory 312; and

FIG. 7B illustrates a boot sequence of components installed on server system 700 according to one embodiment of the present invention.

Description of drawings:

100: server system; 102: remote terminal;

104: network; 202: blade;

204: backplane; 302: node internal information collection module;

304: the first communication interface controller; 306: the second communication interface controller;

308: memory interface controller; 312: non-volatile memory;

314: multiplexer; 402...414: steps;

502: basic input and output system (system BIOS) of the system;

602: the reading area of the basic input and output system of the server node;

604: the writing area of the server node Node1;

606: the writing area of the server node Node2;

608: the writing area of the server node Node3;

610: the writing area of the server node Node4;

702...738: steps;

BMC: baseboard management controller; CI_1…CI_M: interface module;

CPU: central processing unit; CS: control signal;

eMC: Embedded Management Controller; Image1, Image2: Firmware image;

MCU: microcontroller; Mux: multiplexer;

NB: North Bridge; Node1...NodeM: server node;

SB: South Bridge; SB_Bus: In-chip path supported by South Bridge SB;

SW: switch module; SW1, SW2: first and second switches.

Detailed ways

The following description lists various embodiments of the present invention. The following description introduces the basic concept of the present invention and is not intended to limit the content of the present invention. The actual scope of the invention should be defined according to the scope of the patent application.

FIG. 1 illustrates a server system 100 implemented according to an embodiment of the present invention. The server system 100 includes a plurality of server nodes Node1 . . . NodeM, a baseboard management controller BMC, and a switch module SW.

The server nodes Node1 . . . NodeM may be of similar architecture. Each server node includes a central processing unit CPU, and a chip set (chipset) composed of a north bridge NB and a south bridge SB. The north bridge NB and the south bridge SB can be two chips, or can be fabricated on a single chip. The embedded management controller eMC is correspondingly set on each server node. In some embodiments, the embedded management controller eMC is integrated into a chip including the south bridge SB. In the embodiment shown in FIG. 1, the embedded management controller eMC is integrated in the chipset. The embedded management controllers eMC respectively collect node internal information of the corresponding server nodes for use by server system management. The above-mentioned internal information of the node may include the information of the central processing unit CPU, the north bridge NB or the south bridge SB. In addition, the sensing data of sensors (eg, fan sensors) arranged on each server node may also be collected by the corresponding embedded management controller eMC as internal information of the node. Since the internal information of each server node is transmitted through the on-chip communication path supported by the chipset, the communication between the server node and the embedded management controller eMC installed on it does not need to rely on the aforementioned intelligent platform management interface ( IPMI) protocol. A low-cost and low-complexity server system management architecture is thus established. In addition, in addition to the collection of internal information of nodes (for example, collecting and reporting (collecting and reporting) the internal status of nodes), the embedded management controller eMC can also support the use of local area network (LAN) or serial local area network (SOL, serial over LAN) abbreviation) remote text console (remote text console); remote reboot/power-on/power-off operations, remote decision-making basic input and output system settings (remote audit BIOS setting ), event log (SEL) or field replaceable unit (FRU), BIOS boot order modification, or any combination of the above operations.

As shown in the figure, the baseboard management controller BMC is arranged outside the server nodes Node1 . . . NodeM, and communicates with the remote terminal 102 via the network 104 . The switch module SW selectively couples embedded management controllers (full symbol eMC) on different server nodes Node1 . . . NodeM to the baseboard management controller BMC.

In the embodiment shown in FIG. 1 , the switch module SW corresponds to a first communication interface (such as an internal integrated circuit interface, referred to as I2C) to provide a first switch SW1 and corresponds to a second communication interface (such as Universal Asynchronous Transceiver Transmission device, referred to as UART) provides a second switch SW2. Through the first switch SW1, the node internal information of different server nodes Node1...NodeM can be transmitted to the baseboard management controller BMC, and the node external information (such as node control commands and other information sent by the remote terminal 102) can be controlled from the baseboard management The server BMC is sent to the server nodes Node1 to NodeM. As shown in the figure, the first switch SW1 may have a plurality of interface modules CI_1 . . . CI_M (eg, I2C module) and a multiplexer Mux. The interface modules CI_1...CI_M are respectively coupled to the embedded management controllers eMC on different server nodes Node_1...Node_M. The multiplexer Mux is used for selectively coupling one of the interface modules CI_1 . . . CI_M to the baseboard management controller BMC. Specifically, the embedded management controller eMC is coupled to the first switch SW1 and the baseboard management controller BMC with a first serial bus (eg, I2C bus). The protocol is simple. The connection and communication of the whole server system are thus simplified; in addition, the above communication can be initiated by the baseboard management controller BMC or the embedded management controller eMC. This will be discussed in detail later with reference to FIG. 4 . As for some specific node external requests sent by the BMC for server system management, the second switch SW2 determines how the BMC sends them to the nodes Node1 . . . NodeM. For example, SOL operation is a node-specific external requirement to enable serial port input and output of a server node to be redirected via Internet Protocol (IP). Such communications required externally to a particular node are initiated by the baseboard management controller BMC, but not by the embedded management controller eMC. The second switch SW2 is used to establish a connection between the baseboard management controller BMC and the embedded management controllers eMC on different server nodes Node1 . Specifically, the embedded management controller eMC is coupled to the second switch SW2 and the baseboard management controller BMC via a second serial bus (such as a UART bus). The communication protocol of the second serial bus is also far simpler than the IPMI protocol.

In one embodiment, the baseboard management controller BMC and a plurality of server nodes can be set on a blade. FIG. 2A is a server system implemented according to an embodiment of the present invention, including a blade 202 . The blade 202 is provided with a plurality of server nodes Node1 . . . Node4 , a switch module (including first and second switches SW1 and SW2 ), and a baseboard management controller BMC. The remote terminal 102 communicates with the embedded management controllers eMC on different server nodes Node1...Node4 via the management network interface card on the baseboard management controller BMC to collect internal information of the nodes and control the internal status of the nodes . In one embodiment, the first switch SW1 is implemented based on the I2C protocol, and the second switch SW2 is implemented based on the UART protocol. The baseboard management controller BMC obtains the internal information of the node from the embedded management controller eMC via the I2C bus, and transmits the obtained internal information of the node to the remote terminal 102 via the network 104 according to the IPMI protocol. SOL and some other specific operations are based on the UART bus between the Baseboard Management Controller BMC and server nodes Node1...Node4. In particular, although the blade 202 only draws 4 server nodes, it is not intended to limit the number of server nodes on the blade. Other numbers of server nodes can be set on the blade.

As shown in FIG. 1 , the server nodes Node1 . . . NodeM of the server system 100 can be divided into multiple groups, and server nodes of different groups are arranged on different blades. FIG. 2B illustrates a server system with a backplane 204 and a plurality of blades Blade1 and Blade2 inserted on the backplane 204 . As shown in the figure, a group of server nodes Node1 and Node2 are provided on the blade Blade1, and a group of server nodes Node3 and Node4 are provided on the blade Blade2. The baseboard management controller BMC is set on the backplane 204 instead of the blade Blade1 or the blade Blade2. The switch module includes a plurality of switch sub-modules SW_s1 and SW_s2, respectively disposed on the blade Blade1 and the blade Blade2, so that the embedded management controller eMC on each blade can be coupled to the baseboard management controller BMC. As shown in the figure, each switch sub-module SW_s1 and SW_s2 includes a first switch and a second switch. As previously discussed, the first switch can follow the I2C protocol and the second switch can follow the UART protocol. In particular, assuming that each blade has the same number of server nodes (for example, each blade has 4 server nodes), the baseboard management controller BMC on the backplane 204 of FIG. 2B needs to be stronger than the baseboard management controller BMC on the blade 202 of FIG. 2A . But in comparison, the server system in FIG. 2B is cheaper than the server system in FIG. 2A because each blade of the server system in FIG. 2A is provided with a dedicated baseboard management controller BMC.

FIG. 3 is a block diagram illustrating an embedded management controller eMC according to one embodiment of the present invention. The embedded management controller eMC includes a microcontroller MCU, a node internal information collection module 302, two communication interface controllers (including a first communication interface controller 304 and a second communication interface controller 306) and a memory interface controller 308 . The node internal information collection module 302 is operated by the microcontroller MCU, and follows the chip internal communication protocol supported by the chipset to collect information on components (such as the central processing unit CPU, South Bridge SB, North Bridge NB and fans, etc.) on the server node. Node internal information. The first communication interface controller 304 is controlled by the microcontroller MCU, transmits node internal information to the baseboard management controller BMC through the first switch SW1, and receives node external information from the baseboard management controller BMC through the first switch SW1. Specifically, the first communication interface controller 304 is coupled to the first switch SW1 and the baseboard management controller BMC via a first serial bus (eg, I2C bus). The communication protocol of the first serial bus is much simpler than the IPMI protocol. The second communication interface controller 306 is coupled to the second switch SW2 and is controlled by the microcontroller MCU to receive external node requirements sent by the baseboard management controller BMC for server system management. Specifically, the second communication interface controller 306 is coupled to the second switch SW2 and the baseboard management controller BMC via a second serial bus (such as a UART bus). The communication protocol of the second serial bus is much simpler than the IPMI protocol. The memory interface controller 308 is controlled by the microcontroller MCU to access a non-volatile memory 312 . The non-volatile memory 312 is shared by the server node and the embedded management controller eMC on the server node. The non-volatile memory 312 can be flash memory, and the memory interface controller 308 can follow a serial peripheral interface (SPI) protocol. The multiplexer 314 is used to set the access path of the non-volatile memory 312 . Through the switching control signal CS, the non-volatile memory 312 can be accessed by the embedded management controller eMC via the memory interface controller 308 , or accessed by the south bridge SB via the on-chip path SB_Bus supported by the south bridge SB.

This paragraph discusses how to transmit the internal information of the node to the baseboard management controller BMC through the embedded management controller eMC. Since the embedded management controllers eMC of multiple server nodes are coupled to the same baseboard management controller BMC via the switch module, when the embedded management controller eMC of a certain server node needs to initiate the transmission of node internal information to the baseboard management controller BMC During transmission, the following interrupt mechanism needs to be used: before transmitting the internal information of the node to the baseboard management controller BMC, the microcontroller MCU establishes (assert) an interrupt status "INT", so that the baseboard management controller BMC can use the interrupt status "INT" INT" to distinguish the server node from other server nodes. If the microcontroller MCU receives the approval command “Grant” output by the baseboard management controller BMC to the server node whose interrupt state “INT” is established, the microcontroller MCU controls the first communication interface controller 304 to start transmitting the internal information of the node to the baseboard Management controller BMC. One embodiment implements the embedded management controller eMC with a controller of 8051 architecture. The microcontroller MCU may be an 8051 microcontroller.

FIG. 4 is a flowchart illustrating how the embedded management controller eMC transmits node internal information to the baseboard management controller BMC via a first switch (eg, an I2C switch). Step 402 , the microcontroller MCU of the embedded management controller eMC fills in a slave data I/O buffer register of the first communication interface controller 304 to establish an interrupt state “INT”. In step 404, the microcontroller MCU uses a GPIO pin to indicate the assertion of the interrupt state "INT" to the first switch SW1. Step 406, the Baseboard Management Controller BMC observes the assertion of the interrupt state "INT" via the first switch SW1. Step 408, the baseboard management controller BMC reads a slave interrupt status in the slave data input/output buffer register of the first communication interface controller 304 of each embedded management controller eMC, and recognizes that the interrupt status "INT" is established server node. In step 410, the baseboard management controller BMC outputs the approval command "Grant" to the first communication interface controller 304 of the server node established in the interrupt state "INT", and the first switch SW1 is switched to be between the baseboard management controller BMC and the interrupt state "INT". INT" to establish a connection between the server nodes established. One embodiment is to establish a connection by initiating a corresponding one of the interface modules CI_1 . . . CI_M. Step 412 , the first communication interface controller 304 of the server node whose interrupt status “INT” is established outputs an interrupt signal to its own microcontroller MCU. Corresponding to the interrupt state "INT" asserted by the slave data I/O buffer in step 402, the microcontroller MCU will allow data to be transmitted to the baseboard management controller BMC via the first switch SW1. Step 414 , the microcontroller MCU fills in master-related registers in the first communication interface controller 304 to start data transmission. As for how the baseboard management controller BMC transmits the node external information to the embedded management controller eMC through the first switch (eg, I2C switch), it is simpler. The baseboard management controller BMC directly starts the interface module (one of CI_1 . . . CI_M) corresponding to the target server node, and then starts to transmit the external information of the node to the embedded management controller eMC on the target server node.

FIG. 5 illustrates a space configuration of the non-volatile memory 312, wherein the non-volatile memory 312 is shared by a server node and an embedded management controller (eMC) disposed on the server node. In addition to embedded management controller firmware images (eMC firmware images) Image1 and Image2 (Image2 is, for example, a backup of Image1), the non-volatile memory 312 also configures a space 502 for the system firmware of the server node. The system firmware can be, for example, a basic input output system (system BIOS) of the system.

FIG. 6 illustrates another space configuration of the non-volatile memory 312, wherein the non-volatile memory 312 is shared by a plurality of server nodes and embedded management controllers eMC disposed on the server nodes. The following takes four server nodes Node1...Node4 as an example. In addition to the embedded management controller firmware image (eMC firmware image) Image1 and Image2, the non-volatile memory 312 also configures a space 602, which is used as a reading area of the server node basic input and output system (for example, storing the basic input and output system program code), and as the writing area of different server nodes Node1...Node4. For example, the writing area 604 corresponding to the server node Node1, the writing area 606 corresponding to the server node Node2, the writing area 608 corresponding to the server node Node3, and the writing area 610 corresponding to the server node Node4.

FIG. 7A illustrates a logic circuit for controlling the boot sequence of components on the server system 700 . The server system 700 includes a plurality of server nodes Node1...Node4 and chipsets of different server nodes Node1...Node4. The server node and the embedded management controller eMC installed on the chip set of each server node share the same flash memory ( 312 ) as shown in FIG. 6 . When the baseboard management controller BMC asserts a power-on signal BMC_RSMRST#, the embedded management controller eMC of the server node Node1 is thus activated and asserts the signal 704 . Therefore, the output of the logic 'AND' gate 706 is pulled up, the embedded management controller eMC of the server node Node2 is thus activated, and the signal 708 is asserted. Therefore, the output of the logic 'AND' gate 710 is pulled up, and the embedded management controller eMC of the server node Node3 is thus activated and the signal 712 is asserted. Therefore, the output of the logic 'AND' gate 714 is pulled up, and the embedded management controller eMC of the server node Node4 is started accordingly. The embedded management controllers eMC of the server nodes Node1 . . . Node4 in the server system 700 are thus started separately sequentially, accessing the flash memory ( 312 ) time-sharingly to read the embedded management controller firmware code therein. After the embedded management controllers eMC on the server nodes Node1 . . . Node4 of the server system 700 start, they will respectively start the chip sets of the corresponding server nodes. The chipsets on the server nodes Node1...Node4 are started one by one, and access the flash memory (312) in time-sharing to obtain the server node firmware code (eg, BIOS code). In one embodiment, the startup sequence of the embedded management controllers eMC on the server nodes Node1...Node4 of the server system 700 is the same as the startup sequence of the server nodes Node1...Node4. FIG. 7B illustrates the startup sequence of components on server system 700 according to one embodiment of the invention. Step 722 , the baseboard management controller BMC asserts a power-on signal BMC_RSMRST# for the server system 700 . In steps 724...730, the embedded management controllers eMC of the server nodes Node1...Node4 of the server system 700 start up sequentially. In steps 732...738, the chip sets of the server nodes Node1...Node4 of the server system 700 are started up sequentially.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection should depend on what is defined in the claims.

Claims (6)

1. a kind of server system, which is characterized in that including：

A plurality of server nodes include respectively a chipset with north bridge and south bridge, wherein corresponding to each server node also An embedded management controller is integrated respectively in the chipset of corresponding server node, and the embedded management controls The intra-node information that device collects corresponding server node is used for server system management；

One Baseboard Management Controller is made in the outside of the server node, and is communicated via network and a remote terminal；With And

Embedded management controller on the different server node is selectively coupled to the substrate tubes by one switch module Manage controller；

Wherein, the embedded management controller transmission node internal information of one of described server node to the baseboard management controls Before device, an interrupt status, the server node for enabling the Baseboard Management Controller to establish the interrupt status are also established It is distinguished with other server nodes；

The embedded management controller further includes：

One memory interface controller is accessed in a non-volatility memorizer, which is also shared on storage institute The system firmware of the server node of category；

The embedded management controller of a plurality of server nodes shares the non-volatility memorizer, and the non-volatile holographic storage Device is allocated for storing firmware code for embedded management controller；

The non-volatility memorizer is further configured the write area for providing different server node；

The embedded management controller sequential start of server node starts it in the embedded management controller of server node Afterwards, the chipset sequential start of server node.

2. server system according to claim 1, which is characterized in that further include：

The server node, the switch module and the Baseboard Management Controller is arranged in one blade.

3. server system according to claim 1, which is characterized in that further include：

One backboard and a plurality of blades for being plugged in the backboard；

Wherein：

The server node is divided into plural groups, and the server node of different groups is arranged on different blades；And

The Baseboard Management Controller is arranged on the backboard, rather than is arranged on the blade；

The switch module includes a plurality of switch submodules, is separately positioned on the blade, to couple the embedded of each blade Management Controller is to the Baseboard Management Controller.

4. server system according to claim 1, which is characterized in that each embedded management controller includes：

One microcontroller；And

One first communication interface controller, transmission node internal information to the baseboard management controls under microcontroller control Device and from the Baseboard Management Controller receiving node external information,

Wherein, which couples the Baseboard Management Controller through one first universal serial bus.

5. server system according to claim 1, it is characterised in that：

When receiving a collection of quasi instruction that the Baseboard Management Controller sends out the server node that the interrupt status is established, Embedded management controller in the server node that the interrupt status is established starts transmission node internal information to the bottom Board management controller.

6. server system according to claim 4, which is characterized in that the embedded management controller respectively also wraps It includes：

One second communication interface controller is controlled by the microcontroller of corresponding embedded management controller, is somebody's turn to do with receiving The node external demand that Baseboard Management Controller is sent for the server system management,

Wherein, which couples the Baseboard Management Controller via one second universal serial bus.