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CN105448819B - A kind of structure for avoiding silicon wafer fairlead from whitening and technique processing method - Google Patents

A kind of structure for avoiding silicon wafer fairlead from whitening and technique processing method Download PDF

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Publication number
CN105448819B
CN105448819B CN201610007830.6A CN201610007830A CN105448819B CN 105448819 B CN105448819 B CN 105448819B CN 201610007830 A CN201610007830 A CN 201610007830A CN 105448819 B CN105448819 B CN 105448819B
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silicon wafer
fairlead
whitening
oxide layer
avoiding
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CN105448819A (en
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张卫平
陈强
张复才
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JIANGSU BOPU ELECTRONIC TECHNOLOGY Co Ltd
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JIANGSU BOPU ELECTRONIC TECHNOLOGY Co Ltd
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Abstract

The invention discloses a kind of structure for avoiding silicon wafer fairlead from whitening and technique processing method, before silicon wafer evaporation treatment process, the difference on silicon wafer between fairlead surface texture and oxide layer is reduced.The structure and technique processing method for avoiding silicon wafer fairlead from whitening using the present invention, the appearance for even completely avoiding fairlead blushing can be reduced, silicon chip surface is set not have obvious color difference, it avoids when equipment in subsequent technique identifies silicon wafer because of judgement processing mistake caused by color difference, improves silicon wafer encapsulation yield.

Description

A kind of structure for avoiding silicon wafer fairlead from whitening and technique processing method
Technical field
The present invention relates to a kind of structure for avoiding silicon wafer fairlead from whitening and technique processing methods, more particularly to a kind of three poles The technique processing method that pipe silicon wafer fairlead whitens.
Background technique
In the manufacturing process of triode, often will appear a kind of phenomenon, i.e., the metal layer of silicon wafer different regions (i.e. In N-doped zone, P-doped zone and oxidation layer surface) metallic luster of display has a notable difference, and referred to as fairlead is sent out It is white.Since the appearance of fairlead blushing is carrying out subsequent process such as so that there are serious color difference for silicon chip surface During routing, it will lead to equipment identification and the problem of serious misjudgment occur, interrupted so as to cause routing or maloperation, Triode silicon wafer encapsulation yield is seriously affected.
Summary of the invention
The technical problem to be solved by the present invention is to overcome the deficiencies of existing technologies, provide what a kind of silicon wafer fairlead whitened Technique processing method.
In order to solve the above technical problems, the present invention provides a kind of technique processing method for avoiding silicon wafer fairlead from whitening, It is characterized in, before silicon wafer evaporation treatment process, reduces the difference on silicon wafer between fairlead surface texture and oxide layer.
Before silicon wafer evaporation treatment process, layer of oxide layer is formed in lead hole surface.
Silicon wafer forms layer of oxide layer in cleaning process, in lead hole surface.
Clean silicon sign when, first using HF solution clean, HF solution, that is, diluted hydrofluoric acid aqueous solution, hydrofluoric acid HF with The proportion of water is 1:20;
Oxide layer is generated using SH liquid or SC -1 liquid again;
SH liquid: being sulfuric acid and oxydol H2O2Mixed solution, match as 4:1;
SC-1: being the mixed liquor of ammonium hydroxide, hydrogen peroxide and water, NH3H2O:H2O2:H2The proportion of O is 1:1:5.
Change silicon contact layer surface texture at fairlead by reducing the indoor vacuum degree of evaporator chamber.
When being evaporated treatment process to silicon wafer, after loading wafer, the vacuum degree vacuumized in evaporator chamber is not surpassed Cross 5E-6 Torr.
After vacuumizing in evaporator chamber, after chamber heating, the vacuum degree vacuumized again is no more than 2E-6 Torr。
A kind of structure for avoiding silicon wafer fairlead from whitening, characterized in that in one oxide layer of silicon wafer doped region Surface Creation, resistance Gear metal is directly contacted with naked silicon wafer doped region.
In the contact interface of metal and the naked silicon wafer of heavy doping, increase oxide layer as buffer layer.
The oxide layer is the buffer layer after the natural oxidizing layer for removing naked silicon chip surface by oxidizing generation.It is described Buffer layer is by sulfuric acid and oxydol H2O2Mixed solution aoxidize generate.
The aqueous solution of hydrofluoric acid is removed (this layer of nature to the natural oxidizing layer of silicon chip surface exposed formation in air Oxide layer is to device nocuousness), then by sulfuric acid and oxydol H2O2Mixed solution micro- oxygen is carried out to silicon chip surface in the process of cleaning Change, thus formed metal contacted with the naked silicon face of heavy doping in buffer layer.
Advantageous effects of the invention:
The technique processing method to be whitened using silicon wafer fairlead of the invention, it is possible to reduce even completely avoid fairlead hair The appearance of Bai Xianxiang makes silicon chip surface not have obvious color difference, avoids when equipment identifies silicon wafer in subsequent technique because color difference causes Judgement handle mistake, improve silicon wafer encapsulation yield.
Detailed description of the invention
Fig. 1 is the structure presentation that fairlead whitens;
Fig. 2 is the embodiment for reducing fairlead and whitening.
Specific embodiment
The invention will be further described below.Following embodiment is only used for clearly illustrating technical side of the invention Case, and not intended to limit the protection scope of the present invention.
Triode is directed in the present embodiment in the fabrication process, the silicon wafer fairlead blushing of appearance has carried out big The test and exploratory development of amount.The heuristic process of part test is only provided below:
One, preliminary test:
The wafer of 1 batch is divided on the evaporator of two different models using identical technique, and S778 equipment will not go out Existing fairlead blushing, S779 equipment then will appear fairlead and whitens.In view of this, respectively to two equipment in technological parameter Deposition rate, temperature, planet carrier revolving speed, vacuum etc. are adjusted, and find the variation adjustment of these technological parameters to drawing String holes blushing has not significant impact and changes.
Then from equipment aspect searce way.Do following tests:
Equipment part used in replacement test, which includes: electron gun filament, planet carrier, baffle etc. find these The variation adjustment of equipment part also has not significant impact and changes to fairlead blushing.
Two, it analyzes and researches
The subsequent manufacture that S778 equipment estrade is employed many times and carries out triode silicon wafer, wherein the technique that evaporation technology uses Scheme are as follows: wafer (i.e. silicon wafer) cleaning after be placed in the chamber of evaporator, vacuumize → be evacuated to 5E-7 support (Torr) → → guaranteeing 150 degrees Celsius of chamber → is heated to chamber be evacuated to 1E-6 Torr → start and wafer is evaporated, also have found successively The chip that many fairleads whiten.
The problem of due to silicon face and oxidation layer surface?
Referring to the evaporator heating methods of other L770 equipment, (L770 equipment has been begun in the moment that high threshold is opened to chamber The heating of room), formulate the improvement project for carrying out triode manufacture evaporation technology using S778 equipment are as follows:
After loading wafer, 5E-6 Torr → heating to chamber → is vacuumized → be evacuated to evaporator chamber and guarantee chamber Room is 150 degrees Celsius → being evacuated to 2E-6Torr → and starts to be evaporated wafer.
By using the improvement project, there is the phenomenon that fairlead whitens much in 7 working days tracked Less than the ratio (but cannot prevent) occurred before.
Three, speculate reason
The most likely reason of the phenomenon is analyzed:
Oxide layer Oxide: belong to vitreous structure;
Monocrystalline EPI: belong to crystal structure, long-range order.
Emitter E, the base stage B area of triode silicon wafer are heavily doped after EPI as a result, there are crystal structures, but can also Can be after continuous doping after EPI, thermal process, etching etch etc., so that plane of crystal changes, crystal structure is broken It is bad, become shortrange order or disorderly arranged.Or may also structure remain unchanged.
It is the surface texture due to fairlead 1 different from oxidation to deduce the producing cause of fairlead blushing The surface texture of layer Oxide produces fairlead blushing, as shown in Figure 1.
Four, it takes measures
It is obtained it is possible thereby to analyze, fairlead blushing is the normal morphology that metal layer is contacted with heavily-doped Si (crystal).
When evaporation equipment vacuum degree is not high, bad, Al atom carries out silicon chip surface deposit arrangement in evaporation process, due to Poor vacuum degree leads to that Si plane of crystal is oxidized or other impurities are deposited to the silicon contact layer of silicon wafer, so that its surface connects It is bordering on the surface texture of oxide layer, the silicon chip surface for depositing out tends to unanimously.When evaporation equipment vacuum degree is fine, Al is former Then there is the phenomenon that fairlead whitens there is no any variation in the sub silicon chip surface and Si plane of crystal of smoothly reaching.
Analyzed according to above-mentioned theory: eliminating the major measure that (or reduction) fairlead whitens is to improve Al- silicon contact layer table Face.
Concrete measure has:
1, evaporation equipment vacuum is reduced, fairlead can not be completely eliminated using the program and whitened, fairlead can only be reduced The ratio whitened;Although the lower meeting of vacuum degree is so that silicon wafer in addition, the program can inhibit hole to whiten to a certain extent Surface is possible to contaminated.
2, before the evaporation to 1 surface of fairlead formed one layer of thin oxide layer 2, as shown in Figure 2, it is therefore an objective to so that the surface Si with Oxidation layer surface is consistent, and concrete scheme is:
The cleaning process of evaporization process is changed are as follows: HF solution+SH liquid (or SC -1 liquid).The natural oxygen generated in this way Change layer, to reach the surface for improving aluminium and silicon contact layer.
HF: the aqueous solution of diluted hydrofluoric acid, general HF and H2The proportion of O is 1:20;
SH liquid: being sulfuric acid and oxydol H2O2Mixed solution, match as 4:1;
SC-1: being the mixed liquor of ammonium hydroxide, hydrogen peroxide and water, NH3H2O:H2O2:H2The proportion of O is 1:1:5).
Prevent fairlead by changing cleaning condition to whiten the probability of appearance, and is tested through test of many times, change cleaning Condition will not the contact (electrical parameter) to chip have an impact, product parameters are normal.
Five, experimental verification
In order to verify the correctness for speculating principle and analysis, and test of many times comparison is carried out, has only listed primary examination below Test comparison:
Cleaning way (SC-1 liquid+HF solution) Cleaning way (HF solution+SC-1 liquid)
Batch Piece number Piece number
57597TB 1;2;3 This batch remaining 22
57357PB 1;2;3 This batch remaining 22
57233PB 1;2;3 This batch remaining 22
56151SB 3;5;6 This batch remaining 22
The deposit of metal is carried out using S778 equipment, every batch of/furnace is evaporated,
After being evaporated, full inspection is carried out to above-mentioned 4 batches, there is following phenomenon:
It can be seen that just there is fairlead hair after only evaporating using the silicon wafer of cleaning way (SC-1 liquid+HF solution) Bai Xianxiang, and there is the phenomenon that fairlead whitens that appearance is not a piece of in cleaning way (HF solution+SC-1 liquid).
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art For member, without departing from the technical principles of the invention, several improvement and deformations can also be made, these improvement and deformations Also it should be regarded as protection scope of the present invention.

Claims (7)

1. a kind of technique processing method for avoiding silicon wafer fairlead from whitening, characterized in that before silicon wafer evaporation treatment process, reduce silicon Difference between on piece fairlead surface texture and oxide layer;
Before silicon wafer evaporation treatment process or when cleaning process, layer of oxide layer is formed in lead hole surface;
When cleaning silicon chip, cleaned first using HF solution, HF solution, that is, diluted hydrofluoric acid aqueous solution, hydrofluoric acid HF and water Proportion is 1:20;
Oxide layer is generated using SH liquid or SC -1 liquid again;
SH liquid: being sulfuric acid and oxydol H2O2Mixed solution, match as 4:1;
SC-1: being the mixed liquor of ammonium hydroxide, hydrogen peroxide and water, NH3H2O:H2O2:H2The proportion of O is 1:1:5.
2. the technique processing method according to claim 1 for avoiding silicon wafer fairlead from whitening, characterized in that steamed by reducing It sends out the indoor vacuum degree of platform chamber and changes silicon contact layer surface texture at fairlead.
3. the technique processing method according to claim 1 for avoiding silicon wafer fairlead from whitening, characterized in that carried out to silicon wafer When evaporation treatment process, after loading wafer, 5E-6 Torr is no more than to the vacuum degree vacuumized in evaporator chamber.
4. the technique processing method according to claim 3 for avoiding silicon wafer fairlead from whitening, characterized in that evaporator chamber After interior vacuumizes, after chamber heating, the vacuum degree vacuumized again is no more than 2E-6 Torr.
5. a kind of structure for avoiding silicon wafer fairlead from whitening, characterized in that in one oxide layer of silicon wafer doped region Surface Creation, stop Metal is directly contacted with silicon wafer doped region;
Before silicon wafer evaporation treatment process or when cleaning process, layer of oxide layer is formed in lead hole surface;
When cleaning silicon chip, cleaned first using HF solution, HF solution, that is, diluted hydrofluoric acid aqueous solution, hydrofluoric acid HF and water Proportion is 1:20;
Oxide layer is generated using SH liquid or SC -1 liquid again;
SH liquid: being sulfuric acid and oxydol H2O2Mixed solution, match as 4:1;
SC-1: being the mixed liquor of ammonium hydroxide, hydrogen peroxide and water, NH3H2O:H2O2:H2The proportion of O is 1:1:5.
6. the structure according to claim 5 for avoiding silicon wafer fairlead from whitening, characterized in that in the naked of metal and heavy doping The oxide layer is arranged as buffer layer in the contact interface of silicon wafer.
7. the structure according to claim 6 for avoiding silicon wafer fairlead from whitening, characterized in that the oxide layer is that removal is naked By the buffer layer of oxidizing generation after the natural oxidizing layer of silicon chip surface.
CN201610007830.6A 2016-01-06 2016-01-06 A kind of structure for avoiding silicon wafer fairlead from whitening and technique processing method Active CN105448819B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104103624A (en) * 2013-04-10 2014-10-15 中芯国际集成电路制造(上海)有限公司 Anti-fuse structure and method for forming the same
CN205335240U (en) * 2016-01-06 2016-06-22 江苏博普电子科技有限责任公司 Avoid structure that silicon chip pin hole turns white

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Publication number Priority date Publication date Assignee Title
US8354336B2 (en) * 2010-06-22 2013-01-15 International Business Machines Corporation Forming an electrode having reduced corrosion and water decomposition on surface using an organic protective layer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104103624A (en) * 2013-04-10 2014-10-15 中芯国际集成电路制造(上海)有限公司 Anti-fuse structure and method for forming the same
CN205335240U (en) * 2016-01-06 2016-06-22 江苏博普电子科技有限责任公司 Avoid structure that silicon chip pin hole turns white

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