CN105407311A - Television receiving signal processing method and device - Google Patents
Television receiving signal processing method and device Download PDFInfo
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- CN105407311A CN105407311A CN201510737835.XA CN201510737835A CN105407311A CN 105407311 A CN105407311 A CN 105407311A CN 201510737835 A CN201510737835 A CN 201510737835A CN 105407311 A CN105407311 A CN 105407311A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/015—High-definition television systems
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Abstract
The invention provides a television receiving signal processing method and device. The television receiving signal processing method comprises the steps that received first video signals are converted into second video signals and third video signals; the data volume of the first video signals is the sum of the data volume of the second video signals and the third video signals; and after the two high-definition multimedia interfaces HDMI of a system on chip SOC respectively receive the second video signals and the third video signals, the corresponding frames of the second video signals and the third video signals are synthesized into the first video signals. The converted second video signals and the third video signals can be synthesized into the first video signals finally so that the problem of data loss does not exist.
Description
Technical field
The present invention relates to Display Technique field, particularly relate to one
the processing method of TV receiving signal and device.
Background technology
At present, along with the development of Display Technique, and the continuous lifting that people require video definition, the range of application of ultra high-definition (UltraHighDefinition is called for short UHD) display unit is also more and more wider, especially UHD TV.
In existing most of UHD TV, due to the restriction of hardware, SOC (system on a chip) (SystemonChip, be called for short SOC) HDMI (High Definition Multimedia Interface) (HighDefinitionMultimediaInterface, be called for short HDMI) 1.4 bandwidth only have 3 giga bits per second (Gbps), therefore can only support to carry the relatively less 4K30HzYC of image signal data amount
bc
rthe reception of the signal of 4:2:210bit, wherein, 4K represents that resolution be 4096 × 2160,30Hz presentation video refreshing frequency is 30Hz, YC
bc
rfor brightness and the chrominance information of picture signal, 4:2:2 represents that every 4 pixels have 4 luminance components, 4 chromatic components (YYYYCbCrCbCr), and 4K60HzYC
bc
rthe signal bandwidth of 4:2:210bit reaches 6Gbps, and therefore for this signal, common HDMI1.4 interface cannot receive and show.For the problems referred to above, way conventional in prior art is by increasing Bridge (Bridge) by 4K60HzYC
bc
rthe signal down of 4:2:210bit is 4K30HzYC
bc
rthe signal of 4:2:210bit, or by 4K60HzYC
bc
rthe signal of 4:2:210bit is converted to 4K60HzYC
bc
r4:2:010bit, the object done like this is that 6Gbps data volume is reduced to 3Gbps, therefore HDMI1.4 can normally receive and show, but aforesaid way is owing to have modified the initial data frame information of this type of ultra high-definition signal, therefore inevitably there is the problem of data degradation, affect the display effect of user.
Summary of the invention
The invention provides one
the processing method of TV receiving signal and device, during to overcome in prior art and to receive ultra high-definition signal, there is the problem of data degradation.
First aspect, the invention provides a kind of processing method of TV receiving signal, comprising:
The first vision signal received is converted to the second vision signal and the 3rd vision signal; The data volume of described first vision signal is the data volume sum of described second vision signal and described 3rd vision signal;
After two HDMI (High Definition Multimedia Interface) HDMI of SOC (system on a chip) SOC receive the second vision signal and the 3rd vision signal respectively, the corresponding frame of the second vision signal and the 3rd vision signal is synthesized the first vision signal
Second aspect, the invention provides a kind of processing unit of TV receiving signal, comprising:
Modular converter, for being converted to the second vision signal and the 3rd vision signal by the receive first vision signal; The data volume of described first vision signal is the data volume sum of described second vision signal and described 3rd vision signal;
Recovery module, for after two HDMI (High Definition Multimedia Interface) HDMI of SOC (system on a chip) SOC receive the second vision signal and the 3rd vision signal respectively, synthesizes the first vision signal by the corresponding frame of the second vision signal and the 3rd vision signal.
The present invention
the processing method of TV receiving signal and device, by the receive first vision signal is converted to the second vision signal and the 3rd vision signal; The data volume of the first vision signal is the data volume sum of the second vision signal and the 3rd vision signal; After two HDMI of SOC (system on a chip) SOC receive the second vision signal and the 3rd vision signal respectively, the corresponding frame of the second vision signal and the 3rd vision signal is synthesized the first vision signal, compared to existing technology, by 4K60HzYC
bc
rthe signal down of 4:2:210bit is 4K30HzYC
bc
rthe signal of 4:2:210bit, or by 4K60HzYC
bc
rthe signal of 4:2:210bit is converted to 4K60HzYC
bc
r4:2:010bit, because initial signal frame lost by signal that change rear transmission, therefore cannot reduce, the problem of data degradation will inevitably be there is, affect the display effect of user, and in the present invention, because the second vision signal after conversion and the 3rd vision signal do not lose initial data frame information, and finally can synthesize the first vision signal, therefore can not there is the problem of data degradation.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to use to required in embodiment or description of the prior art below
accompanying drawingbe briefly described, apparently, in the following describes
accompanying drawingsome embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, can also according to these
accompanying drawingobtain other
accompanying drawing.
fig. 1for the flow process of processing method one embodiment of TV receiving signal of the present invention is illustrated
figure;
fig. 2for the Signal transmissions of the inventive method one embodiment is illustrated
figure;
fig. 3for the structural representation of processing unit one embodiment of TV receiving signal of the present invention
figure;
fig. 4for the structural representation of TV one embodiment of the present invention
figure.
Embodiment
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with in the embodiment of the present invention
accompanying drawing, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
The processing method of the TV receiving signal of the embodiment of the present invention can be applied in TV, carry out processing and receiving mainly for the vision signal received in TV, and the signal after process is reduced, be described to be treated to example to ultra high-definition signal in specific embodiment.
With embodiment particularly, technical scheme of the present invention is described in detail below.These specific embodiments can be combined with each other below, may repeat no more for same or analogous concept or process in some embodiment.
fig. 1for the flow process of processing method one embodiment of TV receiving signal of the present invention is illustrated
figure.The executive agent of the present embodiment is the processing unit of TV receiving signal, and this device is arranged in TV.
as Fig. 1shown in, the method for the present embodiment, comprising:
Step 101, the first vision signal received is converted to the second vision signal and the 3rd vision signal; The data volume of the first vision signal is the data volume sum of the second vision signal and the 3rd vision signal;
Step 102, after two HDMI (High Definition Multimedia Interface) HDMI of SOC (system on a chip) SOC receive the second vision signal and the 3rd vision signal respectively, the corresponding frame of the second vision signal and the 3rd vision signal is synthesized the first vision signal.
Specifically, due to the continuous lifting that people require video definition, increasing video resource is ultra high-definition signal resource, but in existing most of UHD TV, due to the restriction of hardware, the bandwidth of the HDMI1.4 of SOC only has 3Gbps, therefore can only support 4K30HzYC
bc
rthe reception of the signal of 4:2:210bit, and 4K60HzYC
bc
rthe signal bandwidth of 4:2:210bit reaches 6Gbps, therefore cannot receive for this signal and show.
For the problems referred to above, in the embodiment of the present invention, the first vision signal received is converted to the second vision signal and the 3rd vision signal by the modular converter of the processing unit of TV receiving signal, and the data volume of the first vision signal is the data volume sum of the second vision signal and the 3rd vision signal; Then after two HDMI (High Definition Multimedia Interface) HDMI of SOC receive the second vision signal and the 3rd vision signal respectively, the corresponding frame of the second vision signal and the 3rd vision signal is synthesized the first vision signal by SOC, be about to the second vision signal of receiving and the 3rd vision signal is reduced to the first vision signal, and the bandwidth of the second vision signal and the 3rd vision signal meets the bandwidth restriction of HDMI.
Below with 4K60HzYC
bc
rthe ultra high-definition signal of 4:2:210bit is that example is described:
By this 4K60HzYC
bc
rthe ultra high-definition signal of 4:2:210bit is converted to the second vision signal and the 3rd vision signal, and the second vision signal and the 3rd vision signal are two 2K60HzYC
bc
rthe signal of 4:2:210bit, 4K ordinary representation resolution is 3840 × 2160 in actual applications, therefore 2K represents that resolution is 1920 × 2160, second vision signal is identical with the refreshing frame per second of the first vision signal with the refreshing frame per second of the 3rd vision signal, be 60Hz, the Horizontal number of pixels of the first vision signal is 3840.The Horizontal number of pixels of the second vision signal and the 3rd vision signal is 1920, although resolution is reduced before being transferred to SOC, but after HDMI receives the second vision signal and the 3rd vision signal, the corresponding frame of the second vision signal and the 3rd vision signal is synthesized the first vision signal by SOC, therefore can not there is the problem of data degradation.
The transformat of above-mentioned two paths of signals can adopt 1920 × 216060Hz4:2:210bit, also 3840 × 216030Hz4:2:210bit of the corresponding odd-numbered frame of a road signal can be adopted, 3840 × 216030Hz4:2:210bit of the corresponding even frame of an other road signal transmits, but must rebuild going back meta-rule for above-mentioned two kinds of patterns at SOC.
It should be noted that, with other implementation, the first vision signal can also be converted to the second vision signal and the 3rd vision signal in other embodiments of the invention, such as the first vision signal is chosen the signal of predetermined interval frame as the second vision signal, remaining is the 3rd vision signal, and the present invention is not as limit.
And by 4K60HzYC in prior art
bc
rthe signal down of 4:2:210bit is 4K30HzYC
bc
rthe signal of 4:2:210bit, or by 4K60HzYC
bc
rthe signal of 4:2:210bit is converted to 4K60HzYC
bc
rthe signal of 4:2:010bit, 60Hz is converted to the signal of 30Hz, gets 30 frame signal transmission, 4K30HzYC in 60 frame signals by transmission per second
bc
rthe signal of 4:2:210bit cannot be reduced to initial 4K60HzYC
bc
rthe signal of 4:2:210bit, even if be 60Hz by 30Hz through frame-rate conversion, initial signal frame also lost, and cannot reduce, and YC
bc
r4:2:2 is converted to YC
bc
r4:2:0, due to YC
bc
rin 4:2:2, the ratio of the sample frequency of luminance component chromatic component is the structure of 4:2:2,4:2:2 is YYYYC
bc
bc
rc
r; If be converted to YC
bc
r4:2:0 receives, YC
bc
rin 4:2:0, the ratio of the sample frequency of luminance component chromatic component is the structure of 4:2:0 is YYYYCbCr; Wherein, Y represents luminance component, C
brepresent blue
look lookdegree component, C
rrepresent red
look lookdegree component, therefore will inevitably there is the problem of data degradation in aforesaid way.
fig. 2for the Signal transmissions of the inventive method one embodiment is illustrated
figure.
as Fig. 2shown in, in actual applications, the SI9777 chip that silicon reflects (SiliconImage) company can be adopted to realize supporting that 4K60HzYCBCR4:2:210bit signal inputs and is converted to two-way second vision signal and the 3rd vision signal, namely the function of modular converter is realized with SI9777 chip, the bandwidth of the second vision signal and the 3rd vision signal meets the bandwidth restriction of HDMI1.4, is namely less than or equal to the bandwidth of HDMI1.4.
SI9777 chip can support HDMI2.0 input interface RX0, RX1, RX2, RX3 of four road 6Gbps bandwidth, the HDMI2.0 of 1 road 6Gbps exports HDMI1.4 output TX1, TX2 of TX0 and 2 road 3Gbps, but because the HDMI1.4 bandwidth of SOC limits, the TX0 of SI9777 chip directly cannot export SOC to, therefore, need the first vision signal to be converted to two paths of signals in the embodiment of the present invention, export SOC to by TX1, TX2.And existing SI9777 chip can only by 4K60HzYC
bc
r4:2:210bit is divided into the identical 4K30HzYC of two-way
bc
r4:2:210bit signal transmits, by getting 30 frame signal transmission in 60 frame signals of transmission per second, 4K30HzYC
bc
rthe signal of 4:2:210bit cannot be reduced to initial 4K60HzYC
bc
rthe signal of 4:2:210bit, even if be 60Hz by 30Hz through frame-rate conversion, initial signal frame also lost, and cannot reduce.
The processing method of the TV receiving signal that the present embodiment provides, by being converted to the second vision signal and the 3rd vision signal by the receive first vision signal; The data volume of the first vision signal is the data volume sum of the second vision signal and the 3rd vision signal; After two HDMI of SOC (system on a chip) SOC receive the second vision signal and the 3rd vision signal, the corresponding frame of the second vision signal and the 3rd vision signal is synthesized the first vision signal, compared to existing technology, by 4K60HzYC
bc
rthe signal down of 4:2:210bit is 4K30HzYC
bc
rthe signal of 4:2:210bit, or by 4K60HzYC
bc
rthe signal of 4:2:210bit is converted to 4K60HzYC
bc
r4:2:010bit, because initial signal frame lost by signal that change rear transmission, therefore cannot reduce, the problem of data degradation will inevitably be there is, affect the display effect of user, and in the present invention, because the second vision signal after conversion and the 3rd vision signal do not lose initial data frame information, and finally can synthesize the first vision signal, therefore can not there is the problem of data degradation.
?
fig. 1on the basis of illustrated embodiment, further, in actual applications, the second vision signal is identical with the refreshing frame per second of the first vision signal with the refreshing frame per second of the 3rd vision signal.
Further, the concrete mode that the first vision signal received is converted to the second vision signal and the 3rd vision signal can be had multiple, optionally, as the enforceable mode of one, can specifically carry out in the following ways:
Choose the often row pixel of each frame signal of the first vision signal the 1st generates the second vision signal to N number of pixel;
The N+1 choosing the often row pixel of each frame signal of the first vision signal generates the 3rd vision signal to 2N pixel; Wherein, 2N is the Horizontal number of pixels of the first vision signal.
Specifically, choose the often row pixel of each frame signal of the first vision signal the 1st generates the second vision signal to N number of pixel, N+1 generates the 3rd vision signal to 2N pixel, the refreshing frame per second of such signal is constant, the Horizontal number of pixels sum of the second vision signal and the 3rd vision signal is the Horizontal number of pixels of the first vision signal, in the present embodiment, the Horizontal number of pixels of the second vision signal and the 3rd vision signal is 1/2nd of the Horizontal number of pixels of the first vision signal.
Due to the signal format that the second vision signal after conversion and the 3rd vision signal are not in the HDMI of standard, therefore the extending display identification data (ExtendedDisplayIdentificationData at SOC is needed, be called for short EDID) in self-defined corresponding Timming form, SOC can be identified.
In actual applications, before the corresponding frame of the second vision signal and the 3rd vision signal is synthesized the first vision signal, also comprise:
The second vision signal is controlled and the 3rd vision signal is synchronous by clock signal.
Further, in actual applications, the concrete mode that the corresponding frame of the second vision signal and the 3rd vision signal synthesizes the first vision signal can be had multiple, optionally, as the enforceable mode of one, can specifically carry out in the following ways:
SOC after the capable pixel of l of the capable pixel of l of the m frame signal of the second vision signal and the m frame signal of the 3rd vision signal being spliced synthesize the first vision signal; Wherein, the span of m is [1, M], and the span of l is [1, L], M and L be greater than 1 integer.
Specifically, synthesize the first vision signal after the second vision signal being spliced with the capable pixel of l of the synchronous m frame signal of the 3rd vision signal, the span of l is [1, L], and such as, for ultra high-definition 4K signal, L is 2160.
In above-mentioned embodiment, the second vision signal is generated to N number of pixel by the 1st of the often row pixel of choosing each frame signal of the first vision signal, and the N+1 choosing the often row pixel of each frame signal of the first vision signal generates the 3rd vision signal to 2N pixel, can realize the first vision signal being converted to the second vision signal and the 3rd vision signal; After two HDMI of SOC (system on a chip) SOC receive the second vision signal and the 3rd vision signal respectively, by the corresponding frame of the second vision signal and the 3rd vision signal be in every one-row pixels splicing of same position after synthesize the first vision signal, compared to existing technology, by 4K60HzYC
bc
rthe signal down of 4:2:210bit is 4K30HzYC
bc
rthe signal of 4:2:210bit, or by 4K60HzYC
bc
rthe signal of 4:2:210bit is converted to 4K60HzYC
bc
r4:2:010bit, because initial signal frame lost by signal that change rear transmission, therefore cannot reduce, the problem of data degradation will inevitably be there is, affect the display effect of user, and in the present invention, because the second vision signal after conversion and the 3rd vision signal do not lose initial data frame information, and finally can synthesize the first vision signal, therefore can not there is the problem of data degradation.
In other embodiments of the invention, the first vision signal received is converted to also can specifically carrying out in the following ways of the second vision signal and the 3rd vision signal:
The odd-numbered frame chosen in described first vision signal generates described second vision signal;
The even frame chosen in described first vision signal generates described 3rd vision signal.
Specifically, second vision signal is identical with the first vision signal with the resolution of the 3rd vision signal, when the first vision signal being converted to the second vision signal and the 3rd vision signal, also respectively the odd-numbered frame of the first vision signal can be generated the second vision signal, the even frame of the first vision signal is generated the 3rd vision signal, then in SOC, carrying out reduction synthesis to the second vision signal and the 3rd vision signal is the first vision signal, and namely the refreshing frame per second of the second vision signal and the 3rd vision signal is respectively the half of the first vision signal.
Be worth it should be noted that, in embodiments of the present invention the first vision signal we be understood as original signal frame, instead of to obtain through down conversion (Pulldown), such as, in 60Hz signal, each frame is all different, is all original signal frame.
Further, in actual applications, the concrete mode that the corresponding frame of the second vision signal and the 3rd vision signal synthesizes the first vision signal can be had multiple, optionally, as the enforceable mode of one, can specifically carry out in the following ways:
By described second vision signal through 2:2 frame rate conversion, described first vision signal of synthesis after then the even frame in the signal after conversion being replaced with the signal frame in described 3rd vision signal successively; Or,
By described 3rd vision signal through 2:2 frame rate conversion, described first vision signal of synthesis after then the odd-numbered frame in the signal after conversion being replaced with the signal frame in described second vision signal successively.
Specifically, in the present embodiment when the second vision signal and the 3rd vision signal are reduced to the first vision signal, no longer operate for every one-row pixels, but carry out operation reduction for each frame picture, can after 2:2Pulldown, adopt an other road signal to replace odd-numbered frame or even frame a wherein road signal, so also can consider the stationary problem of every data line.
In actual applications, image quality (PictureQuality is called for short PQ) process after synthesizing the first vision signal, can also be carried out, after process, send to block diagram of frame rate converter (FrameRateConversion is called for short FRC).
In above-mentioned embodiment, generate described second vision signal by the odd-numbered frame chosen in described first vision signal; The even frame chosen in described first vision signal generates described 3rd vision signal; After two HDMI of SOC (system on a chip) SOC receive the second vision signal and the 3rd vision signal respectively, odd-numbered frame or even frame will wherein adopt an other road signal to replace again by a road signal by SOC after 2:2Pulldown, compared to existing technology, by 4K60HzYC
bc
rthe signal down of 4:2:210bit is 4K30HzYC
bc
rthe signal of 4:2:210bit, or by 4K60HzYC
bc
rthe signal of 4:2:210bit is converted to 4K60HzYC
bc
r4:2:010bit, because initial signal frame lost by signal that change rear transmission, therefore cannot reduce, the problem of data degradation will inevitably be there is, and in the present invention, because the second vision signal after conversion and the 3rd vision signal do not lose initial data frame information, and finally can synthesize the first vision signal, therefore can not there is the problem of data degradation.
fig. 3for the structural representation of processing unit one embodiment of TV receiving signal of the present invention
figure.
as Fig. 3shown in, the processing unit of the TV receiving signal of the present embodiment, can comprise: modular converter 301 and recovery module 302;
Wherein, modular converter 301, for being converted to the second vision signal and the 3rd vision signal by the receive first vision signal; The data volume of the first vision signal is the data volume sum of the second vision signal and the 3rd vision signal;
Recovery module 302, for after two HDMI (High Definition Multimedia Interface) HDMI of SOC (system on a chip) SOC receive the second vision signal and the 3rd vision signal respectively, synthesizes the first vision signal by the corresponding frame of the second vision signal and the 3rd vision signal.
Optionally, as the enforceable mode of one, the second vision signal is identical with the refreshing frame per second of the first vision signal with the refreshing frame per second of the 3rd vision signal.
Optionally, as the enforceable mode of one, modular converter 301, specifically for:
Choose the often row pixel of each frame signal of the first vision signal the 1st generates the second vision signal to N number of pixel;
The N+1 choosing the often row pixel of each frame signal of the first vision signal generates the 3rd vision signal to 2N pixel; Wherein, 2N is the Horizontal number of pixels of the first vision signal.
Optionally, as the enforceable mode of one, modular converter 301, specifically for:
The odd-numbered frame chosen in the first vision signal generates the second vision signal;
The even frame chosen in the first vision signal generates the 3rd vision signal.
Optionally, as the enforceable mode of one, recovery module 302, also for:
The second vision signal is controlled and the 3rd vision signal is synchronous by clock signal.
Optionally, as the enforceable mode of one, recovery module 302, specifically for:
SOC after the capable pixel of l of the capable pixel of l of the m frame signal of the second vision signal and the m frame signal of the 3rd vision signal being spliced synthesize the first vision signal; Wherein, the span of m is [1, M], and the span of l is [1, L], M and L be greater than 1 integer.
Optionally, as the enforceable mode of one, recovery module 302, specifically for:
By the second vision signal through 2:2 frame rate conversion, synthesis the first vision signal after then the even frame in the signal after conversion being replaced with the signal frame in the 3rd vision signal successively; Or,
By the 3rd vision signal through 2:2 frame rate conversion, synthesis the first vision signal after then the odd-numbered frame in the signal after conversion being replaced with the signal frame in the second vision signal successively.
In embodiments of the present invention, the function of recovery module 302 specifically can be realized by SOC.
It should be noted that, for device embodiment, because it is substantially corresponding to embodiment of the method, so relevant part illustrates see the part of embodiment of the method.
fig. 4for the structural representation of TV one embodiment of the present invention
figure.
as Fig. 4shown in, the TV of the present embodiment, can comprise: processor 401, memory 402 and communication interface 403;
Wherein, memory 402, for storage program; Particularly, program can comprise program code, and described program code comprises computer-managed instruction.Memory 402 may comprise random access memory (randomaccessmemory is called for short RAM), still may comprise nonvolatile memory (non-volatilememory), such as at least one magnetic disc store.
Communication interface 403, for receiving the first vision signal;
Processor 401, for the program that execute store stores, for performing the technical scheme that the inventive method embodiment provides, it realizes principle and technique effect is similar, can the explanation of reference method embodiment part, repeats no more herein.
In embodiments of the present invention, processor specifically can comprise SOC.
Modular converter in above-described embodiment and recovery module can be realized by processor.
Above-mentioned parts are communicated by one or more bus.It will be understood by those skilled in the art that
fig. 4shown in the structure of embedded device do not form limitation of the invention, it both can be busbar network, also can be hub-and-spoke configuration, can also comprise ratio
diagrammore or less parts, or combine some parts, or different parts are arranged.
In several embodiments that the application provides, should be understood that disclosed equipment and method can realize by another way.Such as, apparatus embodiments described above is only schematic, such as, the division of described unit or module, be only a kind of logic function to divide, actual can have other dividing mode when realizing, such as multiple unit or module can in conjunction with or another system can be integrated into, or some features can be ignored, or do not perform.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, and the indirect coupling of equipment or module or communication connection can be electrical, machinery or other form.
The described module illustrated as separating component can or may not be physically separates, and the parts as module display can be or may not be physical module, namely can be positioned at a place, or also can be distributed in multiple network element.Some or all of module wherein can be selected according to the actual needs to realize the object of the present embodiment scheme.
One of ordinary skill in the art will appreciate that: all or part of step realizing said method embodiment can have been come by the hardware that program command is relevant, aforesaid program can be stored in a computer read/write memory medium, this program, when performing, performs the step comprising said method embodiment; And aforesaid storage medium comprises: ROM, RAM, magnetic disc or CD etc. various can be program code stored medium.
Last it is noted that above each embodiment is only in order to illustrate technical scheme of the present invention, be not intended to limit; Although with reference to foregoing embodiments to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein some or all of technical characteristic; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (14)
1. a processing method for TV receiving signal, is characterized in that, comprising:
The first vision signal received is converted to the second vision signal and the 3rd vision signal; The data volume of described first vision signal is the data volume sum of described second vision signal and described 3rd vision signal;
After two HDMI (High Definition Multimedia Interface) HDMI of SOC (system on a chip) SOC receive described second vision signal and described 3rd vision signal respectively, the corresponding frame of described second vision signal and described 3rd vision signal is synthesized described first vision signal.
2. method according to claim 1, is characterized in that, described second vision signal is identical with the refreshing frame per second of described first vision signal with the refreshing frame per second of described 3rd vision signal.
3. method according to claim 2, is characterized in that, described the first vision signal received is converted to the second vision signal and the 3rd vision signal, comprising:
Choose the often row pixel of each frame signal of described first vision signal the 1st generates described second vision signal to N number of pixel;
The N+1 choosing the often row pixel of each frame signal of described first vision signal generates described 3rd vision signal to 2N pixel; Wherein, described 2N is the Horizontal number of pixels of described first vision signal.
4. method according to claim 1, is characterized in that, described the first vision signal received is converted to the second vision signal and the 3rd vision signal, comprising:
The odd-numbered frame chosen in described first vision signal generates described second vision signal;
The even frame chosen in described first vision signal generates described 3rd vision signal.
5. the method according to any one of claim 1-4, is characterized in that, the described corresponding frame by described second vision signal and described 3rd vision signal also comprises before synthesizing described first vision signal:
Described second vision signal is controlled and described 3rd vision signal is synchronous by clock signal.
6. method according to claim 3, is characterized in that, the described corresponding frame by described second vision signal and described 3rd vision signal synthesizes described first vision signal, comprising:
Described SOC after the capable pixel of l of the capable pixel of l of the m frame signal of described second vision signal and the m frame signal of described 3rd vision signal being spliced synthesize described first vision signal; Wherein, the span of m is [1, M], and the span of l is [1, L], M and L be greater than 1 integer.
7. method according to claim 4, is characterized in that, the described corresponding frame by described second vision signal and described 3rd vision signal synthesizes described first vision signal, comprising:
By described second vision signal through 2:2 frame rate conversion, described first vision signal of synthesis after then the even frame in the signal after conversion being replaced with the signal frame in described 3rd vision signal successively; Or,
By described 3rd vision signal through 2:2 frame rate conversion, described first vision signal of synthesis after then the odd-numbered frame in the signal after conversion being replaced with the signal frame in described second vision signal successively.
8. a processing unit for TV receiving signal, is characterized in that, comprising:
Modular converter, for being converted to the second vision signal and the 3rd vision signal by the receive first vision signal; The data volume of described first vision signal is the data volume sum of described second vision signal and described 3rd vision signal;
Recovery module, after receiving described second vision signal and described 3rd vision signal respectively at two HDMI (High Definition Multimedia Interface) HDMI of SOC (system on a chip) SOC, the corresponding frame of described second vision signal and described 3rd vision signal is synthesized described first vision signal.
9. device according to claim 8, is characterized in that, described second vision signal is identical with the refreshing frame per second of described first vision signal with the refreshing frame per second of described 3rd vision signal.
10. device according to claim 9, is characterized in that, described modular converter, specifically for:
Choose the often row pixel of each frame signal of described first vision signal the 1st generates described second vision signal to N number of pixel;
The N+1 choosing the often row pixel of each frame signal of described first vision signal generates described 3rd vision signal to 2N pixel; Wherein, described 2N is the Horizontal number of pixels of described first vision signal.
11. devices according to claim 8, is characterized in that, described modular converter, specifically for:
The odd-numbered frame chosen in described first vision signal generates described second vision signal;
The even frame chosen in described first vision signal generates described 3rd vision signal.
12. devices according to Claim 8 described in-11 any one, is characterized in that, described recovery module, also for:
Described second vision signal is controlled and described 3rd vision signal is synchronous by clock signal.
13. devices according to claim 10, is characterized in that, described recovery module, specifically for:
Described SOC after the capable pixel of l of the capable pixel of l of the m frame signal of described second vision signal and the m frame signal of described 3rd vision signal being spliced synthesize described first vision signal; Wherein, the span of m is [1, M], and the span of l is [1, L], M and L be greater than 1 integer.
14. devices according to claim 11, is characterized in that, described recovery module, specifically for:
By described second vision signal through 2:2 frame rate conversion, described first vision signal of synthesis after then the even frame in the signal after conversion being replaced with the signal frame in described 3rd vision signal successively; Or,
By described 3rd vision signal through 2:2 frame rate conversion, described first vision signal of synthesis after then the odd-numbered frame in the signal after conversion being replaced with the signal frame in described second vision signal successively.
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