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CN105390541A - HEMT epitaxial structure and preparation method thereof - Google Patents

HEMT epitaxial structure and preparation method thereof Download PDF

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Publication number
CN105390541A
CN105390541A CN201510727928.4A CN201510727928A CN105390541A CN 105390541 A CN105390541 A CN 105390541A CN 201510727928 A CN201510727928 A CN 201510727928A CN 105390541 A CN105390541 A CN 105390541A
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layer
gan
doped
epitaxial structure
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王科
王东盛
苗操
李亦衡
魏鸿源
严文胜
张葶葶
朱廷刚
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JIANGSU NENGHUA MICROELECTRONIC TECHNOLOGY DEVELOPMENT Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H10D30/4755High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/015Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT

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Abstract

<b>本发明提供一种</b><b>HEMT</b><b>外延结构及其制备方法,</b><b>HEMT</b><b>外延结构,包括依次层叠的衬底、缓冲层、非掺杂或掺杂高阻层、非掺杂高迁移率层及</b><b>GaN/AlN</b><b>超晶格栅极层,所述</b><b>GaN/AlN</b><b>超晶格栅极层的周期为</b><b>4~15</b><b>。所述</b><b>GaN/AlN</b><b>超晶格栅极层的总厚度为</b><b>6~30nm</b><b>,且</b><b>AlN</b><b>和</b><b>GaN</b><b>的厚度比为</b><b>1:1~1:9</b><b>。通过超晶格结构独特的应力逐层缓解释放的特性,可以有效减少</b><b>AlGaN/GaN</b><b>界面因应力过大而引起的大量表面缺陷。</b>

<b>The present invention provides a </b><b>HEMT</b><b> epitaxial structure and its preparation method, </b><b>HEMT</b><b> epitaxial structure, including sequential Stacked substrate, buffer layer, non-doped or doped high-resistance layer, non-doped high-mobility layer and </b><b>GaN/AlN</b><b> superlattice gate layer, The period of the </b><b>GaN/AlN</b><b> superlattice gate layer is </b><b>4~15</b><b>. The total thickness of the </b><b>GaN/AlN</b><b> superlattice gate layer is </b><b>6~30nm</b><b>, and</b><b> The thickness ratio of b><b>AlN</b><b> and </b><b>GaN</b><b>is</b><b>1:1~1:9</b><b>. Through the unique layer-by-layer stress release characteristics of the superlattice structure, a large number of surface defects caused by excessive stress at the </b><b>AlGaN/GaN</b><b> interface can be effectively reduced. </b>

Description

HEMT 外延结构及其制备方法 HEMTs Epitaxial structure and its preparation method

技术领域 technical field

本发明涉及一种The present invention relates to a HEMTHEMTs 外延结构及其制备方法。Epitaxial structures and methods for their preparation.

背景技术 Background technique

现有技术中,In the prior art, HEMTHEMTs 外延片通常采用Epitaxial wafers are usually AlGaN/GaNAlGaN/GaN or AlGaN/AlN/GaNAlGaN/AlN/GaN 作为栅极层,而这种标准as the gate layer, and this standard AlGaN/GaNAlGaN/GaN or AlGaN/AlN/GaNAlGaN/AlN/GaN HEMT HEMTs 结构,由于structure, due to AlGaN/GaNAlGaN/GaN 界面的应力过大,会产生较多的表面缺陷,增加了器件的漏电几率。If the stress at the interface is too large, more surface defects will be generated, which will increase the leakage probability of the device.

发明内容 Contents of the invention

针对上述问题,本发明的目的是提供一种For the problems referred to above, the purpose of the present invention is to provide a kind of HEMTHEMTs 外延结构及其制备方法,其有效减少表面缺陷。An epitaxial structure and a preparation method thereof, which effectively reduce surface defects.

为解决上述技术问题,本发明采用的技术方案为:In order to solve the problems of the technologies described above, the technical solution adopted in the present invention is:

一种A sort of HEMTHEMTs 外延结构,包括依次层叠的衬底、缓冲层、非掺杂或掺杂高阻层、非掺杂高迁移率层及Epitaxial structure, including sequentially stacked substrate, buffer layer, non-doped or doped high resistance layer, non-doped high mobility layer and GaN/AlNGaN/AlN 超晶格栅极层,所述superlattice gate layer, the GaN/AlNGaN/AlN 超晶格栅极层的周期为The period of the superlattice gate layer is 4~154~15 .

优选地,所述Preferably, the GaN/AlNGaN/AlN 超晶格栅极层的总厚度为The total thickness of the superlattice gate layer is 6~30nm6~30nm ,且,and AlNAlN and GaNGaN 的厚度比为The thickness ratio is 1:1~1:91:1~1:9 .

优选地,所述缓冲层为Preferably, the buffer layer is GaNGaN 层、layer, AlNAlN 层、layer, AlGaNAlGaN 层、layer, InGaNInGaN 层或layer or AlInGaNAlInGaN 层。layer.

优选地,所述缓冲层的厚度为Preferably, the thickness of the buffer layer is 10~100nm10~100nm .

优选地,所述非掺杂或掺杂高阻层的厚度为Preferably, the thickness of the non-doped or doped high resistance layer is 0.1~30.1~3 μmu mm 、电阻率ρ, resistivity ρ >1E8>1E8 ΩΩ ∙m∙m .

更优选地,层叠于所述缓冲层和所述非掺杂高阻层之间的为掺杂铁或铬的掺杂高阻More preferably, the doped high resistance layer doped with iron or chromium is laminated between the buffer layer and the non-doped high resistance layer. GaNGaN 层。layer.

更优选地,层叠于所述缓冲层和所述非掺杂高阻层之间的为非掺杂高阻More preferably, the layer stacked between the buffer layer and the non-doped high-resistance layer is a non-doped high-resistance GaNGaN 层。layer.

优选地,所述非掺杂高迁移率层为厚度为Preferably, the non-doped high mobility layer has a thickness of 50~200nm50~200nm of GaNGaN 层。layer.

一种如上所述的a kind of above HEMTHEMTs 外延结构的制备方法,包括如下步骤:A method for preparing an epitaxial structure, comprising the steps of:

AA 将衬底在place the substrate in 1050~12501050~1250 ℃的 H2H2 氛围下高温净化High temperature purification under atmosphere 5~10min5~10min ;

BB exist H2H2 氛围下将步骤step AA 净化的衬底降温至The cleaned substrate was cooled to 500~600500~600 ℃后在衬底上生长缓冲层;After ℃, a buffer layer is grown on the substrate;

CC 将生长有缓冲层的衬底升温至The substrate on which the buffer layer was grown was heated to 1000~12001000~1200 ℃,在缓冲层上生长非掺杂或掺杂高阻层;°C, grow a non-doped or doped high-resistance layer on the buffer layer;

DD. 保持温度不变,在非掺杂或掺杂高阻层上生长非掺杂高迁移率层;Keeping the temperature constant, grow a non-doped high-mobility layer on the non-doped or doped high-resistance layer;

EE. 降温至cool down to 950~1100950~1100 ℃,在非掺杂高迁移率层上生长°C, grown on the non-doped high-mobility layer GaN/AlNGaN/AlN 超晶格栅极层。superlattice gate layer.

优选地,所述缓冲层、非掺杂或掺杂高阻层、非掺杂高迁移率层及Preferably, the buffer layer, undoped or doped high resistance layer, undoped high mobility layer and GaN/AlNGaN/AlN 超晶格栅极层通过The superlattice gate layer passes through MOCVDMOCVD 工艺生长。Craft grows.

本发明采用以上技术方案,相比现有技术具有如下优点:通过超晶格结构独特的应力逐层缓解释放的特性,可以有效减少The present invention adopts the above technical scheme, and has the following advantages compared with the prior art: through the characteristic of layer-by-layer release of the unique stress of the superlattice structure, it can effectively reduce AlGaN/GaNAlGaN/GaN 界面因应力过大而引起的大量表面缺陷。A large number of surface defects caused by excessive stress at the interface.

附图说明 Description of drawings

为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其它的附图,其中:In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative work, wherein:

picture 11 为本发明的for the present invention HEMTHEMTs 外延结构的示意图;Schematic diagram of the epitaxial structure;

picture 22 为现有技术中采用used in existing technology AlGaN/AlN/GaNAlGaN/AlN/GaN 栅极层的gate layer HEMTHEMTs 外延结构的表面The surface of the epitaxial structure AFMAFM 图;picture;

picture 33 为本发明的for the present invention HEMTHEMTs 外延机构的epitaxy AFMAFM 图。picture.

上述附图中,In the above drawings, 11 、衬底;, Substrate; 22 、缓冲层;,The buffer layer; 33 、掺杂高阻层;, doped high resistance layer; 44 、非掺杂高迁移率层;, non-doped high mobility layer; 55 , GaN/AlNGaN/AlN 超晶格栅极层。superlattice gate layer.

具体实施方式 detailed description

下面对本发明的较佳实施例进行详细阐述,以使本发明的优点和特征能更易于被本领域的技术人员理解。The preferred embodiments of the present invention are described in detail below, so that the advantages and features of the present invention can be more easily understood by those skilled in the art.

picture 11 所示为本发明的一种Shown is a kind of the present invention HEMTHEMTs 外延结构。结合图epitaxial structure. Combined graph 11 所示,该As shown, the HEMTHEMTs 外延结构包括自下至上依次层叠的衬底The epitaxial structure includes substrates stacked sequentially from bottom to top 11 、缓冲层,The buffer layer 22 、非掺杂或掺杂高阻层, non-doped or doped high-resistance layer 33 、非掺杂高迁移率层, non-doped high mobility layer 44 and GaN/AlNGaN/AlN 超晶格栅极层superlattice gate layer 55 .

衬底Substrate 11 采用氧化铝(Aluminum oxide ( Al2O3 Al 2 O 3 )衬底。) substrate.

超晶格栅极层superlattice gate layer 55 的周期为The cycle is 4~154~15 . GaN/AlNGaN/AlN 超晶格栅极层superlattice gate layer 55 的总厚度为The total thickness of 6~30nm6~30nm ,且,and AlNAlN and GaNGaN 的厚度比为The thickness ratio is 1:1~1:91:1~1:9 。相比标准. compared to standard AlGaN/GaNAlGaN/GaN or AlGaN/AlN/GaNAlGaN/AlN/GaN HEMT HEMTs 结构,通过超晶格结构独特的应力逐层缓解释放的特性,可以有效减少应structure, through the unique layer-by-layer stress release characteristics of the superlattice structure, it can effectively reduce the stress AlGaN/GaNAlGaN/GaN 界面因应力过大而引起的大量表面缺陷,从而提高器件的漏电特性。A large number of surface defects caused by excessive stress at the interface can improve the leakage characteristics of the device.

缓冲层The buffer layer 22 for GaNGaN 层、layer, AlNAlN 层、layer, AlGaNAlGaN 层、layer, InGaNInGaN 层或layer or AlInGaNAlInGaN 层。本实施例中,缓冲层layer. In this example, the buffer layer 22 for GaNGaN 层。缓冲层layer. The buffer layer 22 的厚度为The thickness is 10~100nm10~100nm .

非掺杂或掺杂高阻层Undoped or doped high resistance layer 33 的厚度为The thickness is 0.1~30.1~3 μmu mm 、电阻率ρ, resistivity ρ >1E8>1E8 ΩΩ ∙m∙ m 。本实施例中,层叠于所述缓冲层. In this embodiment, laminated on the buffer layer 22 和所述非掺杂高阻层and the non-doped high resistance layer 33 之间的为掺杂铁或铬的掺杂高阻between doped iron or chromium doped high resistance GaNGaN 层。层叠于所述缓冲层layer. layered on the buffer layer 22 和所述非掺杂高阻层and the non-doped high resistance layer 33 之间的还可以为非掺杂高阻between can also be non-doped high-resistance GaNGaN 层。layer.

非掺杂高迁移率层Undoped high mobility layer 44 为厚度为is the thickness of 50~200nm50~200nm of GaNGaN 层。layer.

一种如上所述的a kind of above HEMTHEMTs 外延结构的制备方法,包括如下步骤:A method for preparing an epitaxial structure, comprising the steps of:

AA 、提供衬底, provide the substrate 11 ,将衬底, the substrate 11 exist 1050~12501050~1250 ℃的 H2H2 氛围下高温烘烤High temperature baking under atmosphere 5~10min5~10min 进行衬底Substrate 11 净化;purify;

BB exist H2H2 氛围下将步骤step AA 净化的衬底Purified substrate 11 降温至cool down to 500~600500~600 ℃后在衬底℃ after the substrate 11 上生长缓冲层upper growth buffer 22 ;

CC 将生长有缓冲层will grow with a buffer layer 22 的衬底the substrate 11 升温至heat up to 1000~12001000~1200 ℃,在缓冲层℃, in the buffer layer 22 上生长非掺杂或掺杂高阻层Non-doped or doped high-resistance layer grown on 33 ;

DD. 保持生长温度不变,在非掺杂或掺杂高阻层Keep the growth temperature constant, in the non-doped or doped high resistance layer 33 上生长非掺杂高迁移率层undoped high mobility layer 44 ;

EE. 衬底Substrate 11 降温至cool down to 950~1100950~1100 ℃,在非掺杂高迁移率层℃, in the non-doped high mobility layer 44 上生长grow up GaN/AlNGaN/AlN 超晶格栅极层superlattice gate layer 55 .

步骤step CC , DD. , EE. 为生长for growth HEMTHEMTs 外延结构的结构层,所述缓冲层structural layer of the epitaxial structure, the buffer layer 22 、非掺杂或掺杂高阻层, non-doped or doped high-resistance layer 33 、非掺杂高迁移率层, non-doped high mobility layer 44 and GaN/AlNGaN/AlN 超晶格栅极层superlattice gate layer 55 均通过both pass MOCVDMOCVD 工艺生长。Craft grows. MOCVDMOCVD 工艺即金属有机化合物化学气相沉淀工艺(The process is the metal organic compound chemical vapor deposition process ( Metal-organic Chemical Vapor Deposition Metal-organic Chemical Vapor Deposition )。).

通过原子力显微镜对现有技术中的标准State-of-the-art standards by atomic force microscopy HEMTHEMTs 外延结构和本发明的epitaxial structure and the present invention HEMTHEMTs 外延结构的表面进行探测,测得的表面The surface of the epitaxial structure is probed, and the measured surface AFMAFM 图分别见图See Fig. 22 , 33 。结合图. Combined graph 22 , 33 所示,本发明的As shown, the present invention's HEMTHEMTs 外延结构的表面缺陷较现有技术中的标准The surface defects of the epitaxial structure are higher than the standard in the prior art HEMTHEMTs 外延结构显著减少。The epitaxial structure is significantly reduced.

上述实施例只为说明本发明的技术构思及特点,是一种优选的实施例,其目的在于让熟悉此项技术的人士能够了解本发明的内容并据以实施,并不能以此限制本发明的保护范围。凡根据本发明的精神实质所作的等效变化或修饰,都应涵盖在本发明的保护范围之内。The above-mentioned embodiment is only to illustrate the technical concept and characteristics of the present invention. It is a preferred embodiment, and its purpose is to allow those familiar with this technology to understand the content of the present invention and implement it accordingly, and it cannot limit the present invention. scope of protection. All equivalent changes or modifications made according to the spirit of the present invention shall fall within the protection scope of the present invention.

Claims (10)

1.一种HEMT外延结构,其特征在于:包括依次层叠的衬底、缓冲层、非掺杂或掺杂高阻层、非掺杂高迁移率层及GaN/AlN超晶格栅极层,所述GaN/AlN超晶格栅极层的周期为4~15。 1. A HEMT epitaxial structure, characterized in that: comprise successively stacked substrates, buffer layers, non-doped or doped high-resistance layers, non-doped high-mobility layers and GaN/AlN superlattice gate layers, The period of the GaN/AlN superlattice gate layer is 4-15. 2.根据权利要求1所述的HEMT外延结构,其特征在于:所述GaN/AlN超晶格栅极层的总厚度为6~30nm,且AlN和GaN的厚度比为1:1~1:9。 2. HEMT epitaxial structure according to claim 1, is characterized in that: the total thickness of described GaN/AlN superlattice gate layer is 6~30nm, and the thickness ratio of AlN and GaN is 1:1~1: 9. 3.根据权利要求1所述的HEMT外延结构,其特征在于:所述缓冲层为GaN层、AlN层、AlGaN层、InGaN层或AlInGaN层。 3. The HEMT epitaxial structure according to claim 1, wherein the buffer layer is a GaN layer, an AlN layer, an AlGaN layer, an InGaN layer or an AlInGaN layer. 4.根据权利要求1所述的HEMT外延结构,其特征在于:所述缓冲层的厚度为10~100nm。 4. The HEMT epitaxial structure according to claim 1, characterized in that: the thickness of the buffer layer is 10-100 nm. 5.根据权利要求1所述的HEMT外延结构,其特征在于:所述非掺杂或掺杂高阻层的厚度为0.1~3μm、电阻率ρ>1E8Ω∙m。 5. The HEMT epitaxial structure according to claim 1, characterized in that: the thickness of the non-doped or doped high-resistance layer is 0.1-3 μm, and the resistivity ρ>1E8Ω∙m. 6.根据权利要求5所述的HEMT外延结构,其特征在于:层叠于所述缓冲层和所述非掺杂高阻层之间的为掺杂铁或铬的掺杂高阻GaN层。 6 . The HEMT epitaxial structure according to claim 5 , wherein the layer stacked between the buffer layer and the non-doped high-resistance layer is a doped high-resistance GaN layer doped with iron or chromium. 7.根据权利要求5所述的HEMT外延结构,其特征在于:层叠于所述缓冲层和所述非掺杂高阻层之间的为非掺杂高阻GaN层。 7 . The HEMT epitaxial structure according to claim 5 , wherein the layer stacked between the buffer layer and the non-doped high-resistance layer is a non-doped high-resistance GaN layer. 8.根据权利要求1所述的HEMT外延结构,其特征在于:所述非掺杂高迁移率层为厚度为50~200nm的GaN层。 8 . The HEMT epitaxial structure according to claim 1 , wherein the non-doped high-mobility layer is a GaN layer with a thickness of 50-200 nm. 9.一种如权利要求1-8任一项所述的HEMT外延结构的制备方法,其特征在于,包括如下步骤: 9. A method for preparing the HEMT epitaxial structure according to any one of claims 1-8, comprising the steps of: A将衬底在1050~1250℃的H2氛围下高温净化5~10min; A. Purify the substrate at high temperature for 5-10 minutes under H2 atmosphere at 1050-1250°C; B在H2氛围下将步骤A净化的衬底降温至500~600℃后在衬底上生长缓冲层; B cool down the substrate purified in step A to 500~600°C in H2 atmosphere, and then grow a buffer layer on the substrate; C将生长有缓冲层的衬底升温至1000~1200℃,在缓冲层上生长非掺杂或掺杂高阻层; C. Raise the temperature of the substrate with the buffer layer to 1000~1200°C, and grow a non-doped or doped high-resistance layer on the buffer layer; D保持温度不变,在非掺杂或掺杂高阻层上生长非掺杂高迁移率层; D keeps the temperature constant, and grows a non-doped high-mobility layer on the non-doped or doped high-resistance layer; E降温至950~1100℃,在非掺杂高迁移率层上生长GaN/AlN超晶格栅极层。 E is cooled to 950~1100°C, and a GaN/AlN superlattice gate layer is grown on the non-doped high mobility layer. 10.根据权利要求9所述的制备方法,其特征在于:所述缓冲层、非掺杂或掺杂高阻层、非掺杂高迁移率层及GaN/AlN超晶格栅极层通过MOCVD工艺生长。 10. The preparation method according to claim 9, characterized in that: the buffer layer, the non-doped or doped high-resistance layer, the non-doped high-mobility layer and the GaN/AlN superlattice gate layer are processed by MOCVD Craft grows.
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