CN105316711B - 包含全氟烷基表面活性剂的焊料凸点用锡合金电镀液 - Google Patents
包含全氟烷基表面活性剂的焊料凸点用锡合金电镀液 Download PDFInfo
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Abstract
本发明涉及包含全氟烷基表面活性剂的焊料凸点用锡合金电镀液。本发明的锡合金电镀液是用于形成倒装芯片封装的焊料凸点的锡类电镀液,所述锡类电镀液包含甲磺酸锡、甲磺酸银、甲磺酸、氟化表面活性剂、芳香族聚氧亚烷基醚和水。本发明还公开了使用所述电镀液形成焊料凸点的方法。该方法包括:(1)用铜或铜/镍电镀液电镀硅晶片,所述硅晶片具有露出电极焊盘的保护层和凸点下金属(UBM)层,从而在所述凸点下金属层上形成铜或铜/镍柱;和(2)用所述锡类电镀液电镀所述柱,从而形成焊料凸点。
Description
技术领域
本公开涉及用来在倒装芯片封装工艺中形成焊料凸点的锡类电镀液。
背景技术
随着小型纤薄高性能电子设备的出现,对于如存储器等必需器件的快速运行和提高的电极密度存在增长的需求。在这种情况下,倒装芯片封装技术迅速推广并应用于制造电子器件。传统引线接合工艺涉及使用细线将芯片连接到板。带式自动接合(TAB)工艺涉及将芯片布置在柔性带上。不过,这些传统工艺在实现降低系统尺寸或提高电气性能方面存在限制。在倒装芯片封装工艺中,在集成电路芯片的焊盘上形成焊料凸点并通过加热直接接合到电路板。也就是说,与仅使用芯片边缘的引线接合或TAB工艺不同,倒装芯片封装工艺是利用芯片的整个区域的面阵列封装工艺。因此,倒装芯片封装工艺能够在每单位面积上形成数量显著增多的输入/输出端子,因而适合于细小间距应用。另外,倒装芯片封装工艺使用长度短于接合线的焊料凸点,确保了优异的电气性质。由于这些优点,倒装芯片封装工艺可以将封装尺寸最小化,从而适合于制造轻量、薄、紧凑、高性能和快速运行的电子产品。另外,倒装芯片封装工艺可以提供噪声问题的解决方案。该技术可以推广并适用于显示、半导体和其他相关产业,包括CPU和存储器产业。
此种倒装芯片封装体采用各种形式,但其大多数使用由铜类凸点下金属(UBM)层上的铜(或铜/镍)柱和锡合金凸点构成的焊料凸点。在合金类焊料凸点的形成工艺的开发中有许多问题需要解决。例如,存在与产品的缺陷、良率和品质相关的问题,如芯片内(WID)和晶片内(WIW)凸点的高度波动,凸点内空隙(empty space)的形成,以及金属间化合物层的破裂的发生。
发明内容
本发明的一个目的是提供用于通过电镀为倒装芯片封装体在金属类UBM层上形成锡类焊料凸点的含有全氟烷基表面活性剂的锡类电镀液,其在电流效率方面有利,不产生金属间化合物(IMC)层中的破裂和凸点内的空隙,可以用于形成平整性高和高度波动小的凸点,适用于高速电镀。本发明的另一目的是提供使用该锡类电镀液为倒装芯片形成焊料凸点的方法。
本发明的一个方面提供了一种锡类电镀液,其包含:使电镀液的锡含量为40g/L~105g/L的量的甲磺酸锡、70g/L~210g/L的甲磺酸、0.01mg/L~100mg/L的氟化表面活性剂、0.5g/L~60g/L的芳香族聚氧亚烷基醚和水。该锡类电镀液可以可选地包含使电镀液的银含量为0.40g/L~3.0g/L的量的甲磺酸银。在此情况下,锡-银合金电镀液可以还包含130g/L~350g/L的络合剂。
除了上述成分以外,本发明的电镀液可以还包含各种有机添加剂。在此情况下,有机添加剂适宜以6.0g/L~650g/L的总浓度存在。适合用于本发明的锡类电镀液的有机添加剂的种类可以由本领域技术人员根据目标应用来确定,因此在此省略其详细说明。例如,有机添加剂可以为促进剂、抑制剂、消泡剂、有机抗氧化剂和晶粒细化剂。有机添加剂的具体实例为羟基苯类抗氧化剂,如苯酚、氢醌和间苯二酚,它们可以单独或者组合使用。
在本发明的一个实施方式中,电镀液含有0.05mg/L~10mg/L的氟化表面活性剂。
氟化表面活性剂可以选自全氟烷基磷酸盐、全氟烷基硫酸酯、全氟烷基磺酸盐及其混合物。
全氟烷基磷酸盐是含有单(C6-C12全氟烷基)磷酸盐和二(C6-C12全氟烷基)磷酸盐的混合物,其中,单酯盐占单酯盐和二酯盐的总重量的33重量%~45重量%。全氟烷基磷酸盐的表观平均分子量为560~980。单(氟烷基)磷酸盐和二(氟烷基)磷酸盐通过使单(全氟烷基)磷酸酯和二(全氟烷基)磷酸酯的混合物与选自由氢氧化钠、氢氧化钾和氢氧化锂组成的组中的至少一种碱反应而获得。
全氟烷基硫酸酯是含有全氟烷基氨基磺酸酯和水的表面活性剂。
全氟烷基磺酸盐是包含C6-C12全氟烷基的表面活性剂。
在本发明的一个实施方式中,所述三种表面活性剂的全氟烷基是未支化的直链。
本发明的另一方面公开了使用锡类电镀液为倒装芯片形成焊料凸点的方法。具体而言,该方法包括:用铜或铜/镍电镀液电镀硅晶片,所述硅晶片具有露出电极焊盘的保护层和凸点下金属(UBM)层,从而在所述凸点下金属层上形成铜或铜/镍柱;和用所述锡类电镀液电镀所述柱,从而形成焊料凸点。
在本发明的一个具体实施方式中,将电镀液经筒式过滤器过滤以除去妨碍合金焊料凸点的形成的沉淀或杂质。
在UBM层上形成金属柱之后,可以使用本发明的锡类电镀液在金属柱上形成焊料凸点。氟化表面活性剂的存在可以改善锡类电镀液的表面张力、润湿性和铺展性。结果,可以提高电镀工艺的电流效率,可以防止金属间化合物层中破裂的发生和凸点内空隙的形成,可以减少WID和WIW凸点的高度波动,可以获得即使在高速电镀范围内(10A/dm2~19A/dm2)镀膜性质也优异的倒装芯片封装体。
附图说明
本发明的这些和/或其他方面和优点将结合附图由以下实施方式的说明而变得明白和更易理解,附图中:
图1示意性显示了整个倒装芯片封装工艺,包括在凸点下金属层上形成铜柱和使用锡类电镀液在铜柱上形成焊料凸点;
图2显示了在12英寸图案化晶片的凸点下金属(UBM)层上形成的铜柱的俯视和侧视电子显微镜图像(放大率:图2(a):x 7000,图2(b):x 3000);
图3和4是按照本发明的实施方式在不同条件下通过恒电流电镀在黄铜板上形成锡-银合金结构体表面的电子显微镜图像;
图5和6是显示按照本发明的实施方式在不同工艺条件下通过电镀在形成有铜金属柱的图案化的晶片试样上形成的锡-银合金焊料凸点(凸点CD 25μm)的形状的电子显微镜图像。
具体实施方式
现将详细说明本发明。
图1示意性显示了整个倒装芯片封装工艺,包括在凸点下金属层上形成铜柱和使用锡类电镀液在铜柱上形成焊料凸点。在图1中,步骤A显示通过溅射在由芯片构成的图案化晶片上形成铜UBM层,步骤B显示形成光刻胶(PR)图案,步骤C显示通过电镀形成铜或铜/镍柱,步骤D显示通过电镀在铜柱上形成锡-银凸点,步骤E显示除去光刻胶,步骤F显示金属刻蚀和回流。
本发明的一个方面公开了一种水性锡类或锡-银类电镀液,其可以用于图1所示工艺的步骤D。本发明的锡类电镀液包含以下成分:
A)甲磺酸锡,其量为使电镀液的锡含量为40g/L~105g/L;
B)作为可选成分的甲磺酸银,其量为使电镀液的银含量为0.40g/L~3.0g/L;
C)70g/L~210g/L的甲磺酸;
D)0.01mg/L~100mg/L的氟化表面活性剂;
E)0.5g/L~60g/L的芳香族聚氧亚烷基醚;和
F)水。
在本发明的一个具体实施方式中,甲磺酸锡可以以使电镀液的锡含量为80g/L~100g/L的量使用。就锡类凸点形成时的电流效率而言,甲磺酸锡优选以使电镀液的锡含量在上述范围内的量存在。
在本发明的一个具体实施方式中,电镀液中使用的甲磺酸锡(基于最终的锡含量(10重量%~20重量%))通过使锡经电解在市售65%~75%甲磺酸中氧化来制备。
本发明的锡类电镀液可以仅包含锡作为电镀金属,或者可以为包含锡和银的合金电镀液。
在本发明的一个具体实施方式中,电镀液中使用的甲磺酸银(基于最终的银含量(2重量%~7重量%))可以通过使银经电解在市售65%~75%甲磺酸中氧化或使氧化银在市售65%~75%甲磺酸中溶解来制备。
在本发明的一个实施方式中,锡类电镀液可以包含银。在此实施方式中,锡类电镀液可以可选地还包含络合剂。在本发明中可以使用在电镀领域中能够与银形成络合物的任何常用络合剂而无具体限制。在本发明的一个具体实施方式中,络合剂可以在电镀液中以130g/L~350g/L的浓度存在。
本发明的电镀液中使用的甲磺酸可以为电镀领域中使用的任何商品级产品。在本发明的一个具体实施方式中,电镀液中使用的甲磺酸和用于制备甲磺酸锡或甲磺酸银的甲磺酸在市场上购买并在使用前纯化。例如,甲磺酸可以通过活性炭过滤、鼓泡或在浴液中处理以除去如氯和硫化合物等杂质而进行纯化。活性炭通常可以具有40μm~100μm的平均粒径,500m2/g以上的表面积或的平均孔径。在过滤甲磺酸之后,可以使滤液经过孔径为数微米的筒式过滤器以除去活性炭和杂质。作为另选,甲磺酸可以通过利用氮气或空气鼓泡约6小时~约12小时来纯化。作为另选,在60℃~85℃静置约6小时~约12小时之后使用超纯水将甲磺酸的浓度调节到合适水平。
氟化表面活性剂的全氟烷基可以为全氟化的直链烷基、支化烷基或环烷基。
在本发明的一个实施方式中,氟化表面活性剂是包含单(全氟烷基)磷酸盐和二(全氟烷基)磷酸盐的组合物。在一个实施方式中,表面活性剂组合物通过用碱处理磷酸酯混合物而获得。碱可以是本领域中常用的那些中的任何一种。此类碱的实例包括但不限于钠、钾和锂。通过碱处理获得的物质包括通过单(全氟烷基)磷酸酯和二(全氟烷基)磷酸酯与碱的反应形成的中性盐(即,钠、钾、锂和铵盐)。此种碱处理可以提高表面活性剂的亲水性。
在本发明的一个具体实施方式中,全氟化磷酸盐的混合物可以为含有由式1表示的具有1-I结构的单酯盐和具有1-II结构的二酯盐的酯混合物:
其中,式1中的n为自然数,优选为5~11的整数。在更具体的实施方式中,各个n为7。当各个n在上述范围内时,可以实现表面活性剂的低粘度和流动性,实现改善的可使用性。另外,表面活性剂的亲水性和疏水性是可调节的,确保了良好的分散性和加工稳定性。在上式中,各个M为碱金属。单酯盐占单酯盐和二酯盐的总重量的33重量%~45重量%。在酯盐混合物中,酯盐成分的表观平均分子量为560~980。
在本发明的另一实施方式中,氟化表面活性剂为全氟烷基硫酸酯表面活性剂。全氟烷基硫酸酯与全氟烷基磺酸酯的不同之处在于全氟烷基经氧原子与硫原子连接。作为阴离子型表面活性剂,可以使用氯磺酸(ClSO3H)或氨基磺酸(NH2SO3H)与全氟化醇的酯或可选地使用该酯的碱金属盐。
在本发明的一个具体实施方式中,全氟烷基硫酸酯表面活性剂可以为具有式2表示的结构的氨基磺酸酯:
在本发明的一个具体实施方式中,式2中的n为5~11的整数。在更具体的实施方式中,n为7。当n在上述范围内时,可以获得表面活性剂的低粘度和流动性,实现改善的可使用性。另外,表面活性剂的亲水性和疏水性是可调节的,确保了良好的分散性和加工稳定性。氨基磺酸酯表面活性剂的水含量可以为30重量%~90重量%。使用氨基磺酸酯作为硫酸类表面活性剂的有利之处在于,可以仅使用全氟烷基酯获得作为带电的离子物种(质子化氨基)的铵盐。由于该优点,与使用硫酸或氯硫酸不同,使用氨基磺酸酯可以避免需要碱处理来提高表面活性剂的亲水性。
在本发明的另一实施方式中,氟化表面活性剂为全氟烷基磺酸盐表面活性剂。
在本发明的一个具体实施方式中,全氟烷基磺酸盐表面活性剂可以具有式3表示的结构:
其中,式3中的n为自然数,优选为5~11的整数。在更具体的实施方式中,n为7。当n在上述范围内时,可以获得表面活性剂的低粘度和流动性,实现改善的可使用性。另外,表面活性剂的亲水性和疏水性是可调节的,确保了良好的分散性和加工稳定性。全氟烷基磺酸盐可以为全氟化辛基磺酸钾(n=7,M=钾)。
在本发明的锡类电镀液中,氟化表面活性剂可以表现出分散、乳化和消泡效果。氟化表面活性剂发挥使电镀金属的晶体细化的作用,改善凸点的晶粒尺寸和形状特征。氟化表面活性剂的其他作用是减少凸点(WID和WIW)的高度波动和防止凸点内空隙的形成和金属间层的破裂。
氟化表面活性剂可以为市售产品。
锡类电镀液中包含0.01mg/L~100mg/L的氟化表面活性剂。在本发明的一个具体实施方式中,氟化表面活性剂的含量可以调节至0.05mg/L~10mg/L的范围。在此范围内,可以使凸点表面上的锡类晶体细化,可以减少凸点的高度波动,并且可以防止凸点内空隙的形成和金属间层的破裂。
本发明的电镀液可以还包含有机添加剂。添加剂和氟化表面活性剂的总浓度适宜调节至10g/L~100g/L。适合用于本发明的锡类电镀液的有机添加剂的种类可以由本领域技术人员根据目标应用来确定,因此在此省略其详细说明。有机添加剂的实例包括晶粒细化剂、络合剂、抗氧化剂和消泡剂。
本发明的电镀液优选在用于电镀之前进行过滤。在电镀液的成分搅拌混合之后,可以将电镀液经孔径为数微米的筒式过滤器过滤以除去沉淀或杂质。筒式过滤器的孔径可以为例如0.2μm~6μm。也可以使用孔径为0.2μm~6μm的滤纸。
本发明的另一方面提供了使用所述锡类电镀液为倒装芯片制造焊料凸点的方法。本发明的方法涉及在UBM层上形成铜类金属柱和在其上电镀锡或锡-银合金焊料凸点。优选的是,锡类电镀液在UBM层上形成铜或铜/镍柱之后的12小时内施加。在此时,可以在连续过程中进行锡电镀或锡-银合金电镀。此种12小时内的连续电镀过程可以使由铜或镍表面上形成氧化膜或金属层间产生破裂和缺陷导致的金属间粘着最小化。
具体而言,本发明的方法包括(A)用铜或铜/镍电镀液电镀硅晶片,所述硅晶片具有露出电极焊盘的保护层和凸点下金属(UBM)层,从而在所述凸点下金属层上形成铜或铜/镍柱,和(B)用所述锡类电镀液电镀所述柱,从而形成焊料凸点。
对于在凸点下金属层上形成铜或铜/镍柱的电镀方法和在步骤(A)的电镀方法中使用的铜或铜/镍电镀液没有限制。电镀方法和电镀液可以为本领域中常用的那些。例如,铜电镀液可以为包含硫酸铜、硫酸(H2SO4)、盐酸、水和可选的添加剂的电镀液。铜电镀液可以从JCU,Co.,Ltd.(日本)以商品名Cu-BRITE BUHD获得。
在步骤(B)中用于形成焊料凸点的锡类电镀可以通过本领域中已知的任何适宜工艺进行,因此本文不对其具体条件进行说明。例如,电镀可以使用在UBM层上形成有铜柱的硅晶片作为阴极和惰性金属电极(例如,铂电极或镀铂电极)作为阳极进行。在一个实施方式中,在步骤(B)中用于形成焊料凸点的电镀可以在3A/dm2~20A/dm2的电流密度下进行。在优选实施方式中,可以在10A/dm2~19A/dm2的电流密度下进行高速电镀。在形成焊料凸点之后,可以接着进行焊料回流。
将参照以下实施例对本发明进行说明。不过,这些实施例仅出于说明目的而提供,而绝不是意图限制本发明的范围。
[实施例]
制备例1:铜柱的形成
在此实施例中,在倒装芯片半导体封装体的铜凸点下金属(UBM)层上形成铜柱。具体而言,将含有CuSO4·5H2O、H2SO4、HCl、H2O和有机添加剂的市售硫酸铜类电镀液(Cu-BRITEBUHD,JCU Co.,Ltd.,日本)电镀在12英寸的图案化晶片上形成铜柱。铜电镀根据制造商的推荐来进行,因而本文给出电镀条件的简要说明。将电镀液在室温搅拌并以10A/dm2的电流密度进行电镀,直至铜柱高度达到10μm。图2显示了在上述条件下形成的铜柱的电子显微镜图像。
实施例1:锡-银电镀液的制备
甲磺酸锡(基于最终锡含量(95g/L))、甲磺酸银(基于最终银含量(2.0g/L))、100g/L的甲磺酸、0.1mg/L的全氟化辛基磺酸钾、13.5g/L的聚氧亚乙基苯乙烯苯基醚、1.5g/L的聚氧亚乙基双酚F醚和270g/L的作为络合剂的硫二甘醇搅拌混合并经孔径为数微米的筒式过滤器过滤,从而制得锡-银合金电镀液。
评价例1:恒电流电镀
在此实施例中,使用实施例1的锡-银合金电镀液进行恒电流电镀并评价电镀的锡-银合金的特性。对于恒电流电镀,使用尺寸为2×2cm2的黄铜板的截面作为阴极,并使用镀铂的钛电极作为阳极。恒电流电镀在5A/dm2和10A/dm2的电流密度下在以100rpm的速率搅拌250mL的电镀液的同时进行,直至厚度达到20μm。结果示于图3和4。以5ASD和10ASD的电流密度形成的锡-银镀层的表面形状分别示于图3和4。
实施例2:锡类焊料凸点的特性
在此实施例中,观察锡-银合金凸点的形状和特性。将实施例1的锡-银电镀液电镀在制备例1中在12英寸图案化晶片上形成的铜柱上,从而形成焊料凸点。锡-银电镀在13A/dm2的电流密度下在室温搅拌电镀液的同时进行。电镀速度在13A/dm2下为6.6μm/分钟。获得了99.5%的电流效率和2.2%的银含量。在以2℃/分钟的速率加热至240℃并以3℃/分钟的速率冷却之后,进行焊料回流。与焊料凸点的形状(柱状或蘑菇状)无关,焊料凸点的图案化良好(凸点CD 20-60μm,凸点间距95-190μm),并且电镀趋势良好。同时,在不同电流密度下进行锡-银电镀。发现在10A/dm2、12A/dm2、13A/dm2、14A/dm2、15A/dm2和16A/dm2电流密度下电镀的电流效率分别为99.6%、99.5%、99.5%、98.9%、98.0%和95.8%。
在焊料回流前后通过电子显微镜和X射线成像分析在13A/dm2的电流密度下电镀获得的焊料凸点。结果,可以确认在焊料回流之后凸点具有平滑的表面外观。芯片内(WID)焊料凸点的最大和最小高度之间的波动为19.79μm±0.19μm。经原子吸收(AA)光谱测量,锡-银合金中银的比例为2.2%。X射线成像显示焊料凸点具有致密结构而无空隙。
实施例3:氟化表面活性剂的影响
在此实施例中,观察锡-银合金凸点的形状和特性。与评价例1类似,在制备例1中制备的形成有凸点下金属层的12英寸图案化晶片上电镀实施例1的锡-银电镀液,从而形成焊料凸点。实施例3与评价例1的不同之处在于将制备例1中使用的电镀图案化晶片切割为尺寸为3×3cm2的试样,将其用作阴极,将镀铂的钛电极用作阳极,在5A/dm2和10A/dm2的电流密度下在以250rpm的速率搅拌250mL电镀液的同时进行恒电流电镀,直至厚度达到20μm。测量焊料凸点的特性,结果示于表2和图5(a)和图6(a)。
比较例1
除了将氟化表面活性剂成分从电镀液中排除以外,按照与实施例3相同的方法通过锡-银电镀形成焊料凸点。测量在5A/dm2和10A/dm2的密度下形成的焊料凸点的特性。结果示于表2和图5(b)和图6(b)。
实施例3和比较例1中使用的锡类电镀液的组成汇于表1中。
表1
※POE-SPE:聚氧亚乙基苯乙烯苯基醚
POE-BPF:聚氧亚乙基双酚F醚
为了评价实施例3和比较例1中获得的镀膜的外观,通过SEM观察焊料回流前后的凸点的形状。测量电流效率、银含量(通过原子吸收光谱)、回流后凸点内的空隙(通过X射线成像)和WID值(%)。WID值通过将芯片内(WID)凸点的最大高度和最小高度之差除以平均高度而获得,以百分比表示。凸点的外观基于表面光洁度和平整度来相对地评价。经X射线成像观察,当凸点内没有空隙时,将凸点判为"优",当空隙不大于0.05%时,判为"良",当空隙大于0.05%时,判为"差"。结果示于表2和图5。
表2:以10ASD形成的锡-银合金凸点的评价
由该对比实验可以看出,取决于氟化表面活性剂成分的有无,电镀结构或凸点的特性极其不同。发现氟化表面活性剂成分可影响电镀结构的晶粒尺寸和形状特性,WID和WIW凸点的高度波动,以及凸点内空隙的形成和金属间层中的破裂。图5(a)和图6(a)分别显示了以5ASD和10ASD使用包含氟化表面活性剂成分的电镀液形成的凸点的SEM图像。图5(b)和图6(b)分别显示了以5ASD和10ASD使用不含氟化表面活性剂成分的电镀液形成的凸点的SEM图像。特别是,使用不含氟化表面活性剂成分的锡-银电镀液形成的比较例1的焊料凸点具有大大增加的WID凸点的高度波动,损害凸点图案的均一性,并且焊料凸点的银含量相对于锡含量显示出上升趋势(表2)。在电流效率和回流后凸点内空隙的比例方面也发现差异。
Claims (4)
1.一种锡类电镀液,其包含:
甲磺酸锡,其量为使所述电镀液的锡含量为40g/L~105g/L;
作为可选成分的甲磺酸银,其量为使所述电镀液的银含量为0.40g/L~3.0g/L;
70g/L~210g/L的甲磺酸;
0.01mg/L~100mg/L的氟化表面活性剂;
0.5g/L~60g/L的芳香族聚氧亚烷基醚;和
水,
其中,所述氟化表面活性剂含有由式1表示的具有结构1-I和1-II的碱金属全氟烷基磷酸盐物种和水,
其中,各个n为5~11的整数,各个M为选自由钠和钾组成的组中的至少一种碱金属,并且所述表面活性剂组合物为固体形式,且水含量为0.1重量%~3.0重量%;或者
所述氟化表面活性剂含有式2的全氟烷基氨基磺酸酯和水,
其中,n为5~11的整数;或者
所述氟化表面活性剂含有式3的全氟烷基磺酸盐和水,
其中,n为5~11的整数,M为碱金属。
2.如权利要求1所述的电镀液,其中,所述电镀液含有0.05mg/L~10mg/L的所述氟化表面活性剂。
3.一种为倒装芯片形成焊料凸点的方法,其包括:
用铜或铜/镍电镀液电镀硅晶片,所述硅晶片具有露出电极焊盘的保护层和凸点下金属(UBM)层,从而在所述凸点下金属层上形成铜或铜/镍柱;和
用权利要求1~2中任一项所述的锡类电镀液电镀所述柱,从而形成焊料凸点。
4.如权利要求3所述的方法,其中,所述焊料凸点在形成金属柱后的12小时内形成。
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Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4381228A (en) * | 1981-06-16 | 1983-04-26 | Occidental Chemical Corporation | Process and composition for the electrodeposition of tin and tin alloys |
JPH11229174A (ja) * | 1998-02-16 | 1999-08-24 | Mitsubishi Materials Corp | 半導体ウエハの突起電極形成用めっき浴およびめっき方法 |
US6251249B1 (en) * | 1996-09-20 | 2001-06-26 | Atofina Chemicals, Inc. | Precious metal deposition composition and process |
US6416571B1 (en) * | 2000-04-14 | 2002-07-09 | Nihon New Chrome Co., Ltd. | Cyanide-free pyrophosphoric acid bath for use in copper-tin alloy plating |
JP2004276219A (ja) * | 2003-03-18 | 2004-10-07 | Ebara Corp | 電解加工液、電解加工装置及び配線加工方法 |
CN1570219A (zh) * | 2003-04-07 | 2005-01-26 | 罗姆和哈斯电子材料有限责任公司 | 电镀组合物及电镀方法 |
CN1837414A (zh) * | 2005-03-24 | 2006-09-27 | 广东风华高新科技集团有限公司 | 用于甲基磺酸锡系镀纯锡电镀液的添加剂 |
CN101400830A (zh) * | 2006-01-06 | 2009-04-01 | 恩索恩公司 | 电解质和用于无光泽金属膜沉积的方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4698904B2 (ja) * | 2001-09-20 | 2011-06-08 | 株式会社大和化成研究所 | 錫又は錫系合金めっき浴、該めっき浴の建浴用又は維持・補給用の錫塩及び酸又は錯化剤溶液並びに該めっき浴を用いて製作した電気・電子部品 |
JP4812365B2 (ja) * | 2005-08-19 | 2011-11-09 | ローム・アンド・ハース・エレクトロニック・マテリアルズ,エル.エル.シー. | 錫電気めっき液および錫電気めっき方法 |
US8226807B2 (en) * | 2007-12-11 | 2012-07-24 | Enthone Inc. | Composite coatings for whisker reduction |
EP2221396A1 (en) * | 2008-12-31 | 2010-08-25 | Rohm and Haas Electronic Materials LLC | Lead-Free Tin Alloy Electroplating Compositions and Methods |
KR20150080398A (ko) * | 2013-12-31 | 2015-07-09 | 주식회사 에이피씨티 | 플립칩용 솔더범프 제조 방법과 이를 위한 금속 전기도금액 |
KR102233334B1 (ko) * | 2014-04-28 | 2021-03-29 | 삼성전자주식회사 | 주석 도금액, 주석 도금 장치 및 상기 주석 도금액을 이용한 반도체 장치 제조 방법 |
-
2014
- 2014-11-10 KR KR1020140155735A patent/KR101636361B1/ko active Active
-
2015
- 2015-07-24 TW TW104124104A patent/TWI575115B/zh active
- 2015-07-27 US US14/810,414 patent/US9871010B2/en active Active
- 2015-07-30 CN CN201510458355.XA patent/CN105316711B/zh active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4381228A (en) * | 1981-06-16 | 1983-04-26 | Occidental Chemical Corporation | Process and composition for the electrodeposition of tin and tin alloys |
US6251249B1 (en) * | 1996-09-20 | 2001-06-26 | Atofina Chemicals, Inc. | Precious metal deposition composition and process |
JPH11229174A (ja) * | 1998-02-16 | 1999-08-24 | Mitsubishi Materials Corp | 半導体ウエハの突起電極形成用めっき浴およびめっき方法 |
US6416571B1 (en) * | 2000-04-14 | 2002-07-09 | Nihon New Chrome Co., Ltd. | Cyanide-free pyrophosphoric acid bath for use in copper-tin alloy plating |
JP2004276219A (ja) * | 2003-03-18 | 2004-10-07 | Ebara Corp | 電解加工液、電解加工装置及び配線加工方法 |
CN1570219A (zh) * | 2003-04-07 | 2005-01-26 | 罗姆和哈斯电子材料有限责任公司 | 电镀组合物及电镀方法 |
CN1837414A (zh) * | 2005-03-24 | 2006-09-27 | 广东风华高新科技集团有限公司 | 用于甲基磺酸锡系镀纯锡电镀液的添加剂 |
CN101400830A (zh) * | 2006-01-06 | 2009-04-01 | 恩索恩公司 | 电解质和用于无光泽金属膜沉积的方法 |
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