CN1053158A - Digital key telephone system - Google Patents

Abstract

A key telephone system that comprises a plurality of ports, its port is connected by the two-way communication road, and the bit status that they transmit in the ground exchange of a plurality of inter-channel synchronization is so that provide communication path between the indicated port of central processing unit.These ports also can be connected to or the process central processing unit by message channel.Interface is used to regulate the message flow that is received by central processing unit in response to the signal of central processing unit and message channel, and be used to realize will be from the distribution of messages of central processing unit to one or more channels.Message channel allows to be provided by central processing unit or the suitable equipment that is connected any port the feature and the function of phone operation.

Description

Digital key telephone system

The invention belongs to the technical field of babyphone system and similar system, be referred to as key telephone system sometimes.More particularly, the present invention relates to the function of signaling and monitor message in the digital key telephone system.An example like this is disclosed in as yet not in the co-applications of granted patent " digital key telephone system ", and its serial number is 126701, is filed an application in November, 1987 by George Ai Erwen people such as (George Irwin).

Some babyphone systems are referred to as key telephone system usually.Press traditions of the past, key telephone system has many extension lines and the control terminal that is connected between the key telephone set.Each keyphone line all extends to telephone exchange.Every telephone set all comprises many push-button switches or key, and each key can both connect on this key telephone set to one specific telephone wire in many circuits of given this key telephone set.In these key telephone sets, the function of exchange that circuit is selected is mechanically provided and is distributed.The arbitrary characteristic that is additional to common telephone service (POTS) all must increase on each line basis.The major advantage of these systems is small scales, very economical.But, if the mechanism that such system need serve along with it and enlarging, after the regular period, finally will be more expensive on every line and characteristic basis than private branch exchange.Key telephone system is a feature with the simulation signal also, thus it can not with isdn interface, but in the near future, the business user will require to join with ISDN probably.

The objective of the invention is to provide a telephone system, wherein the advantage of key telephone system and digital signal communication is through the equipment at the station that is connected to system and common the existence.

Substantially, key telephone system example comprises a center cell (KSU) and a plurality of station.Standing can be telephone set, but also is not limited thereto.Other form of standing comprises data set and is connected to the interface arrangement of central office trunk (C.O.trunks).The computer of a general applications, people's computer one by one for example just can be used as the interface unit at a station.Standing in to be twisted into utilizes digital signal to be connected to the KSU port on the right line.In fact some stations can be the parts of KSU, and also available in addition being different from is twisted into right line connection.KSU itself can comprise the physical location more than.

The major function of key telephone system is that the two-way exchange form with the 64Kb/s channel between the station provides point-to-point communication.For example, two such channels can be used in each station.S that is used for system signaling and monitoring purposes and the S channel of a 16kb/s also can be used in each station.Each station and KSU be the processing unit of a little forms of Bao, for example microprocessor of a software control, perhaps a logical network.S and S channel allow a station digital coding message of each transmission to KSU.More precisely, its allows processing unit on the station to transmit the processing unit of a such message in the KSU.Design about processing unit will be narrated in the time spent of doing of telling about station or KSU.S and S channel allow KSU to transmit a message to any one or more stations equally.

Each message has the form of a regulation.In this example, two forms are arranged, each form all needs control information.Be input to message among the KSU and rely on control information, KSU can transmit on that message arrives at a station, resemble just as described in.Therefore, a message can be transmitted to any one other station or all stations indirectly according to the operation of this KSU in a station.According to the information that is included in the message, KSU goes operation, to set up or to remove the circuit that is connected the 64Kb/s between the station.This connection of standing can be used for the PCM speech, or is used for data, or the alternate manner of information in return.

The operation of standing is directly to be controlled by the processing unit at that station.Processing unit operates in a rudimentary program, also may operate in a higher program.Other device in lower-level program control indicating device and the station is read the state of input unit, and the generation of processing messages and explanation.The order of higher program controlled system station operation, and with other more senior program co-operate in other station or KSU so that make key telephone system provide required operation as a whole removing.The performance of standing is to be decided by program of working in that station or the message that receives from the program of working among KSU.Operation can be completely or partially by comprising attached or deciding in conjunction with the working procedure at some other stations of the digital computer of a general applications.

Because the performance of standing can be decided by the working procedure at other station, be possible so increase the station of new type, as the performance at the station that new software connected before just may going to influence is installed in existing station.So an additional station just can provide new characteristic, or the new button that needs and DISPLAY ORDER and indication operation.New characteristic can realize on existing station, and the program that does not need to adapt these stations or KSU.

The additional station that new features are provided in fact is a reprogrammable device, as the home computer.Therefore, new characteristic can add separately by software change or in additional computer systems.This is just passable with general technology, and does not need the producer of key telephone system or participating in of seller.Certainly, the control of all these utilizations extremely freely and communication function and characteristic can be subjected to distinctive protection and preferential constraint.

The present invention is embodied as a key telephone system, and it is used for the digital signal communication passage is provided between many ports, and also being used for provides signaling and monitoring link at key telephone system between said any port and processing unit.Key telephone system comprises and can be operated several time division multiplexing be sent the communication channels of (TDMT) and time division multiplexing reception (TDMR) that its each channel comprises several bit cells.At least one pair of TDMT, TDMR channel link to each other with each port individually.Each said TDMT channel and TDMR channel comprise a signaling and monitoring (S and S) bit cell, and it is in said several bit cells.A conversion equipment can provide communication path between TDMT and TDMR, except said S and S bit cell, directly use processing unit.One is transmitted information to handling device to the interface arrangement of processing unit sensitivity from the S and the S bit cell of selecteed TDMT channel, also transmit at least one S and the S bit cell of information, and conversion equipment provides independently communication path to the TDMR channel from processing unit.

The present invention relates to so a kind of method of operating of telephone system; This telephone system is used for providing digital signal communication path for connecting an equipment by a switch and a communication path that connects this switch and a plurality of ports between described a plurality of ports; Wherein this switch can be worked under a central processing unit control; Each described equipment has the keying operation that starts in response to the user and removes to control the treating apparatus of the function of described equipment in response to the message that receives from central processing unit

Described method is characterised in that and comprises the following steps:

(a) provide a multiplexed signaling that is associated with each port and monitoring message channel at least by this communication port;

(b) select a described port termly, so that receive a message from the message of its relevant equipment with in described central processing unit by the port transmission of this selection;

(c) in response to the message that receives in the step (b), in described central processing unit, produce message;

(d) by transmitting the message of each described generation with a device-dependent message channel, this message is assigned to this equipment.

The invention still further relates to so a kind of telephone system; It is used for providing digital signal communication path for the station equipment that connects this system by a switch and a communication path that connects this switch and a plurality of ports between described a plurality of ports; Wherein this switching device can be worked under a central processing unit control; Each described station equipment has the keying operation that starts in response to the user and removes to control the treating apparatus of the function of described station equipment in response to the message that receives from central processing unit

Described telephone system is characterised in that and comprises:

The synchronous communication media is used for providing a bi-directional communication channel and a message channel at each port at least,

The synchronous exchange device is used in response to control signal in selected a pair of two-way channel transinformation;

Described central processing unit can be used for identification message channel termly, from these channels, can receive a message from one of described processing unit, and can be used for producing one of described control signal and at least one address in response to a message that receives and stipulating a message channel, for this message channel, specify a message that is used for a corresponding processing unit of described processing unit; With

An interface arrangement, be used to detect the device that request sends, it is in response to first prearranged signal characteristic in one of message channel of being discerned, thereby solicits and receive described message and by the indication of central processor unit, with the message transfers of appointment in message channel.

Here with reference to embodiment of description of drawings:

Fig. 1 is the calcspar according to key telephone system of the present invention;

Fig. 2 is the key telephone system in Fig. 1, in order to the software configuration calcspar of support function station equipment (FUNCTIONAL);

Fig. 3 is a software architecture diagram that is similar to the software configuration of representing at Fig. 2, but has added the ability of supporting excitation station (STIMULUS) equipment and function station (FUNCTIONAL) equipment;

Fig. 4 is the time pulse action and is used for the picture specification that Fig. 1 produces the signal in the circuit switching module;

Fig. 5 is used to provide timing signal in Fig. 4, use the calcspar of a timing sequencer in the circuit switching module;

Fig. 6 is for the circuit switching module among Fig. 1 and the square principle figure of the counter of time slot and channel address is provided for the operation of circuit switching module;

Fig. 7 is the square principle figure that is used for the translation circuit of Fig. 1 circuit switching module;

Fig. 8 is the key diagram that is used for the various timing signals of Fig. 7 translation circuit action;

Fig. 9 is used for Fig. 1 circuit switching module, so that the frame principle figure of a time switching circuit of circuit-switched communications path is provided in key telephone system;

Figure 10 changes conference circuit and in conjunction with the time switching circuit among Fig. 9, provide the frame principle figure of meeting characteristic in key telephone system the time in the circuit switching module;

Figure 11 is the frame principle figure that is used in the interface circuit of key telephone system illustrated in fig. 1.

Figure 12 is the frame principle figure that is used in the processor interface circuit of key telephone system illustrated in fig. 1;

The description of embodiment

In Fig. 1, a digital key telephone system prepares to connect various digital telephone devices, shown in 13 and 14, the interface that also has various numerical datas, as home computer or the like, shown in 15 and 17, they can pass through this system and another suitable devices communicating, also can communicate by letter with other device through circuit or repeat circuit 23.The circuit or the junction traffic that connect digital key telephone system and other telephone plant are not shown, for example central office or private branch exchange system.The trunk of digital key telephone system is that parallel time division multiplexing (TDM) bus 10 by a weak point provides.It is nearly providing a broadband connections path between 100, one central processing unit interface circuits 8 of nine 64 channel circuit Switching Modules and the sound source 26.If any one sound source 26 provides an analog signal, it just is coupled to this system through lead 27.Bus 10 is called main bus, and the inferior bus 20 that is similar to main bus 10 is used for providing one-way communication from interface circuit 8, and each circuit switching module 100 is coupled 64 ten bits transmission serial channels in predetermined corresponding time slot in bus 10; Nearly 64 parallel selecteed TDM time slots are delivered to 64 ten bits and are received serial channel on bus 10 or bus 20.32 transmissions and receive channel are coupled to an internal circuit 12 through serial TDM path 11.Remaining 32 transmissions and receive channel are coupled to an outside port circuit on 22 through serial TDM path 21.Each channel can send the binary signal pulse train with the speed of per second 80Kbs, just can be used as a channel that is used to transmit pulse code modulation (pcm) acoustic information or data message with per second 64Kbs.Remaining 16Kbs just can offer the monitoring that combines with PCM or data message and communicate by letter with signaling.In this example, internal port circuit 12 is made up of 16 TDM time compression multiplexs (TCM) interface.The TCM method of transmission signals is sometimes referred to as " table tennis " transmission.Each of these interfaces at each TCM link 19 and two predetermined and fixing serial TDM interchannels in serial TDM channel 11, provides a transmission path.In a similar method, each breadboardin signal shown in 23,24 and 25 that comes and goes mutually combines through serial TDM path 21 with by the internal port 22 that the CODEC circuit provides.On the other hand, it can be through digital signal transmission link, for example a T ₁Or DS30 provides an outside TDM port that connects other telephone plant very expediently.But in this case, each CODEC circuit all with one of serial TDM path 21 predetermined with fixing transmission and receive channel to being connected.Therefore, to each CODEC circuit and each port (at that digital telephone equipment or other digital device or a digital interface or suitable circuit, all can receive this digital key telephone system as trunk line etc.), have ten predetermined bit parallel time slots in main bus 10 at least, it is configured to be used for receiving from the next information of circuit external behavior.In other example, the time slot on the bus 10 is used to the purpose of the information that transmits corresponding to the external behavior of circuit.Therefore, such example needn't further be discussed at this.A central processing unit 7 is coupled to main bus 10 through interface circuit 8, so that through one of ten bit parallel time slots 32 predetermined channel communications.Interface circuit 8 can receive all ten bits of each time slot on the bus 10.Usually, only be equivalent to 2 bits of a 16K bits subchannel,, be sent to central processing unit 7 from bus 10 by interface circuit 8 for calling out the purpose of control.Interface circuit 8, is occurred according to the time slot of the destination of the circuit external behavior of appointment through time buses 20 by central processing unit 7, provides signaling and monitoring through suitable circuit switching module 100.Therefore, each circuit switching module 100 transmits 10 bits to main bus 10, but only receives and exchange 8 bits from main bus 10, and 2 bits in addition receive through time bus 20 in due course.

Each port that links with communication path provides full-duplex operation with 2 character codes in this example, the character code of each 10 bit, and per 125 microseconds exchange is once.The 0-7 bit position that has one in these character codes at least is one of data or sound, and bit cell 8 is signaling and monitoring, and bit cell 9 is the affirmation of signaling and monitoring.Signaling and monitor message through interface circuit 8, are gathered from the port that links with channel under the guide of central processing unit 7, and it also can be assigned to the port that links with channel equally.It is the byte group that collected information is gathered by the interface circuit 8 that is used to be sent to central processing unit 7, and utilize one a little between wait function, distribute to advance the bit cell 8 of selected or all channels by the information via interface circuit 8 of central processing unit 7.

This key telephone system plans to support two dissimilar station equipments: one is very basic substation, hereinafter to be referred as exciting bank (STIMULUS) or abbreviate the S device as, the S device comprises a bitstream interface device, a simple processing unit and a CODEC; And another is the autonomous station equipment that many complex characteristics are arranged, and it can take the form of proprietary key telephone set, interface arrangement or proprietary demonstration phone or data terminal.Such equipment is referred to as functional device (FUNCTIONAL), and such reference device is meant the call-processing device that comprises some softwares or form of firmware.For convenience's sake, any is not that the station equipment of S device all is referred to as functional device (FUNCTIONAL) or F device.

In the S device, the variation of its any operating state, for example, on-hook is all passed through the processing unit of S device to off-hook or button, and bit position 8 and interface arrangement are sent to central processing unit.In the S device, it is to be finished by the continuous request " OO " in the bit cell 8 and 9 of out channel (request sends RTS), till receiving in the bit position 8 and 9 at incoming channel that the clear to send (CTS) that is identified is received.When CTS when the S device is identified, the excitation protocol of an indication off-hook (STIMULUS) message just is sent out through S and S bit cell 8.After this a typical call progress begins to be undertaken by exchange STIMULUS protocol message.

In the F device, used diverse ways, a request sends (RTS) and may be created in after the off-hook, and the thing followed is the abundant dialing information by phone user keying.In this case, processing unit and its operation sequence are carried out basic call and are handled, and except that the dialing sound is provided in due course, also produce ring-back tone or busy tone.The communication class of F device is similar to the S device, uses S and S bit cell 8.After CTS was received by central processing unit, the F device transmitted the message of a functional protocol (FUNCTIONAL).

The structure arrangement of table 1 explanation excitation protocol (STIMULUS) and functional protocol (FUNCTIONAL) message.

Table one

Cartridge binary system (HEX) type word length

0X000000 (40H) is to encouraging 1 byte

0X011111 （5FH）

0X100000 (60H) is to encouraging 2 bytes

0X100111 （6FH）

0X101000 (68H) is to encouraging multibyte

0X101111 （6FH）

0X110000 (70H) is to the function-variable byte

0X111111 （7FH）

In header, from left to right be bit cell 7 to 0.Especially the agreement of bit cell 5 and 4 Indication messages.Feature message in this is arranged is indicated for one in the bit cell 5 and 4 of " 1 " by two suggestions.The S stimulus messages is indicated for one in the bit cell 5 and 4 of " 0 " by suggestion at least.In header, the explanation in table two of the purposes of each bit cell.

Under the situation of the scope of header 40H-5FH, header is a real messages, and its main points are loaded in bit cell 3-0.In the message more than a byte, second and the byte followed are carried information.In message, what or quantity of information bit will describe in detail with the less significant bit unit of header.

CTS bit cell indication clear to send message, and have only when a F device or a S device reception, it is only important.

A plurality of agreements and central processing unit communicate by letters with the S bit cell through S, and FLOW CONTROL message allows to reside in as shown in Figure 1 the key telephone system as the favourable software configuration that illustrates in Fig. 2 and 3.In Fig. 2, a keyed system device (KSU) 40 comprises the common equipment 41 through software unit and S and 50 couplings of S channel, i.e. a network controller 42 and a data basic management device 43.Common equipment 41 is actually in Fig. 1 the representative with bus 10 and 20 interface hardwares, but also comprises software and the firmware that resides in the central processing unit 7.In this example, central processing unit 7 is 68008, and it can be by U.S. Mo Tuoluola (Motorola Corp.) company bought, the address is 1303East Algonquin Road, Roselle, Illinois, 60196, U.S.A..Central processing unit is arranged to modular software unit, as unit 42 and 43.

S and S channel are common message channels to the operation of system's all functions (FUNCTIONAL) station equipment in fact.For example be that 53, one systems management datas of F device 51 and 52, one automatic call distribution (ACD) terminal recover (SMDR) terminal 54 and a peripheral trunk line device 55 that is used to be connected to the central office (not shown).Each of these devices all comprises their processing unit and the function device of call processing software.

Fig. 3 illustrates a similar in the example of Fig. 2, but except that functional device, also is used for supporting excitation (STIMULUS) device.In this case, common equipment 41 is also supported attached module software with the form of functional simulation device 45,46 and 47.These functional simulation devices are represented exciting bank 61,62 separately and are encouraged relay 63 to finish the remainder that makes these key telephone systems and seem also to like function (FUNCTIONAL) device.Therefore in some system configurations, be desirable based on the business accounting of each port.Should also can appear among Fig. 3 by attention function device 52-54, but for convenience of description, omit at this.

According to the operation of key telephone system among Fig. 2 and Fig. 3, the F device of a CTS message of any reception can send to the equipment and the simulator of whole functional entity.Equally, the F simulator also can send to the whole functional entity, but because the F simulator is the software that is based upon among the KSU, is unwanted so the arbitration ceremony of RTS and CTS was discussed in the past.Any functional entity can respond or according to its program, is guaranteed by the content of transmitting function message.Any such feature message that comprises an exciting bank is interrupted, and is operated by functional simulation device software module thereafter.Cause so effectively a series of stimulus messages through it S and the S channel the functional simulation device and and its exciting bank of linking between exchange.For example S device 61 and simulator 45 exchange messages through a S and S channel 61a.

In feature message, message bit is assigned with or is forwarded to each channel in every frame.Though exciting bank or unit are received function information easily, there, the energized process device is arranged to ignores function information, goes identification as the different header of usefulness of explanation in above-mentioned table one and table two.On the other hand, excitation information is unidirectional, and the corresponding to channel of exciting bank that the distribution of excitation information is confined to be scheduled to stimulus messages produces.

The FLOW CONTROL of function and stimulus messages with reference to Fig. 4-10, is discussed the structure and the operation of modularized circuit Switching Module 100 from the viewpoint of hardware.

For make each or a plurality of circuit switching module 100 can not dispute on from the TDM path 11 of serial and 21 transmission information to parallel TDM bus 10, phase place timing sequence device as in Fig. 5, representing, permanent in each module 100, be used for the function of adjustment module.At waveform example illustrated in fig. 4, represent one with 1KH ₂The prime frame clock pulse that takes place of speed, with 5.12MH ₂Speed produce clock pulse and the machine state time pulse SMO-SMIO be numbered 0-27.Owing to be installed in Switching Module in the system, one is preset initial decoder 101 and is linked a hardwired position, but not shown, it provides a binary word that is fixed as 4 bits, ID0-ID3.During the combination of the signal condition of bit ID 0-ID3 in digital key telephone system the position of each possible Switching Module be unique.Preset initial decoder 101 on bus 102,, produce the binary word of one 5 bit corresponding to bit status as table one expression.One 5 bit counter 103 is preset with corresponding to the word on bus 102 by the prime frame pulse of each generation, and the clock pulse with each generation increases thereafter.The output 104 of counter 103 is by decoder 105 decodings, and decoder 105 is used in each counting 19 that produces in the counter 103, produces a reset signal on lead 106.So along with the generation of next clock pulse, counter 103 is reset to 0.Therefore, provide the tally function of a mould 20, resemble in the table one explanation carry out stage by stage.

According to this table, for example, for circuit switching module 0, channel 0 on the left side serial TDM path 11, be inserted in time slot 0 in the parallel TDM bus 10, channel 1 is in the time slot 20 or the like, channel to the last, channel 31, the channel 31 of serial TDM frame is inserted in the time slot 620.

Explanation in addition, each TDM path have 32 parallel 10 bit receive channels that are assigned on the main bus 10, and each channel by 19 other channels produce separated.

Decoder 105 also produces a SMO time pulse, and it conforms to counting 19 in occurring in counter 103.A shift register 109 is in response to SMO time pulse and clock pulse, to produce additional period pulse SM1-SM10 as shown in Figure 4.

With reference to Fig. 6, occur in the time slot on the parallel TDM bus 10, followed the tracks of by a parallel time slot counter that comprises a mould 20 counters 111 and mould 32 counters 112.Counter 111 is corresponding to 5.12MH ₂Clock pulse, on the counting terminal TSCO-4 of 5 time slots, provide 0 to 19 repeat count.Counter 112 increases with each generation that resets in the counter 111, and the repeat count of 0-31 is provided on 5 block count terminal TBC 0-4.Thus, the combination of binary signal is defined as address, 640 parallel time gaps of every frame on TSC and TBC.Counter 113 provides a serial channel tally function, and it provides 32 channel register addresses on serial channel counting terminal SCC0-4, produce with the channel that is limited to serial TDM path 11 and 21.Counter 113 produces with each time block to be increased, as time pulse SM6 is indicated.All counters 111,112 and 113 all are reset with the generation of each prime frame pulse.

Converter circuit shown in Figure 7 belongs to circuit switching module 100, and is each of 64 TDMT and 64 TDMR channels on TDM channel 11 and 21, carries out serial-to-parallel conversion, and parallel-to-serial conversion.As previously described, the TDMT channel is an incoming channel, and pass to carry the data that result from terminal equipment or speech, additional signaling than top grade, and corresponding TDMR channel is out channel, and transmits signal and produce the terminal equipment of signals to those.Each incoming time slot all comprises 10 binary bits, and these binary bits are directly converted to parallel form, and gives main bus 10 in during predetermined time slot.Each outgoing time slot comprises 10 binary bits, and they can obtain from one of two sources: source is the corresponding time slot interval on inferior bus 20; Another source is that these 8 bits have crossed the time conversion, add from the generation in response to the TDMR channel 2 bits in time slot interval on inferior bus 20 from main bus 10 8 bits in interval, crack of when taking up an official post.

Timing signal with reference to shown in Figure 8 discusses this translation circuit in more detail.Shown in Fig. 8 top is the system clock waveform, and some other waveform is to be described as having vertical rising and sloping portion for convenience with imagining among Fig. 8.In fact, these waveforms and those waveforms shown in Figure 4 are similar, have the rising and the sloping portion of inclination, and this is only real description.Translation circuit among Fig. 7 comprises three quadrature shift registers, uses 501,502 and 503 expressions respectively.These three registers are finished needed serial-to-parallel conversion and parallel-to-serial conversion.Each quadrature register 501,502 all links to each other with a clock generator (not shown) with 503, this clock generator produce as shown in Figure 8 be used to be shifted and the zero lap timing signal of direction control.The control signal V1 of vertical direction, V2 and V3 are respectively applied for register 502,501 and 503 vertical directly shift function.The control signal H1 of horizontal direction, H2 and H3 are used for the direct shift function of level of register 502,501 and 503.The actual loaded of the D flip-flop unit in the register 502,501 and 503, by signal pulse S1, S2 and S3 timing.Control signal V2 that dots and V3 show that these signal pulses remove 20 system clock cycles from contiguous H2 and H3 signal pulse, and therefore, each is all in the interval beginning of 40 system clocks.The bit of TDMR serial bit stream is timed, so that it overlaps with the rising edge of serial digital circulation clock signal C690.The bit of path 11 and 21 TDMT serial bit stream is latched device 511 and 521 samplings and more regularly, overlaps so that also keep.In half system clock cycle before serial digital circulation clock signal C690 rising edge, the content of (2 take advantage of 8) out register 502 is selected by receiving multiplexer 535, to offer the initial bit of each TDMR channel on path 11 and 21.The selection of this reception multiplexer is in response to multichannel shown in Figure 8 and selects out (MUX SEL OUTGOING) control signal.These out bits are by the rising edge timing of clock signal C 690, so that begin to transmit the time slot of one 10 bit.Therefore, the initial bits of corresponding TDMT channel is crossed latch 511 and 521 samplings with the trailing edge road of same clock signal C 690.Then, sampled bit is added to (2 take advantage of 2) Incoming register 501.In said same clock signal C 690 intervals, the content in register 502 and the Incoming register 501 is kept by the multiplexer 532 on main bus 10 terminals in parallel mode.Only when time slot (TS) 19 occurred, it just by the rising edge indication of the decoding shown in Fig. 8 18, gave P bus 10 with the signal condition of multiplexer 532 gating I buses.Half identical clock signal of system after said same C690 clock signal trailing edge is in the cycle, three quadrature registers 501,502 and 503 by timing, therefore, Incoming register 501 receives said initial bits, out register 503 moves on to multiplexer 535 with second out bit, and register 502 is shifted to multiplexer 532 with 8 bits of TDMT path 21.2 bits that while Incoming register 501 will be left are shifted to multiplexer 532 by multiplexer 533.The parallel information byte of two striking out then enters register 502 by data holding register 504 and 505 under the control of ampere-hour signal SM2 and SM6.Simultaneously, as mentioned above, register 501 stores two initial bits of TDMT channel of each Incoming.In case initial two bits occur, register 501 and 503 is receive clock signal no longer just, and up to the arrival of next outgoing time slot sequence, the bit deposited of all 10 quilts is shifted to P bus 10 concurrently at that time.

When next sequence of time slots begins, cause that register 501 and 503 vertically moves content 2 bits separately, the i.e. direction that makes progress among Fig. 5.Therefore, 8 TDMT bits of back are vertically shifted in the register 502, and original content also is moved out of, so that send TDMR path 11 and 21 to by multiplexer 535.Because the continuous alternately control signal of supply level direction and the control signal of vertical direction, so each the TDM channel on TDM path 11 and 21 repeats parallel-to-serial and serial-to-parallel circulation and determines.

Time change-over circuit among Fig. 9 is used for 8 information bits of one of 640 time slots on the comfortable bus 10 in future, periodically transfer to the input of a parallel T bus of the parallel input multiplexer 506 of translation circuit among Fig. 7, under the guide of central processing unit 7, finally deliver to a TDM path (11 or 21) time slot again.The information bit of each time slot on the P bus 10 is caught by 710 moments of data input latch circuit, and is added to an input 702 of dual-port random access memory (RAM) 701.This two-port RAM 701 has an output 703, and it is in response to being added in one 6 bit addresses that reads address port 704, to drive T bus 770.This RAM701 is different from typical dual-port storage device part and is: in order to be stored in the information that its input 702 receives, it does not comprise a typical address decoding circuitry, replace, each write address is decoded and be added to one independent 64 and write the terminals that start one of terminal 706.Decoded write address is timed by writing to start to latch with gating circuit 720.Circuit 720 can be determined the individual arbitrarily startup terminal of writing simultaneously.Two-port RAM 701 responses are added to its 64 one or more signals of writing the individual or whole terminals arbitrarily that start terminal 706 to be determined, and stores the state of said 8 information bits in the corresponding memory position, as long as there is this situation to occur.For example: if neither one is determined in the terminal 706, then do not have memory cell to be written into, if there are one or more terminals to be determined in the terminal 706, so one or more corresponding memory cell are written into.Under the control of a trigger (not shown), 64 two-port RAM memory cell are sequentially periodically read, and producing the TDM channel address of 32 orders by the counter among Fig. 6 113, said trigger is among the latch cicuit 711 that is triggered by signal SM2 and SM6.

Connected storage 730 contains information, and with regard to effective time slot in 640 P bus time slots, thus, the information bit state is deposited among the two-port RAM 701.This connected storage 730 is Content Addressable Memories, and it comprises the address port 732 of 731, one 6 bits of data-in port of one 11 bit and the compare address port 733 of one 10 bit.The general structure and the operating process of Content Addressable Memory are as you know.In this example, the P bus address of stored information to be lived with in the memory cell of connected storage 730.Each (not shown) of 64 memory cell is all corresponding with 64 lead-out terminals that separate 736.A digital comparator (not shown) links to each other one by one with 64 memory cell.Therefore, the address that appears at comparison port 733 be stored in 64 information in the memory cell and compare one by one.In each moment, if relatively the address at port 733 places is identical with information in the memory cell, and this memory cell comprises an effective bit that is determined.So, a respective terminal in 64 lead-out terminals of 736 is occupied.Seizure condition finally again by described above, is transferred in the two-port RAM 701 by circuit 720.The operation of circuit switching module 100 is commanded by central processing unit, central processing unit uses and is exclusively used in the interface circuit 8 and 32 of the time slot on the P bus, so that through data-latching circuit 740 and address latch circuit 750 information is posted in the memory cell that is reduced to connected storage 730.The information of being come out by interface circuit 8 has the form of 4 bytes, and each byte all takies the time slot 19 of 4 time blocks that occur continuously on P bus 10.These 4 bytes comprise a command byte, and what follow is an address byte, a low data byte and a high position data byte.Each these byte all is accompanied by an effective signal on the terminal of two remaining P buses 10, are real instructions from central processing unit 7 to show them.Connected storage of part explanation of this command byte.The write or read function that one of source connected storage or purpose connected storage will carry out.Comparator responds meeting between the remainder of this effective signal and instruction and the IDO-3, stores next byte, i.e. address byte to cause address latch circuit.Therefore, the data-latching circuit 740 among Fig. 9 is caught 11 bit status of low level and upper byte, and when 6 address bits of address latch cicuit 750 outputs, they are deposited in the memory cell of connected storage 730.For central processing unit, yet need to confirm the information content in any address in the connected storage.In this case, command byte shows reads function, and address byte shows the memory cell that reads.Low and upper byte is subsequently driven by institute's canned data, comes out from the data output end 738 of connected storage 730, and the multiplexer 532 in Fig. 7 is come P bus 10, is picked up by interface circuit 8 at that.

Time conversion conference circuit among Figure 10 provides the characteristic of tripartite talks for this digital key telephone system.This time change-over circuit can also periodically shift 8 information bits from another time slot in 640 time slots on the P bus 10, such as it transfers to said TDM channel slot the most at last, with reference to the beginning part of top discussion Fig. 9.For introducing very simply, byte is passed through the T bus 770 by Fig. 9 output, and offers multiplexer 992 by meeting C bus 991.4 most important bits of each byte compare in comparator 993 (not comprising the label bit), this comparator is under 4 bit values from C bus 991 are equal to or greater than situation from 4 bit values of T bus 995, commander's multiplexer 992 will be added on the T bus 540 from 8 bits of C bus 991, and under the bigger situation of the value of T bus 995, then will be added on the T bus 540 from 8 bits of T bus 995.Therefore, three-party conference just can realize like this that wherein each side can only hear that side's that sound is the highest among other two sides speech.

The time conversion conference circuit of Figure 10 is discussed in more detail below.The information bit of each time slot is caught by PCM input latch circuit 910 moments ground on the P bus 10, and it is added to the input port 902 of dual-port PAM910.This two-port RAM 9901 comprises an output 903, and it is buffered on the C bus 991 by PCM output latch road 990.And T bus 770 is to be buffered on the T bus 995 by latch cicuit 994.This two-port RAM 901 is different from two-port RAM 701, and it has only 16 memory cell, and is not used in the typical address decoding circuitry that reads the information that is stored in these memory cell.Each write address decoded and be added to independently 16 906 write one of start terminal, and each to read the address also decoded, and be added to 907 independently 16 read one of start terminal.Write address after the decoding by writing starting and latching with gating circuit 920 and regularly.And latch with gating circuit 970 and regularly by reading to start the address of reading after the decoding.This is read to start to latch with gating circuit 970 and comprises that decoding of its response of an XOR circuit (not shown) reads the generation of address, so that determine a relatively initiating signal on terminal 971.This comparison initiating signal is used to start the selection function of comparison circuit 993, and when comparison signal was non-existent, it made multiplexer 992 uniquely the bit status of T bus 995 is added on the T bus 540.Therefore, if latch and the input of gating circuit 970 the reading the address or occur of decoding not reading to start, then can translate function and not occur more than the address of 1 decoding.Two-port RAM 901 responses are added to the signal of writing start terminal 906 to be determined, is stored in the corresponding memory cell from the signal condition with said 8 breath letter bits.And in the two-port RAM 901 memory cell read be in response to that 907 places are determined read start terminal accordingly.

A source connected storage 930 comprises and the effective relevant signal of P bus time slot, and thus, the information bit state deposits two-port RAM 901 in.This source connected storage 930 is Content Addressable Memories, and it has 16 memory cell (not shown), and each all with 16 lead-out terminals 936 that separate in one corresponding.This source connected storage comprises the address port 932 of 931, one 6 bits of FPDP of one 11 bit and the compare address port 933 of one 10 bit.A digital comparator (not shown) links to each other one by one with 16 memory cell, and the address that therefore appears at comparison port 933 compares one by one with the information that is stored in these 16 memory cell.Identical with the information of a memory cell when the address of port 933 relatively, and this memory cell is when comprising a definite effective bit, in 16 lead-out terminals corresponding one occupied.Seizure condition is represented the write address of a decoding, by circuit 920 it is sequentially transferred to according among the two-port RAM 901 described above.

Purpose connected storage 980 comprise with TDM path 11 and 21 on the relevant information of effective TDMR time slot, be stored in the information bit among the two-port RAM 901, be drawn towards this purpose connected storage by multiplexer 922 and T bus 540.This purpose connected storage 980 has and source described above connected storage 930 similar structures.Compare one by one with each address that is stored in 16 memory cell the address that appears at comparison port 983.When the information of port relatively is identical with information in the memory cell, and this memory cell is when also comprising an effective bit that is determined, and a corresponding terminal in 986 in 16 lead-out terminals is just occupied.Read to start latch with gating circuit 970 in exclusive "or" circuit allow the start terminal of reading that response 907 places determine, it causes two-port RAM 901 according to described above, and 8 information bit states are read from corresponding memory cell.

The information that appears at comparison port 983 is from channel counter bus terminal SSC0-4, and determined by channel counter circuit 911.This latch cicuit 911 comprises a trigger (not shown), and it is triggered by timing signal SM2 and SM6, and therefore every frame provides 64 addresses, and this is similar to the discussion of front to latch cicuit 711.

In this digital key telephone system, the conferencing function operation is by central processing unit 7 commanders, it is got in touch with the time slot of 32 special uses on interface circuit 8 and the P bus, so that use the similar method of connected storage 730 being discussed with the front, by data-latching circuit 940 and address latch circuit 950, information is lived with in the memory cell of source connected storage 930 and purpose connected storage 980.And by the data output end 938 via connection shown in Figure 8, data output latch circuit 912, buffer circuit 913 and Z-bus, central processing unit 7 can confirm the information content of source connected storage 730.By the data output end 988 via connection shown in Figure 10, data output latch 914, buffer circuit 915 and Z-bus, central processing unit also can obtain the information content of purpose connected storage.

Shown in Figure 11 and 12, the basic function of interface circuit 7 is to receive S and S message, and distributes S and S message, from the S of main bus 10 and S message in any one time, at a port relevant with time slot by S and 810 receptions of S reception buffer register.This S and S message send buffer register 820 by S and S and send to the time slot of all inferior bus 20 or the time slot of a selected inferior bus 20.In fact this S is connected with 20 with main and secondary bus 10 by bus buffer circuit 801 with S message, and simultaneously, interface circuit is connected with data/address bus with the address of central processing unit with 899 places 898 by handling buffer 805.Buffer 801 and 805 basic function are to carry out signal forwarding between all various electric potential signal source and destination, and reduce receiving gate and the driving gate that is attached to bus and various unshowned timing and control terminal.The sort buffer device is used always in digital electronic system, therefore there is no need it is discussed in detail.

Another basic function of interface circuit is to catch S and S message request transmission (RTS).As previously mentioned, the appearance of a RTS is to be sign " 0 " to occur at the bit cell 8 of time slot and 9.The useful signal detector receives the time slot state of each bit 9, and detects and latch the state of " 1 " in the time of a weak point.Request sends the time slot state that detector 816 also receives each bit 8.The state of bit 8 is " 0 " if useful signal detector 815 is not latched, and then RTS detector 816 is exported the indication of a request to send signal on RTS terminal 816a.If this request is sent from a selected time slot group, receive shift clock (RSCL) just make the shift register part of buffer register 810 that this RTS indication is displaced in the buffer register 818.After 16 RSCL pulses, the content in the two byte shift registers in the middle of a reception load clock (RLCL) makes is transferred to the output register of one two byte.The content of this output byte register can obtain at processing buffer 805 places by S and S messaging bus 812.Therefore, for the appearance of RTS, register 818 is timed, with 16 special ports groups of monitoring in this key telephone system.In from 16 particular ports in any input of any one.The RTS that is occurred will be used to produce a rudimentary interruption, to report existing of this information to central processing unit., when each port connection device all sends RTS continuously till receiving clear to send (CTS), the generation to any one RTS does not all have anything to impose especially so.Final central processing unit will send an appropriate C TS, and a selected simultaneously port relevant with time slot is as a source of desired S and S message.

When CTS message is detected, just send a response with the message that has a byte at least in the station equipment of expection.At bit cell 8, first bit of this message is " 1 ", and is effectively " 1 " at bit cell 9.This combination make the continual useful signal for order detect to occur during, initial bits detector 817 initial bits (SB) that rise overlap with selected time slot.When this SB signal occurred, RSOL pulse (one of every frame) makes the state of selected time slot bit 8 move on to S and S receives in the buffer register 810.All produce an interrupt signal for each byte of so collecting, make central processing unit can receive the S and the S message of Incoming, if necessary, portion also produces (encue) Incoming S and S message within it.

When transmitting load (TL) pulse timing, out S and S message can receive by handling buffer 805 by bus 822.A shift register response in the register 802 transmits displacement clock pulse (TSCL), with the speed of every frame one bit byte one bit one ratio that receives is specially shifted to bus buffer 801.The state of this register output stage is added to transmission gate 823 continuously, and this transmission gate 823 and an invalid bit driver are all selected (TSS) signal in response to the time slot that is used for this operation.Under the situation of F message, although being a frame, the length of this message connects a frame, TSS still is established.Under the situation of S message, just in the time slot relevant with the destination interface of S message, TSS just is established.When TSS was not established, invalid bit driver presented " 1 " on terminal 829.Useful signal driver 825 presents on terminal 826 " 1 " in response to the establishment of TSS.Therefore, S and the S bit that is added in terminal 829 gone hand in hand with the useful signal bit that is added in terminal 826.

Another usefulness of interface circuit 8 is to provide the wideband data path between port that any 64Kbs channel links to each other and central processing unit 7.Under the control of this bus (RB) gating signal, the input that comes from any channel appointed by Data Receiving buffer 830 all can receive, and read bus (RB) gating signal is produced simultaneously with the appearance of the main bus time slot of required reception information.This situation occurs, preferably produce a senior interruption, consequently produce one and write processor (wp) gating signal, use so that the byte that has been cushioned on the bus 831 is offered central processing unit 7.Use similar method, information byte can transmit buffer 846 by data from central processing unit 7 and transfer on the bus 841, so that take main bus 10 in predetermined time slot.

Although buffer 830 and 840 provides data transformation interface easily, if this conversion occurs continually, so this interface circuit must satisfy excessive time loss.For example, for the communication port in this key telephone system being realized control rapidly, just needing continually between Switching Module 100 and central processing unit 7, data shift.Therefore, provide special can be in all 32 time slots of main bus 10 the interface operable circuit, it is the central processing unit special use, as previously mentioned.Writing (W) when signal occurs, be loaded on the FIFO861 of 4 bytes by multiplexer 860 from the link order byte of bus 863.After FIFO861 received these 4 bytes, central processing unit 7 must be given circuit switching 100 by bus 866 and main bus 10 beginning transferring datas by the indication interface circuit.When the control time slot of each special use occurred, the bit status that this interface circuit will appear at the FIFO output added to main bus 10.If do not need to transmit message, so an invalid code is added on the bus 863, then be added to again on the bus 866.In this way, in per image duration, can transmit the nearly link order of 32 bytes by main bus.The apply for information of 2 bytes is added to FIFO, pass through main bus 10 so, can reach the exchange of 16 inquiry bytes and 16 response message bytes.

Functional circuit blocks among Figure 12 is through same processing buffer shown in Figure 11 805 and central processing unit interface.In Figure 12, and to the similar time slot address generator 880 of the appropriate section that Fig. 5 discussed, be the appearance that interface circuit 8 is determined the time slot intervals.Particularly central processing unit loads selectively by 805 pairs of address registers 881 of buffer, to determine that those are the RTS time slots that are monitored, be that those are allowed to transmit the time slot that S and S message are given S and S reception buffer 810, and those are chosen as the time slot of the single channel transmission that is used for S and S stimulus messages or CTS message.

During operation, the content of comparison means 882 monitor address register 881, and the time slot address that is presented by generator 880.Instruction that the appearance that this meets and central processing unit produce and the signal combination of coming self-detector 815-817 be used for the generation order, and be control signal regularly, as the front to Figure 11 discussed.State and interrupt circuit 883 are according to detector and control primary signal, monitor S and S message transfers, the process that data byte shifts and control byte shifts producing a timing interrupt signal, thereby makes the chance and the requirement of central processing unit change information exchange.

Claims (8)

1, a kind of method of operation of telephone system, this telephone system is used for providing digital signal communication path for connecting an equipment by a switch and a communication path that connects this switch and a plurality of ports between described a plurality of ports, wherein this switch can be worked under a central processing unit control, each described equipment has the keying operation that starts in response to the user, processing unit with the function of removing to control described equipment in response to the message that receives from central processing unit

Described method is characterised in that and comprises the following steps:

(a) provide a multiplexed signaling that is associated with each port and monitoring message channel at least by this communication port;

(b) select a described port termly, so that receive a message from the message of its relevant equipment with in described central processing unit by the port transmission of this selection;

(c) in response to the message that receives in the step (b), in described central processing unit, produce message;

(d) by transmitting the message of each described generation with a device-dependent message channel, this message is assigned to this equipment.

2, basis the process of claim 1 wherein,

Depend on that relative equipment is an excitation set or a function device, thus each message that receives in the deciding step (b) is included among the stimulus messages agreement or feature message agreement among;

At step (c), produce the message that is included in described excitation and the functional protocol;

At step (d), described message is restricted to stimulus messages;

The feature that it is characterized in that described method also is to comprise by each described message channel transmission each described feature message from described central processing unit.

3, according to the process of claim 1 wherein that an operating characteristics is available for the user as one of described equipment of subscriber equipment, the feature of described method also is to comprise the following steps:

(e) be provided at operating characteristics in the characterization device that one of described port place connects;

(f) in response to feature request action the user at a described equipment place, exchange of signaling and monitoring message between user's equipment, this characterization device and this central processing unit, thus this feature is represented this subscriber equipment by this characterization device and is provided.

4, can settle again and operate at other port at an equipment that port connected and exercisable according to the process of claim 1 wherein, described method be characterised in that:

(g) in the equipment that each port connects, transmit a signaling and a monitoring message that comprises the unique sign of described connected equipment in response to the appearance first time of step (b);

(h) at least on the position in this telephone system, by port position and the described uniquely identified record that described message channel produces and the equipment that keeps being connected with each described port is associated;

(j) in response to the appearance of step (c), if and described unique identification is a record in the step (h), write down the port position of a moment, this moment port position promptly be described equipment be connected again, thereby described equipment any port according to its residing actual connection situation in this telephone system and in this telephone system can be settled on one's own initiative again.

5, according to the method for settling an equipment again that claim 4 limited, wherein the record in step (h) also comprises the characteristic, feature of described equipment and at last by the call state of signaling, described method is characterised in that also and comprises the following steps:

(k) message channel that is associated by described port, and if described call state when being the described call state that effectively restarts, the described equipment of settling again given with described characteristic, feature and the state load shedding of being called out by signaling at last;

Therefore, this equipment can be placed in does not again need to change significantly any described characteristic, feature and call state.

6, according to the method for settling an equipment again that claim 5 limited, it is characterized in that actual the reconnecting that step (k) is located in response to described equipment and being called in the scheduled period that is connected of cutting off with one of described port, at one of described port.

7, according to the process of claim 1 wherein that in a port of described telephone system, an equipment can be by another equipment replacement, described method is characterised in that further comprising the steps of:

(m) at the equipment place that each port connects, in response to the appearance first time of step (b), transmission comprises a sign and to a kind of predefined type of the described equipment that is connected a unique sign unique to the equipment of described connection;

(n) at least on a position of described telephone system, maintenance can be connected the absent feature of a plurality of predetermined type of equipment of this telephone system port and the record of characteristic;

(o) at least on a position of described telephone system, by port position, feature, characteristic, described unique identification and the described type identification that described message channel produces and the equipment that keeps being connected with each described port is associated;

(p) in response to the appearance of step (m), and if during the sign that described unique identification is different from any one port is associated, carry out one of the following step:

(1) if described type identification is consistent with existing type identification in the middle record of step (o), the equipment of then described characteristic and feature load shedding being given described moment port being connected, and in step (o), described uniquely identified record changed into consistent with the unique identification of the equipment of described moment port connection;

(2) if existing type identification is inconsistent in writing down in described type identification and the step (o), then will remain in the step (n), and corresponding to described moment the equipment that connects of port the type of type identification lack degree feature and characteristic, and the unique identification and the type identification of the equipment that port is connected when step (o) is changed into the record of described unique identification and type identification with described moment are consistent;

Therefore, the equipment that port connects in described telephone system can be by other equipment replacements, and automatically operate.

8, a kind of telephone system, be used between described a plurality of ports, providing the digital signal communication path for the station equipment that connects this system by a switch and a communication path that connects this switch and a plurality of ports, wherein this switching device can be worked under a central processing unit control, each described station equipment has the keying operation that starts in response to the user and removes to control the processing unit of the function of described station equipment in response to the message that receives from central processing unit

Described telephone system is characterised in that and comprises:

The synchronous communication media is used for providing a bi-directional communication channel and a message channel at each port at least,

The synchronous exchange device is used in response to control signal in selected a pair of two-way channel transinformation;

Described central processing unit can be used for identification message channel termly, from these channels, can receive a message from one of described processing unit, and can be used for producing one of described control signal and at least one address in response to a message that receives and stipulating a message channel, for this message channel, specify a message that is used for a corresponding processing unit of described processing unit; With

An interface arrangement, be used to detect the device that request sends, it is in response to first prearranged signal characteristic in one of message channel of being discerned, thereby solicits and receive described message and by the indication of central processor unit, with the message transfers of appointment in message channel.

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