CN105304997B - A kind of millimeter wave encapsulating structure compensated to low cost low-loss band - Google Patents

Abstract

The invention discloses a low-cost and low-loss ground compensation millimeter-wave package structure. The package structure includes two parts: a signal line compensation network and a ground line resonance compensation network. The signal line uses the L‑C‑L T-type compensation network, and the ground line uses the LC series resonance compensation network. The above two compensation networks can be independently designed, which reduces the complexity of the package structure design and greatly reduces the design time. By grooving the PCB and controlling the depth of the groove, the chip can be embedded in the PCB, so that the surface height of the chip and the PCB is the same, the length of the bonding wire is reduced, the bandwidth of the package is increased, and the loss is reduced. Separate the ground on both sides of the PCB of the package structure to reduce the ground return path and reduce external interference. A method of pre-widening the microstrip line is used to reduce the performance impact caused by the actual processing line width error. In addition, the multi-layer stack structure adopted in the present invention provides the selection of multi-layer PCB wiring, which facilitates the extraction of the DC signal of the chip.

Description

A low-cost and low-loss strip-ground compensation millimeter-wave package structure

technical field

The invention relates to a millimeter wave circuit packaging structure, and belongs to the technical field of millimeter wave packaging.

Background technique

With the rapid development of mobile communication, satellite communication and other aspects, the requirements for the system communication rate are getting higher and higher. Due to the extremely abundant spectrum resources in the millimeter-wave frequency band, millimeter-wave communication is becoming more and more important. The most important thing in mmWave systems is the RF front end, which includes mmWave transceivers and antennas. The modules inside the millimeter wave transceiver or the transceiver and the antenna need to be connected in some way. As a simple and low-cost interconnection scheme, bond wire packaging is widely used. In the application of the millimeter wave frequency band, the bonding wire is equivalent to a series inductance, which has a great influence on the performance of the system. In most designs, the chips are placed on the surface of the printed circuit board (PCB), which usually results in very long bond wires. In terms of circuit effect, this is equivalent to introducing a relatively large inductance at the output or input of the circuit, resulting in impedance mismatch, worse return loss, increased circuit loss, and ultimately affect system performance. Most of the previous packaging of millimeter-wave circuits was based on multi-stage filters. In the actual design process, because there are many parameters to be optimized, it usually takes a lot of time to simulate. Moreover, the previous package mainly completes the compensation for the signal line, and rarely does not involve the compensation for the ground line. In terms of circuit performance, this can lead to a degradation of the overall circuit performance. In addition, most of the previous packages did not consider PCB processing errors in the design process, which would lead to inconsistency between the actual product performance and simulation.

SUMMARY OF THE INVENTION

Purpose of the invention: In view of the above shortcomings of the prior art, the present invention proposes a low-cost and low-loss ground compensation millimeter-wave package structure, which can increase the bandwidth of the package structure, reduce insertion loss, reduce external interference, and reduce the impact caused by PCB processing. The performance impact caused by the error. In addition, the invention can effectively speed up the design time.

Technical solution: a low-cost and low-loss ground-compensated millimeter-wave package structure, using a PCB laminate structure, the fourth layer of metal and the third layer of metal as the main body of the package structure, the fourth layer of metal includes a signal line compensation network Resonance compensation network with the ground wire; the third layer of metal is used as the ground layer, which is the reference ground for the entire PCB board, and the ground on both sides of the third layer of metal should be separated; the second layer of metal and the first layer of metal distribute DC and ground paths Line; wherein, the chip needs to be embedded in the groove opened by the PCB, so as to ensure that the height of the chip surface is consistent with the height of the PCB surface. By realizing that the chip surface and the PCB surface are at the same height, the length of the bonding wire can be reduced, the bandwidth of the package structure can be increased, and the loss can be reduced.

The signal line compensation network is composed of binding line inductance, microstrip line parallel capacitor, and microstrip line inductance, forming an L-C-L compensation network; finally, the compensation network is drawn out through a microstrip line with a characteristic impedance of 50 ohms.

The ground wire resonance compensation network is composed of two parts: a bound wire inductance and a microstrip wire capacitor, forming an LC series resonance network.

Splitting the ground on both sides of the PCB reduces the return path of the PCB ground in the package structure and reduces external interference.

The microstrip lines in the PCB are pre-widened to reduce the influence of process errors.

The invention includes two parts: a signal line compensation network and a ground line resonance compensation network. The signal line compensation network consists of three parts: the bonding line connected with the chip is used as a series inductance, the wider microstrip line connected with the bonding line is used as a parallel-to-ground capacitance, and the thinner microstrip line is used as a series inductance; The three parts of , together form an L-C-L compensation network; the compensation network is led out through a microstrip line with a characteristic impedance of 50 ohms. The ground wire resonance compensation network consists of two parts: the bonding wire connected to the chip serves as a series inductance, and the microstrip line connected to the bonding wire serves as a series ground capacitance; the above two parts together form an LC series resonant network.

The two compensation networks can be designed independently, which greatly reduces the complexity of the package structure design and reduces the design time. In the implementation process, in order to increase the bandwidth of the package and thereby reduce the loss, it is necessary to reduce the length of the bonding wire. For this reason, in the stacked structure of the package, the chip is embedded in the PCB by grooving the PCB, so that the surface of the chip and the surface of the PCB are at the same height. In order to reduce the ground return path and reduce external interference, the ground connected to both sides of the chip is split during the PCB design process. In order to reduce the error brought by the actual processing, in the PCB design process, the microstrip line in the package is pre-widened.

Beneficial effects:

1. The signal line compensation network of the present invention is composed of a series-connected bonding line inductance, a microstrip line parallel capacitor, and a series-connected microstrip line inductance, forming an L-C-L T-type compensation network, improving insertion loss and bandwidth performance, and reducing design complexity. Spend;

2. The ground wire resonance compensation network is composed of a series bonding wire inductance and a series microstrip line capacitor, which resonate in series at the operating frequency;

3. The above two compensation networks can be independently designed to reduce the complexity of the design and reduce the design time;

4. In the laminated structure of the package, the chip is embedded in the PCB by grooving the PCB, so that the surface of the chip and the surface of the PCB are at the same height, the length of the bonding wire is reduced, the bandwidth of the package is increased, and the loss is reduced;

4. In the process of PCB design, split the ground connected to both sides of the chip, thereby reducing the ground return path and reducing external interference;

5. In the process of PCB design, widen the microstrip line in the package in advance, thereby reducing the influence of errors caused by actual processing.

Description of drawings

Fig. 1 is the package structure diagram of the present invention;

Fig. 2 is the simulation diagram of the encapsulation structure simulation return loss of the present invention;

Fig. 3 is the simulation diagram of the package structure simulation insertion loss of the present invention;

FIG. 4 is a schematic diagram of the PCB processing error of the present invention.

Detailed ways

The present invention will be further explained below in conjunction with the accompanying drawings.

As shown in FIG. 1 , the package structure of the present invention is fabricated on a multi-layer circuit board composed of three layers of dielectrics and four layers of metals. The fourth layer of metal is used as the package compensation structure layer, the third layer of metal is used as the ground, and the second and first layers of metal are used as the chip DC path. In order to increase the accuracy of the design model, the package structure is designed as a back-to-back structure, that is, the chip embedded in the PCB is in the middle. The two sides of the chip are composed of the signal line compensation network and the ground line resonance compensation network. The characteristic impedance on both sides is 50 ohm transmission line. On the metal surface of the fourth layer, for the signal line in the middle, a L-C-L T-shaped signal line compensation network is formed by connecting the line inductance in series, the parallel capacitance of the microstrip line and the inductance of the microstrip line in series. For the ground wire (distributed on both sides of the middle signal line), we have implemented a ground wire resonance compensation network. It consists of a bond wire inductor in series and a wider microstrip line (as a series capacitor to ground). The two compensation networks can be independently designed to reduce the variables that need to be optimized and shorten the design time. The chip in the package structure is a silicon-based CPW wire chip with a characteristic impedance of 50 ohms. By grooving the PCB, the chip is embedded in the PCB, so that the surface of the chip and the surface of the PCB are at the same height, and the length of the bonding wire is reduced. In the design, by splitting the ground on both sides of the chip, the ground return path can be reduced and external interference can be reduced.

Figure 2 and Figure 3 show the S-parameter simulation results of the package structure, respectively. Figure 2 is the result of its return loss, its -10dB bandwidth is 45GHz-68.5GHz. For a center frequency of 60GHz, the relative bandwidth is 39.2%. Figure 3 shows the simulation results of insertion loss, which is relatively small in the entire bandwidth. At 60GHz, the loss of the package interconnect structure itself is only about 0.4dB. The above results demonstrate the beneficial effects of the present invention.

Figure 4 is a schematic diagram of the cut surface of the actual PCB after processing, where W2 is the width of the microstrip line at the time of design. However, in actual PCB processing, the rectangular microstrip line eventually becomes a trapezoid because of the PCB processing process. The width of the microstrip line is reduced to W1, so the designed microstrip line needs to be widened in advance. That is, according to the process characteristics, a certain amount of compensation width is added to each side of the microstrip line.

Claims (2)

1. the millimeter wave encapsulating structure compensated to a kind of low cost low-loss band, which is characterized in that using the stepped construction of PCB, Four layers of metal are arranged from bottom to top, and first layer medium, second layer medium and third layer medium are interspersed between four layers of metal, will 4th layer of metal and third layer metal include signal wire compensation network and ground wire on the 4th layer of metal as encapsulating structure main body Resonance compensation network；Third layer metal is the reference ground on entire pcb board as stratum, and third layer metal is divided into the two of separation Formation, the cabling in the chip distribution direct current cabling of second layer metal, on first layer metal distribution ground；Wherein, it is opened in PCB Equipped with slot, the chip is by being embedded into the slot that PCB is opened up, so that the height of chip surface is consistent with PCB surface height；Institute Signal wire compensation network is stated to consist of three parts: the binding line being connect with chip be connected as series inductance, with binding line compared with Wide microstrip line is as direct-to-ground capacitance in parallel, thinner microstrip line as series inductance；Above-mentioned three parts collectively constitute a L- The compensation network of C-L；The compensation network is drawn by the microstrip line that characteristic impedance is 50 ohm；Ground wire resonance compensation network is by two Part forms: the binding line connecting with chip is as series inductance, the microstrip line being connected with binding line as concatenated electric over the ground Hold；Above-mentioned two parts collectively constitute a LC series resonant network.

2. the millimeter wave encapsulating structure compensated to low cost low-loss band according to claim 1, which is characterized in that in advance Widen the wider microstrip line being connected with binding line, thinner microstrip line, 50 ohm of the microstrip line in the PCB, is added with reducing Work error influences.