CN105304606B - Electronic device with two-plane type inductor - Google Patents
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Abstract
本发明公开了一种电子装置包含一第一平面式电感及一第二平面式电感。该第一平面式电感至少包含相连接的一第一环状构造与一第二环状构造,分别产生具一第一方向的一第一磁场与具一第二方向的一第二磁场,该第一方向与该第二方向不同。该第二平面式电感至少包含相连接的一第三环状构造与一第四环状构造,分别产生具一第三方向的一第三磁场与具一第四方向的一第四磁场,该第三方向与该第四方向不同。其中该第一环状构造与该第三环状构造的至少一部分重叠并形成一第一重叠区域,与该第二环状构造与该第四环状构造的至少一部分重叠并形成一第二重叠区域。本发明能降低芯片大小、节省硬件成本。
The present invention discloses an electronic device including a first planar inductor and a second planar inductor. The first planar inductor at least includes a first annular structure and a second annular structure connected to each other, respectively generating a first magnetic field with a first direction and a second magnetic field with a second direction, the first direction being different from the second direction. The second planar inductor at least includes a third annular structure and a fourth annular structure connected to each other, respectively generating a third magnetic field with a third direction and a fourth magnetic field with a fourth direction, the third direction being different from the fourth direction. The first annular structure overlaps with at least a portion of the third annular structure to form a first overlapping area, and overlaps with at least a portion of the second annular structure and the fourth annular structure to form a second overlapping area. The present invention can reduce chip size and save hardware costs.
Description
技术领域technical field
本发明所揭露的实施例涉及一种电子装置,尤指一种具有一第一平面式电感以及一第二平面式电感,且彼此互相局部重叠的电子装置。The embodiments disclosed in the present invention relate to an electronic device, especially an electronic device having a first planar inductor and a second planar inductor partially overlapping each other.
背景技术Background technique
电感是电路系统中常见的无源元件,可用以滤波、阻流以及储存能量等等。举例来说,在直流-直流转换器中会使用电感来储存能量,且所能够储存的能量大小和电感值成正比,为了满足系统所需,所需要的电感值通常较大。又例如,可以使用两个电感互相耦合以形成变压器(transformer)。Inductors are common passive components in circuit systems that can be used for filtering, blocking current, storing energy, and more. For example, an inductor is used to store energy in a DC-DC converter, and the amount of stored energy is proportional to the value of the inductor. In order to meet the needs of the system, the required value of the inductor is usually larger. For another example, two inductors can be coupled to each other to form a transformer.
不过,在集成电路中电感所占用的面积相较于其它元件要大的多,因此,有必要寻找一种新的电感元件结构来降低实作电感时所需要的面积,也就是提高电感元件单位面积所贡献的电感值。However, the area occupied by the inductor in the integrated circuit is much larger than that of other components. Therefore, it is necessary to find a new structure of the inductor to reduce the area required for the implementation of the inductor, that is, to increase the unit area of the inductor. The inductance value contributed by the area.
发明内容Contents of the invention
根据本发明的实施例,揭露一种具有一第一平面式电感以及一第二平面式电感,且彼此互相局部重叠的电子装置以解决上述问题。According to an embodiment of the present invention, an electronic device having a first planar inductor and a second planar inductor partially overlapping each other is disclosed to solve the above problems.
依据本发明一第一实施例,揭露一种电子装置,包含有一第一平面式电感以及一第二平面式电感。其中该第一平面式电感至少包含相连接的一第一环状构造与一第二环状构造,分别用以产生具有一第一方向的一第一磁场与具有一第二方向的一第二磁场,其中该第一方向与该第二方向的方向不同。该第二平面式电感至少包含相连接的一第三环状构造与一第四环状构造,分别用以产生具有一第三方向的的一第三磁场与具有一第四方向的一第四磁场,其中该第三方向与该第四方向的方向不同。其中该第一环状构造与该第三环状构造的至少一部分重叠并形成一第一重叠区域,与该第二环状构造与该第四环状构造的至少一部分重叠并形成一第二重叠区域。According to a first embodiment of the present invention, an electronic device is disclosed, including a first planar inductor and a second planar inductor. Wherein the first planar inductor at least includes a first ring structure and a second ring structure connected to generate a first magnetic field with a first direction and a second magnetic field with a second direction respectively. A magnetic field, wherein the first direction is different from the second direction. The second planar inductor at least includes a third ring structure and a fourth ring structure connected to generate a third magnetic field with a third direction and a fourth magnetic field with a fourth direction, respectively. A magnetic field, wherein the third direction is different from the fourth direction. Wherein the first annular structure overlaps at least a part of the third annular structure to form a first overlapping region, and at least a part of the second annular structure overlaps with the fourth annular structure to form a second overlapping area.
本发明的其中一个优点系可以降低实作电感时所需要的芯片面积,也就是提高电感元件单位面积所贡献的电感值,进而降低硬件成本。One of the advantages of the present invention is that it can reduce the chip area required for implementing the inductor, that is, increase the inductance value contributed by the unit area of the inductor element, thereby reducing the hardware cost.
附图说明Description of drawings
图1为本发明电子装置的一第一实施例的示意图。FIG. 1 is a schematic diagram of a first embodiment of the electronic device of the present invention.
图2A为本发明电子装置的一第二实施例的示意图。FIG. 2A is a schematic diagram of a second embodiment of the electronic device of the present invention.
图2B为本发明电子装置的一第三实施例的示意图。FIG. 2B is a schematic diagram of a third embodiment of the electronic device of the present invention.
图2C为本发明电子装置的一第四实施例的示意图。FIG. 2C is a schematic diagram of a fourth embodiment of the electronic device of the present invention.
图2D为本发明电子装置的一第五实施例的示意图。FIG. 2D is a schematic diagram of a fifth embodiment of the electronic device of the present invention.
图3A为本发明电子装置的一第六实施例的示意图。FIG. 3A is a schematic diagram of a sixth embodiment of the electronic device of the present invention.
图3B为本发明电子装置的一第七实施例的示意图。FIG. 3B is a schematic diagram of a seventh embodiment of the electronic device of the present invention.
图4为针对使用不对称平面式电感组成的电子装置分别在不同重叠区域大小的情况下的耦合系数值的频率响应图。FIG. 4 is a frequency response diagram of coupling coefficient values of electronic devices composed of asymmetrical planar inductors with different overlapping area sizes.
图5为本发明电子装置的一第八实施例的示意图。FIG. 5 is a schematic diagram of an eighth embodiment of the electronic device of the present invention.
图6为8字型和非8字型平面电感的电感值的频率响应图。Fig. 6 is a frequency response diagram of inductance values of 8-shaped and non-8-shaped planar inductors.
其中,附图标记说明如下:Among them, the reference signs are explained as follows:
102、104、202A、204A、202B、204B、202C、102, 104, 202A, 204A, 202B, 204B, 202C,
204C、202D、204D、302A、304A、302B、304B 平面式电感204C, 202D, 204D, 302A, 304A, 302B, 304B planar inductors
106、206A、206B、206C、206D、306A、306B、500 电子装置106, 206A, 206B, 206C, 206D, 306A, 306B, 500 Electronics
1022、1024、1042、1044、2022A、2024A、1022, 1024, 1042, 1044, 2022A, 2024A,
2042A、2044A、2022B、2024B、2042B、2044B 环状构造2042A, 2044A, 2022B, 2024B, 2042B, 2044B ring configuration
502、504 部分元件502, 504 some components
具体实施方式Detailed ways
图1为本发明电子装置的一第一实施例的示意图。其中一电子装置106由一平面式电感102以及一平面式电感104所构成的一电感。平面式电感102位于一第一导体层,并包含有一第一环状构造1022与一第二环状构造1024并分别产生具有一第一方向的一第一磁场与具有一第二方向的一第二磁场,例如该第一方向为垂直于第一环状构造1022所形成的一平面并且由该平面的下方往上;而该第二方向为垂直于第二环状构造1024所形成的一平面并且由该平面的上方往下。平面式电感102具有一电感值H102。另一方面,平面式电感104位于不同于一第一导体层的一第二导体层,并包含有一第一环状构造1042与一第二环状构造1044并分别产生具有一第三方向的一第三磁场与具有一第四方向的一第四磁场,例如该第三方向为垂直于第一环状构造1042所形成的一平面并且由该平面的下方往上;而该第四方向为垂直于第二环状构造1044所形成的一平面并且由该平面的上方往下。其中该第一方向与该第三方向的方向相同,该第二方向与该第四方向的方向相同。其中,第一环状构造1022的开口朝图面右方,该第二环状构造1024的开口朝图面上方,第三环状构造1042的开口朝图面右方,该第四环状构造1044的开口朝图面下方。该平面式电感104具有一电感值H104。本发明使用平面式电感102以及平面式电感104彼此耦接并堆叠来组合成电子装置(电感)106。其中,第一环状构造1022的端点与第三环状构造1042的端点可以穿孔(VIA)连接以使平面式电感102以及平面式电感104共同形成一电感(亦即电子装置106)。平面式电感102的第一环状构造1022与第二环状构造1024所形成的平面区域和平面式电感104的第一环状构造1042与第二环状构造1044所形成的平面区域完全重叠,以尽量的增加电子装置(电感)106的一电感值H106。使电感值H106分别大于电感值H102以及电感值H104,以达到增加单位面积的电感值的目的。具体来说,依此方法绕线来结合二个类8字型平面电感所得到的架构,能够达到比公知的螺旋架构更大的单位面积电感值。此外,由于第一环状构造1022与第三环状构造1042的磁场方向和第二环状构造1024与第四环状构造1044的磁场方向相反,因此可以降低电磁干扰(EMI)。FIG. 1 is a schematic diagram of a first embodiment of the electronic device of the present invention. One of the electronic devices 106 is an inductor formed by a planar inductor 102 and a planar inductor 104 . The planar inductor 102 is located on a first conductor layer, and includes a first ring structure 1022 and a second ring structure 1024 to generate a first magnetic field with a first direction and a first magnetic field with a second direction respectively. Two magnetic fields, for example, the first direction is perpendicular to a plane formed by the first annular structure 1022 and goes upward from the bottom of the plane; and the second direction is perpendicular to a plane formed by the second annular structure 1024 And from the top of the plane down. The planar inductor 102 has an inductance H 102 . On the other hand, the planar inductor 104 is located on a second conductor layer different from a first conductor layer, and includes a first ring structure 1042 and a second ring structure 1044 and respectively generates a ring structure with a third direction. The third magnetic field and a fourth magnetic field with a fourth direction, for example, the third direction is perpendicular to a plane formed by the first annular structure 1042 and is upward from the bottom of the plane; and the fourth direction is vertical A plane formed by the second ring structure 1044 and downwards from above the plane. Wherein the first direction is the same as the third direction, and the second direction is the same as the fourth direction. Wherein, the opening of the first annular structure 1022 faces to the right of the drawing, the opening of the second annular structure 1024 faces upward of the drawing, the opening of the third annular structure 1042 faces to the right of the drawing, and the fourth annular structure The opening of 1044 faces downward in the drawing. The planar inductor 104 has an inductance H 104 . In the present invention, the planar inductor 102 and the planar inductor 104 are coupled and stacked to form an electronic device (inductor) 106 . Wherein, the terminal of the first ring structure 1022 and the terminal of the third ring structure 1042 can be connected through a via (VIA) so that the planar inductor 102 and the planar inductor 104 together form an inductor (ie, the electronic device 106 ). The plane area formed by the first ring structure 1022 and the second ring structure 1024 of the planar inductor 102 and the plane area formed by the first ring structure 1042 and the second ring structure 1044 of the planar inductor 104 completely overlap, To increase an inductance H 106 of the electronic device (inductor) 106 as much as possible. The inductance value H 106 is made larger than the inductance value H 102 and the inductance value H 104 respectively, so as to increase the inductance value per unit area. Specifically, the structure obtained by combining two 8-like planar inductors by winding wires in this way can achieve a larger inductance value per unit area than the known spiral structure. In addition, since the magnetic field directions of the first ring structure 1022 and the third ring structure 1042 are opposite to those of the second ring structure 1024 and the fourth ring structure 1044 , electromagnetic interference (EMI) can be reduced.
图2A为本发明电子装置的一第二实施例的示意图。其中一电子装置206A由一平面式电感202A以及一平面式电感204A所构成的一变压器。平面式电感202A位于一第一导体层,并包含有一第一环状构造2022A与一第二环状构造2024A并分别产生不同方向的一第一磁场与一第二磁场,例如该第一磁场方向为垂直于第一环状构造2022A所形成的一平面并且由该平面的下方往上;而该第二磁场方向为垂直于第二环状构造2024A所形成的一平面并且由该平面的上方往下。平面式电感202A具有一电感值H202A。另一方面,平面式电感204A位于不同于一第一导体层的一第二导体层,并包含有一第一环状构造2042A与一第二环状构造2044A并分别产生不同方向的一第一磁场与一第二磁场,例如该第一磁场方向为垂直于第一环状构造2042A所形成的一平面并且由该平面的下方往上;而该第二磁场方向为垂直于第二环状构造2044A所形成的一平面并且由该平面的上方往下。平面式电感204A具有一电感值H204A。本发明使用平面式电感202A以及平面式电感204A彼此堆叠来组合成电子装置(变压器)206A。其中耦合系数值K206A的大小平面式电感202A的第一环状构造2022A与第二环状构造2024A所形成的平面区域和平面式电感204A的第一环状构造2042A与第二环状构造2044A所形成的平面区域之间的重叠区域的大小来决定。实务上,第一环状构造2022A与第二环状构造2024A并非限定于实作在同一晶粒(die)上。在某些实施例中,可以使用三维堆叠构装(3D Stack Packaging),也就是第一环状构造2022A与第二环状构造2024A可以分别位于上晶粒及下晶粒(或相反的设计),中间以介电质(under-fill)材料填充。其它实施例亦可以有类似的设计。FIG. 2A is a schematic diagram of a second embodiment of the electronic device of the present invention. One of the electronic devices 206A is a transformer formed by a planar inductor 202A and a planar inductor 204A. The planar inductor 202A is located on a first conductor layer, and includes a first ring structure 2022A and a second ring structure 2024A and generates a first magnetic field and a second magnetic field in different directions, for example, the direction of the first magnetic field is perpendicular to a plane formed by the first annular structure 2022A and goes upward from the bottom of the plane; and the second magnetic field direction is perpendicular to a plane formed by the second annular structure 2024A and goes upward from the top of the plane. Down. The planar inductor 202A has an inductance H 202A . On the other hand, the planar inductor 204A is located in a second conductor layer different from the first conductor layer, and includes a first ring structure 2042A and a second ring structure 2044A and generates a first magnetic field in different directions respectively. and a second magnetic field, for example, the first magnetic field direction is perpendicular to a plane formed by the first annular structure 2042A and goes upward from the bottom of the plane; and the second magnetic field direction is perpendicular to the second annular structure 2044A A plane is formed and goes down from above the plane. The planar inductor 204A has an inductance H204A. In the present invention, the planar inductor 202A and the planar inductor 204A are stacked to form an electronic device (transformer) 206A. The first annular structure 2022A and the second annular structure 2024A of the planar inductor 202A with the coupling coefficient value K 206A form the planar area and the first annular structure 2042A and the second annular structure 2044A of the planar inductor 204A The size of the overlapping area between the formed planar areas is determined. In practice, the first annular structure 2022A and the second annular structure 2024A are not limited to be implemented on the same die. In some embodiments, 3D stack packaging can be used, that is, the first ring structure 2022A and the second ring structure 2024A can be respectively located on the upper die and the lower die (or the opposite design). , and the middle is filled with a dielectric (under-fill) material. Other embodiments may also have similar designs.
图2B为本发明电子装置的一第三实施例的示意图。其中一电子装置206B由一平面式电感202B以及一平面式电感204B所构成的一变压器。平面式电感202B包含有位于一第一导体层的一第一环状构造2022B与位于一第二导体层的一第二环状构造2024B,并分别产生具有一第一方向的一第一磁场与具有一第二方向一第二磁场,例如该第一方向为垂直于第一环状构造2022B所形成的一平面并且由该平面的下方往上;而该第二方向为垂直于第二环状构造2024B所形成的一平面并且由该平面的上方往下。平面式电感202B具有一电感值H202B。另一方面,平面式电感204B包含有位于该第二导体层的一第一环状构造2042B与位于该第一导体层的一第二环状构造2044B,并分别产生具有一第三方向的一第三磁场与具有一第四方向的一第四磁场,例如该第一方向为垂直于第一环状构造2042B所形成的一平面并且由该平面的下方往上;而该第二方向为垂直于第二环状构造2044B所形成的一平面并且由该平面的上方往下。平面式电感204B具有一电感值H204B。本发明使用平面式电感202B以及平面式电感204B彼此堆叠来组合成电子装置(变压器)206B,其中平面式电感202B的第一环状构造2022B与平面式电感204B的第一环状构造2042B重叠;平面式电感202B的第二环状构造2024B与平面式电感204B的第二环状构造2044B重叠,因此虽然平面式电感202B与平面式电感204B均使用两层导体层,但组合成的电子装置(变压器)206B总共仍只需两层导体层。其中耦合系数值K206B的大小由平面式电感202B的第一环状构造2022B与第二环状构造2024B所形成的平面区域和平面式电感204B的第一环状构造2042B与第二环状构造2044B所形成的平面区域之间的重叠区域的大小来决定。FIG. 2B is a schematic diagram of a third embodiment of the electronic device of the present invention. One of the electronic devices 206B is a transformer formed by a planar inductor 202B and a planar inductor 204B. The planar inductor 202B includes a first ring structure 2022B located on a first conductor layer and a second ring structure 2024B located on a second conductor layer, and generates a first magnetic field with a first direction and a second ring structure 2024B respectively. There is a second magnetic field in a second direction, for example, the first direction is perpendicular to a plane formed by the first annular structure 2022B and goes upward from the bottom of the plane; and the second direction is perpendicular to the second annular structure Construction 2024B forms a plane and descends from above the plane. The planar inductor 202B has an inductance H202B. On the other hand, the planar inductor 204B includes a first ring structure 2042B located on the second conductor layer and a second ring structure 2044B located on the first conductor layer, and respectively generate a ring structure with a third direction. The third magnetic field and a fourth magnetic field with a fourth direction, for example, the first direction is perpendicular to a plane formed by the first annular structure 2042B and goes upward from the bottom of the plane; and the second direction is vertical A plane is formed on the second ring structure 2044B and goes down from above the plane. The planar inductor 204B has an inductance H204B. In the present invention, the planar inductor 202B and the planar inductor 204B are stacked to form an electronic device (transformer) 206B, wherein the first annular structure 2022B of the planar inductor 202B overlaps with the first annular structure 2042B of the planar inductor 204B; The second annular structure 2024B of the planar inductor 202B overlaps with the second annular structure 2044B of the planar inductor 204B, so although the planar inductor 202B and the planar inductor 204B both use two layers of conductor layers, the combined electronic device ( Transformer) 206B still requires only two conductor layers in total. Wherein the size of the coupling coefficient value K 206B is formed by the planar area formed by the first ring structure 2022B and the second ring structure 2024B of the planar inductor 202B and the first ring structure 2042B and the second ring structure of the planar inductor 204B The size of the overlapping area between the plane areas formed by 2044B is determined.
图2C为本发明电子装置的一第四实施例的示意图。其中一电子装置206C是由一平面式电感202C以及一平面式电感204C所构成的一变压器。电子装置206C和电子装置206A相似,差别仅在于由于重叠区域变大,电子装置206C的一耦合系数值K206C的大小会大于电子装置206A的耦合系数值K206A。此外电子装置206C较电子装置206A多使用了一层导体层用作绕线使用。FIG. 2C is a schematic diagram of a fourth embodiment of the electronic device of the present invention. One of the electronic devices 206C is a transformer formed by a planar inductor 202C and a planar inductor 204C. The electronic device 206C is similar to the electronic device 206A, the only difference is that a coupling coefficient value K 206C of the electronic device 206C is larger than a coupling coefficient value K 206A of the electronic device 206A due to the larger overlapping area. In addition, the electronic device 206C uses one more conductor layer for winding than the electronic device 206A.
图2D为本发明电子装置的一第五实施例的示意图。其中一电子装置206D是由一平面式电感202D以及一平面式电感204D所构成的一变压器。电子装置206D和电子装置206B相似,差别仅在于由于重叠区域变大,电子装置206D的一耦合系数值K206D的大小会大于电子装置206B的耦合系数值K206B。此外电子装置206D较电子装置206B多使用了一层导体层用作绕线使用。FIG. 2D is a schematic diagram of a fifth embodiment of the electronic device of the present invention. One of the electronic devices 206D is a transformer formed by a planar inductor 202D and a planar inductor 204D. The electronic device 206D is similar to the electronic device 206B, the only difference is that a coupling coefficient value K206D of the electronic device 206D is greater than a coupling coefficient value K206B of the electronic device 206B due to the larger overlapping area. In addition, the electronic device 206D uses one more conductor layer for winding than the electronic device 206B.
图3A为本发明电子装置的一第六实施例的示意图。其中一电子装置306A是由一不对称平面式电感302A以及一不对称平面式电感304A所构成的一变压器。电子装置306A和电子装置206A相似,差别仅在于电子装置306A中的平面式电感302A的一第一环状构造以及一第二环状构造的环形圈数不同,使得平面式电感302A的该第一环状构造以及该第二环状构造的磁场大小不相同;而平面式电感304A亦是如此。具体来说,电子装置306A中的平面式电感302A中具有较多环形圈数的该第一环状构造部分重叠于平面式电感304A中具有较多环形圈数的该第一环状构造;而电子装置306A中的平面式电感302A中具有较少环形圈数的该第二环状构造部分重叠于平面式电感304A中具有较少环形圈数的该第二环状构造。FIG. 3A is a schematic diagram of a sixth embodiment of the electronic device of the present invention. One of the electronic devices 306A is a transformer formed by an asymmetric planar inductor 302A and an asymmetric planar inductor 304A. The electronic device 306A is similar to the electronic device 206A, the only difference being that the number of rings of a first ring structure and a second ring structure of the planar inductor 302A in the electronic device 306A are different, so that the first ring structure of the planar inductor 302A The magnitudes of the magnetic fields of the ring structure and the second ring structure are different; the same is true for the planar inductor 304A. Specifically, the first ring structure with more loops in the planar inductor 302A in the electronic device 306A partially overlaps the first loop structure with more loops in the planar inductor 304A; and The second ring structure with a smaller number of rings in the planar inductor 302A in the electronic device 306A partially overlaps the second ring structure with a smaller number of rings in the planar inductor 304A.
图3B为本发明电子装置的一第七实施例的示意图。其中一电子装置306B是由一不对称平面式电感302B以及一镜像(mirrored)不对称平面式电感304B所构成的一变压器。电子装置306B和电子装置306A相似,差别仅在于电子装置306B中的平面式电感302B中具有较多环形圈数的一第一环状构造部分重叠于平面式电感304B中具有较少环形圈数的一第一环状构造;而电子装置306B中的平面式电感302B中具有较少环形圈数的一第二环状构造部分重叠于平面式电感304B中具有较多环形圈数的一第二环状构造。如此一来,由于不对称镜像结构所造成的反相抵消作用,再加上平面式电感302B和平面式电感304B之间的位移相较于平面式电感302A和平面式电感304A之间的位移来的更大,依据安培右手定则(thumbrule),此时反相抵消作用加剧。因此,电子装置(变压器)306B的耦合系数值K306B的大小较电子装置(变压器)306A来的更低。FIG. 3B is a schematic diagram of a seventh embodiment of the electronic device of the present invention. One of the electronic devices 306B is a transformer formed by an asymmetric planar inductor 302B and a mirrored asymmetric planar inductor 304B. The electronic device 306B is similar to the electronic device 306A, and the only difference is that a first ring structure with a larger number of rings in the planar inductor 302B in the electronic device 306B partially overlaps with a first ring structure with a smaller number of rings in the planar inductor 304B. A first ring structure; and a second ring structure with a smaller number of ring turns in the planar inductor 302B in the electronic device 306B partially overlaps a second ring with a larger number of ring turns in the planar inductor 304B shaped structure. In this way, due to the anti-phase cancellation effect caused by the asymmetric mirror structure, plus the displacement between the planar inductor 302B and the planar inductor 304B is larger than the displacement between the planar inductor 302A and the planar inductor 304A is larger, according to Ampere's right-hand rule (thumbrule), at this time the anti-phase cancellation effect is intensified. Therefore, the coupling coefficient value K 306B of the electronic device (transformer) 306B is lower than that of the electronic device (transformer) 306A.
图4为针对使用不对称平面式电感组成的电子装置分别在不同重叠区域大小的情况下的耦合系数值的频率响应图。其中一曲线C1代表由一不对称平面式电感(8字型平面电感架构且线圈数为2圈:1圈)以及另一不对称平面式电感(8字型平面电感架构且线圈数为2圈:1圈)彼此堆叠所构成的一电子装置(变压器)(类似图3A中的配置方式)的耦合系数值的频率响应,其中该不对称平面式电感以及该另一不对称平面式电感的重叠程度为最大(完全重叠或是几乎完全重叠);一曲线C2代表由一不对称平面式电感(8字型平面电感架构且线圈数为2圈:1圈)以及另一镜像不对称平面式电感(8字型平面电感架构且线圈数为1圈:2圈)彼此堆叠所构成的一电子装置(变压器)(类似图3B中的配置方式)的耦合系数值的频率响应,其中该不对称平面式电感以及该另一不对称平面式电感的重叠程度为最大(完全重叠或是几乎完全重叠)。由曲线C1和C2可以得知,在低频(大约在13GHz以下)时,在完全重叠或是几乎完全重叠的程度下,利用一不对称平面式电感堆叠另一镜像不对称平面式电感可以实质降低耦合值,因此在目标耦合值较低的情况下,可以用较小的面积达到同样的低耦合值效果。另外,以曲线C1的配置,将重叠程度分别降低为75%以及50%,可以得到一曲线C3以及一曲线C5;以曲线C2的配置,将重叠程度分别降低为75%以及50%,可以得到一曲线C4以及一曲线C6。由图4中的曲线C3、C4和C5、C6可以得知,在低频时(约10GHz以下),在重叠程度为75%和50%的情况下,利用一不对称平面式电感堆叠另一镜像不对称平面式电感可以实质且明显地降低耦合值,因此在目标耦合值较低的情况下,可以用较小的面积达到同时放置二个电感或一变压器的目的。因此,可以利用不同的重叠程度或面积来设计实现所需的耦合系数值。FIG. 4 is a frequency response diagram of coupling coefficient values of electronic devices composed of asymmetrical planar inductors with different overlapping area sizes. One of the curves C1 represents an asymmetric planar inductor (8-shaped planar inductor structure with 2 coils: 1 coil) and another asymmetric planar inductor (8-shaped planar inductor structure with 2 coils) : 1 circle) The frequency response of the coupling coefficient value of an electronic device (transformer) (similar to the configuration in Fig. 3A) stacked on each other, wherein the overlapping of the asymmetric planar inductor and the other asymmetric planar inductor The degree is the maximum (completely overlapping or almost completely overlapping); a curve C2 represents an asymmetric planar inductor (8-shaped planar inductor structure and the number of coils is 2 turns: 1 turn) and another mirror image asymmetric planar inductor The frequency response of the coupling coefficient value of an electronic device (transformer) (similar to the configuration in Figure 3B) formed by stacking each other (figure 8 planar inductor structure and the number of coils is 1 turn: 2 turns), wherein the asymmetrical plane The degree of overlap between the planar inductor and the other asymmetrical planar inductor is maximum (complete overlap or almost complete overlap). From the curves C1 and C2, it can be seen that at low frequencies (about 13GHz or less), at the degree of complete overlap or almost complete overlap, using an asymmetric planar inductor to stack another mirrored asymmetric planar inductor can substantially reduce the Coupling value, so when the target coupling value is low, the same low coupling value effect can be achieved with a smaller area. In addition, with the configuration of curve C1, the degree of overlap is reduced to 75% and 50%, respectively, and a curve C3 and a curve C5 can be obtained; with the configuration of curve C2, the degree of overlap is respectively reduced to 75% and 50%, and it can be obtained A curve C4 and a curve C6. From the curves C3, C4, C5, and C6 in Figure 4, it can be seen that at low frequencies (below about 10GHz), in the case of overlapping degrees of 75% and 50%, an asymmetrical planar inductor is used to stack another mirror image The asymmetrical planar inductor can substantially and significantly reduce the coupling value, so when the target coupling value is low, the purpose of placing two inductors or a transformer at the same time can be achieved with a smaller area. Therefore, different overlapping degrees or areas can be used to design and achieve desired coupling coefficient values.
图5为本发明电子装置的一第八实施例的示意图。一电子装置500是一8字型平面电感,包含有位于一第一导体层的一部分元件502以及位于一第二导体层的另一部分元件504。其中部分元件502和部分元件504具有两重叠部分,即一第一交叉点P1以及一第二交叉点P2。图6为8字型和非8字型平面电感的电感值的频率响应图。在图6中,一曲线D1是图5中的8字型平面电感对应不同频率的电感值;一曲线D2是非8字型架构的平面电感对应不同频率的电感值,其和图5中的8字型平面电感具有相同面积。由图6可知,图5中的电子装置500在一定频率范围内有效地提升单位面积的电感值(I)以达到降低芯片大小、节省硬件成本的目的。FIG. 5 is a schematic diagram of an eighth embodiment of the electronic device of the present invention. An electronic device 500 is an 8-shaped planar inductor, including a part of elements 502 located on a first conductor layer and another part of elements 504 located on a second conductor layer. The part of the elements 502 and the part of the elements 504 have two overlapping portions, namely a first intersection point P1 and a second intersection point P2. Fig. 6 is a frequency response diagram of inductance values of 8-shaped and non-8-shaped planar inductors. In Fig. 6, a curve D1 is the inductance value corresponding to different frequencies of the 8-shaped planar inductance in Fig. 5; a curve D2 is the inductance value of the non-8-shaped planar inductance corresponding to different frequencies, which is the same as the 8-shaped inductance in Fig. 5 Font planar inductors have the same area. It can be seen from FIG. 6 that the electronic device 500 in FIG. 5 effectively increases the inductance value (I) per unit area within a certain frequency range to achieve the purpose of reducing chip size and saving hardware costs.
应注意的是,本发明中的平面电感的环状构造的实际形状并不局限于实施例中的平面电感的环状构造的具体型态。亦即,平面电感的环状构造可以为方形、圆形或是多边形状。另外,对于平面电感的环状构造或其绕线在不同导体层中的配置,亦不以上述实施例为限。It should be noted that the actual shape of the ring structure of the planar inductor in the present invention is not limited to the specific shape of the ring structure of the planar inductor in the embodiment. That is, the loop structure of the planar inductor can be square, circular or polygonal. In addition, the loop structure of the planar inductor or the arrangement of its windings in different conductor layers is not limited to the above-mentioned embodiments.
以上所述仅为本发明的较佳实施例,凡依本发明申请专利范围所做的均等变化与修饰,皆应属本发明的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.
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