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CN105224894A - The circuit of the type A signal that card reader sends in decoding ISO/IEC14443 agreement - Google Patents

The circuit of the type A signal that card reader sends in decoding ISO/IEC14443 agreement Download PDF

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Publication number
CN105224894A
CN105224894A CN201410229361.3A CN201410229361A CN105224894A CN 105224894 A CN105224894 A CN 105224894A CN 201410229361 A CN201410229361 A CN 201410229361A CN 105224894 A CN105224894 A CN 105224894A
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signal
type
circuit
iso
main decoder
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CN105224894B (en
Inventor
王吉健
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Shanghai Huahong Integrated Circuit Co Ltd
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Shanghai Huahong Integrated Circuit Co Ltd
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Abstract

The invention discloses the circuit of the type A signal that card reader sends in a kind of ISO/IEC14443 agreement of decoding, comprise: a main decoder circuit, for recording the high level length in the envelope signal after analog demodulator between two low levels, and the high level length between the different code words of the type A signal specified according to ISO/IEC14443 agreement is decoded; One judges Received signal strength type circuit, be connected with described main decoder circuit, for recording the clock number in the envelope signal after analog demodulator between low period, and at the end of low level, by the clock number that is recorded to compared with the threshold value of setting, when number of clocks is greater than described threshold value, provide marking signal, make described main decoder circuit ignore this low level signal.The present invention can correctly distinguish card reader send be type A signal also with type B signal, while coding type a-signal, the impact of screening type B signal.

Description

The circuit of the type A signal that card reader sends in decoding ISO/IEC14443 agreement
Technical field
The present invention relates to the circuit of the type A signal that card reader sends in a kind of decoding ISO/IEC14443 agreement of improvement.
Background technology
The signal of two types is had, point another name type A signal and type B signal in ISO/IEC14443 agreement.Wherein the waveform of type A signal is the correction Miller signal (ASK100%ModifiedMiller) of very amplitude modulation(PAM).It is according to the different corresponding 3 kinds of waveforms of code word, and be called X, Y and Z waveform, its oscillogram is see shown in Fig. 1 ~ 3.T in Fig. 1-3 represents the time that a code word continues, and W represents low duration.T with W in ISO/IEC14443 agreement according to send data rate difference have corresponding setting.
What first the coding rule decision specified in ISO/IEC14443 agreement sent must be Z waveform.The waveform of type A signal is the am signals (ASK10%) of 10.Because degree of modulation is different, during the low level of type of receipt B signal, carrier clock can be recovered from carrier wave; During the low level of type of receipt a-signal, owing to being 100% amplitude modulation(PAM), so carrier clock cannot be recovered from carrier wave.
Summary of the invention
The technical problem to be solved in the present invention is to provide the circuit of the type A signal that card reader sends in a kind of ISO/IEC14443 agreement of decoding, can correctly distinguish card reader send be type A signal also with type B signal, while coding type a-signal, the impact of screening type B signal.
For solving the problems of the technologies described above, the circuit of the type A signal that card reader sends in decoding ISO/IEC14443 agreement of the present invention, comprising:
One main decoder circuit, for recording the high level length in the envelope signal after analog demodulator between two low levels, and the high level length between the different code words of the type A signal specified according to ISO/IEC14443 agreement is decoded;
One judges Received signal strength type circuit, be connected with described main decoder circuit, for recording the clock number in the envelope signal after analog demodulator between low period, and at the end of low level, by the clock number that is recorded to compared with the threshold value of setting, when number of clocks is greater than described threshold value, provide marking signal, make described main decoder circuit ignore this low level signal.
The present invention is by the envelope signal after record analog demodulator, and the high level length between two low levels completes decoding; And by the clock number in the envelope signal after record analog demodulator between low period, distinguish that card reader sends be type A signal also with type B signal, thus to realize while coding type a-signal, the impact of screening type B signal.
The present invention is specially adapted to need while type of receipt a-signal, the occasion of the type B signal in the ISO/IEC14443 agreement that shielding card reader sends.
Accompanying drawing explanation
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Fig. 1 is the X waveform schematic diagram of the type A signal that in ISO/IEC14443 agreement, card reader sends;
Fig. 2 is the Y waveform schematic diagram of the type A signal that in ISO/IEC14443 agreement, card reader sends;
Fig. 3 is the Z waveform schematic diagram of the type A signal that in ISO/IEC14443 agreement, card reader sends;
Fig. 4 is the circuit one example structure figure of the type A signal that in decoding ISO/IEC14443 agreement, card reader sends.
Embodiment
Shown in composition graphs 4, in described decoding ISO/IEC14443 agreement, the decoding principle of the main decoder circuit of the circuit of the type A signal that card reader sends is as follows:
From Fig. 1 ~ 3, obviously can to find out after Z waveform and then X waveform, Y waveform, and between two low levels corresponding to Z waveform, the length of high level is different.Further illustrate, if having the high level less than T/2 after Z waveform, what so Z waveform was followed below is exactly X waveform; If there is the high level being greater than T/2 and being less than T after Z waveform simultaneously, what so Z waveform was followed below is exactly Z waveform; If after Z waveform, before receiving next low level, the high level of record is greater than T, and what so Z waveform was followed below is exactly Y waveform.By that analogy, waveform afterwards just can judge to draw from high level length between the waveform determined before and two low levels.
During specific implementation, by the high level length between a counter records two low levels, its count enable signal has been put when receiving the negative edge of waveform signal (i.e. envelope signal), at the rising edge place of waveform signal, judge that whether count enable signal is effective, if effectively, so just by Counter Value at that time, contrast above-mentioned decoding principle, decode according to the high level length difference between the corresponding waveform of different code word; Meanwhile counter zero setting, then start counting.
In described decoding ISO/IEC14443 agreement the type A signal that card reader sends circuit in judge that the principle of Received signal strength type circuit is as follows:
During low level due to type A signal, there is no clock; And during the low level of type B signal, have clock, so just with a counter, when low level, clock count can be used.When record to clock number be greater than a pre-set threshold value time, just can judge that current what receive is type B signal, thus provide marking signal.Here threshold value is a round values, and it is no more than the clock number of type B signal contained by between low period specified in ISO/IEC14443 agreement.
In described decoding ISO/IEC14443 agreement, the implementation method of the circuits mask type B signal of the type A signal that card reader sends is as follows:
Described main decoder circuit is after receiving the marking signal judging that Received signal strength type circuit provides, the count enable signal of reset main decoder circuit Counter, like this at the rising edge place of waveform signal, main decoder circuit will see that count enable signal is invalid, thus do not start decoding and reset action, thus the decoding of type B signal to main decoder circuit is not impacted.
The clock signal recovered from carrier wave in described clock and Fig. 4.
Above by embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.

Claims (3)

1. a circuit for the type A signal that card reader sends in ISO/IEC14443 agreement of decoding, is characterized in that, comprising:
One main decoder circuit, for recording the high level length in the envelope signal after analog demodulator between two low levels, and the high level length between the different code words of the type A signal specified according to ISO/IEC14443 agreement is decoded;
One judges Received signal strength type circuit, be connected with described main decoder circuit, for recording the clock number in the envelope signal after analog demodulator between low period, and at the end of low level, by the clock number that is recorded to compared with the threshold value of setting, when number of clocks is greater than described threshold value, provide marking signal, make described main decoder circuit ignore this low level signal.
2. circuit as claimed in claim 1, it is characterized in that, described main decoder circuit is provided with a counter, for recording the high level length between described two low levels, its count enable signal has been put when receiving the negative edge of envelope signal, at the rising edge place of envelope signal, judge that whether count enable signal is effective; If effectively, then by judging Counter Value at that time, the high level length between the waveform that the different code words of the type A signal that contrast ISO/IEC14443 agreement specifies are corresponding is decoded; Meanwhile by described counter zero setting, then start counting.
3. circuit as claimed in claim 2, is characterized in that, described main decoder circuit when receiving described marking signal, the count enable signal of the described counter that resets.
CN201410229361.3A 2014-05-28 2014-05-28 Decode the circuit of the type A signal that card reader is sent in ISO/IEC14443 agreements Active CN105224894B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105718835A (en) * 2016-01-14 2016-06-29 大唐微电子技术有限公司 Digital shaping circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103595420A (en) * 2012-08-13 2014-02-19 上海华虹集成电路有限责任公司 Decoder for decoding TYPE A signals transmitted by card reader
CN103595422A (en) * 2012-08-13 2014-02-19 上海华虹集成电路有限责任公司 Decoder for decoding TYPE A high-speed data rate signal sent by card
CN103595418A (en) * 2012-08-13 2014-02-19 上海华虹集成电路有限责任公司 Decoder for decoding TYPE A 847K data rate signal sent by card reader
CN103595421A (en) * 2012-08-13 2014-02-19 上海华虹集成电路有限责任公司 A decoder for TYPE A basic data rate signals transmitted by a decoding card

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103595420A (en) * 2012-08-13 2014-02-19 上海华虹集成电路有限责任公司 Decoder for decoding TYPE A signals transmitted by card reader
CN103595422A (en) * 2012-08-13 2014-02-19 上海华虹集成电路有限责任公司 Decoder for decoding TYPE A high-speed data rate signal sent by card
CN103595418A (en) * 2012-08-13 2014-02-19 上海华虹集成电路有限责任公司 Decoder for decoding TYPE A 847K data rate signal sent by card reader
CN103595421A (en) * 2012-08-13 2014-02-19 上海华虹集成电路有限责任公司 A decoder for TYPE A basic data rate signals transmitted by a decoding card

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105718835A (en) * 2016-01-14 2016-06-29 大唐微电子技术有限公司 Digital shaping circuit
CN105718835B (en) * 2016-01-14 2018-12-28 大唐微电子技术有限公司 A kind of number shaping circuit

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