CN105204250A - Array substrate, display device and manufacturing method for array substrate - Google Patents
Array substrate, display device and manufacturing method for array substrate Download PDFInfo
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- CN105204250A CN105204250A CN201510718288.0A CN201510718288A CN105204250A CN 105204250 A CN105204250 A CN 105204250A CN 201510718288 A CN201510718288 A CN 201510718288A CN 105204250 A CN105204250 A CN 105204250A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses an array substrate, a display device and a manufacturing method for the array substrate, belonging to the technical field of display. The array substrate comprises an effective display area and a peripheral circuit area, wherein the effective display area is provided with multiple parallel data lines; the peripheral circuit area is provided with at least two source integrated circuits and leads in one-to-one correspondence to the data lines; the data lines are connected with one source integrated circuit in at least two source integrated circuits through the corresponding leads; data lines connected with other source integrated circuits are arranged among the multiple data lines connected with the same source integrated circuit. According to the array substrate, the display device and the array substrate, the data lines connected with the other source integrated circuits are arranged among the multiple data lines connected with the same source integrated circuit, so that the multiple data lines connected with the same source integrated circuit are arranged at intervals, and only do intermittently arranged black lines appear on a display screen once one source integrated circuit has a fault, and has little affect to a user.
Description
Technical field
The present invention relates to display technique field, particularly the method for making of a kind of array base palte, display device and array base palte.
Background technology
Liquid crystal display (LiquidCrystalDisplay is called for short LCD) array base palte comprises the effective display area (ActiveArea) being positioned at central area and the periphery circuit region (PeripheralCircuitArea) being positioned at fringe region.Effective display area is provided with many parallel data lines, and the viewing area that the signal of adjacent data line transmission controls is adjacent.Periphery circuit region is provided with at least one source integrated circuit (sourceintegratedcircuit) and goes between one to one with data line, the data line of correspondence is connected with at least one source integrated circuit by lead-in wire, and source integrated circuit is to connected data line transfer signal.
When periphery circuit region is provided with multiple source integrated circuit, along the direction perpendicular to data line, many adjacent data lines are divided into one group, the data line of same group is connected with same source integrated circuit, and the source integrated circuit of the different data line connection organized is different.
Realizing in process of the present invention, inventor finds that prior art at least exists following problem:
When a source integrated circuit is due to static discharge (ElectricalStaticDischarge, be called for short ESD), electric over-stress (ElectricalOverStress, be called for short EOS) etc. reason when breaking down, the data line be connected with this source integrated circuit does not all have signal, because a source integrated circuit is that the data line adjacent with many is connected, the viewing area that the signal of adjacent data line transmission controls is adjacent, therefore this source Fault of Integrated Circuits can cause on display screen and occur a slice continuous print black region, this black region cannot show information, the extreme influence use of user.
Summary of the invention
In order to solve the problem of the use of prior art single source Fault of Integrated Circuits extreme influence user, embodiments provide the method for making of a kind of array base palte, display device and array base palte.Described technical scheme is as follows:
On the one hand, embodiments provide a kind of array base palte, described array base palte comprises effective display area and periphery circuit region, described effective display area is provided with many parallel data lines, described periphery circuit region is provided with at least two source integrated circuit and goes between one to one with described data line, described data line is connected with a described source integrated circuit in described at least two source integrated circuit by corresponding described lead-in wire, is provided with the described data line that source integrated circuit described in other connects between many described data lines that same described source integrated circuit connects.
In a kind of possible implementation of the present invention, described at least two source integrated circuit are divided at least two groups, the number often organizing source integrated circuit in the integrated circuit of described source is at least two, the described data line difference that each group of described source integrated circuit connects, and many described data lines that source integrated circuit described in same group connects are adjacent between two.
Alternatively, along perpendicular to the direction of described data line, often organize that described data line that described source integrated circuit connects connects each described in source integrated circuit periodic change.
Alternatively, the number of source integrated circuit in the integrated circuit of described source is often organized for two or three.
Preferably, the number often organizing source integrated circuit in the integrated circuit of described source is two.
Alternatively, described lead-in wire and the described data line of often organizing a described source integrated circuit connection in the integrated circuit of described source are arranged with layer.
Preferably, the described lead-in wire often organizing in the integrated circuit of described source that described in another, source integrated circuit connects and grid line are arranged with layer, and the described lead-in wire arranged with layer with described grid line is connected with corresponding described data line by via hole.
In the another kind of possible implementation of the present invention, the described data line that same described source integrated circuit connects is divided at least two unit, each described unit comprises a described data line or at least two adjacent between two described data lines, along the direction perpendicular to described data line, source integrated circuit periodic change described in each of described unit connection.
Alternatively, the described lead-in wire that a described source integrated circuit in described at least two source integrated circuit connects and described data line are arranged with layer.
Preferably, the described lead-in wire that source integrated circuit described in another in described at least two source integrated circuit connects and grid line are arranged with layer, and the described lead-in wire arranged with layer with described grid line is connected with corresponding described data line by via hole.
In another possible implementation of the present invention, between every two described data lines that same described source integrated circuit connects, be equipped with the described data line that source integrated circuit described in other connects.
On the other hand, embodiments provide a kind of display device, described display device comprises array base palte as above.
Another aspect, embodiments provides a kind of method for making of array base palte, and described method for making comprises:
Many parallel data lines are set in effective display area;
At least two source integrated circuit are set in periphery circuit region and go between one to one with described data line;
Wherein, described data line is connected with a described source integrated circuit in described at least two source integrated circuit by corresponding described lead-in wire; The described data line that source integrated circuit described in other connects is provided with between many described data lines that same described source integrated circuit connects.
The beneficial effect that the technical scheme that the embodiment of the present invention provides is brought is:
The data line that other source integrated circuit connects is provided with between a plurality of data lines connected by same source integrated circuit, the a plurality of data lines that same source integrated circuit is connected is spaced, the viewing area controlled due to the signal of adjacent data line transmission is adjacent, therefore a source integrated circuit breaks down only can cause on display screen and occurs being interrupted the black line arranged, user can determine the general contents shown by the display information between adjacent black line, single source integrated circuit is broken down less on the impact of user.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the structural representation of a kind of array base palte that the embodiment of the present invention provides;
Fig. 2 a-Fig. 2 c is the connection diagram of the source integrated circuit that provides of the embodiment of the present invention and data line;
Fig. 3 is the structural representation of a kind of array base palte that the embodiment of the present invention provides;
Fig. 4 a-Fig. 4 d is the connection diagram of the source integrated circuit that provides of the embodiment of the present invention and data line;
Fig. 5 a-Fig. 5 c is the schematic diagram of the display image that the embodiment of the present invention provides;
Fig. 6 is the process flow diagram of the method for making of a kind of array base palte that the embodiment of the present invention provides.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, embodiment of the present invention is described further in detail.
Embodiments provide a kind of array base palte, be particularly useful for Vehicular display device or airborne indicator, see Fig. 1, this array base palte comprises effective display area 10 and periphery circuit region 20, effective display area 10 is provided with many parallel data lines 11, and periphery circuit region 20 is provided with at least two source integrated circuit 21 and goes between 22 one to one with data line 11.
In the present embodiment, data line 11 is connected with a source integrated circuit 21 at least two source integrated circuit 21 by corresponding lead-in wire 22.The data line 11 that other source integrated circuit 21 connects is provided with between a plurality of data lines 11 that same source integrated circuit 21 connects.
It should be noted that, for a source integrated circuit, other source integrated circuit is one or more sources integrated circuit of this source integrated circuit non-.
Such as, see Fig. 2 a, along the direction perpendicular to data line, data line 11a, 11b, 11c, 11d, 11e, 11f are arranged in order.Other source integrated circuit is the situation of a source integrated circuit of this source integrated circuit non-, data line 11a, 11c, 11e are connected with source integrated circuit 21a, data line 11b, 11d, 11f are connected with source integrated circuit 21b, the i.e. data line 11b establishing active integrated circuit 21b to connect between data line 11a, 11c of source integrated circuit 21a connection, the data line 11c establishing active integrated circuit 21a to connect between data line 11b, 11d that source integrated circuit 21b connects.
Other source integrated circuit is the situation of multiple sources integrated circuit of this source integrated circuit non-, see Fig. 2 b, data line 11a, 11d is connected with source integrated circuit 21a, data line 11b, 11e is connected with source integrated circuit 21b, data line 11c, 11f is connected with source integrated circuit 21c, the i.e. data line 11a of source integrated circuit 21a connection, the data line 11b that active integrated circuit 21b connects is established between 11d, the data line 11c that source integrated circuit 21c connects, the data line 11b that source integrated circuit 21b connects, the data line 11c that active integrated circuit 21c connects is established between 11e, the data line 11d that source integrated circuit 21a connects, the data line 11c that source integrated circuit 21c connects, the data line 11d that active integrated circuit 21a connects is established between 11f, the data line 11e that source integrated circuit 21b connects.
The data line being provided with other source integrated circuit connection between a plurality of data lines that same source integrated circuit connects simultaneously is be provided with the data line that other source integrated circuit connects between at least two data lines that same source integrated circuit connects.
Such as, see Fig. 2 c, along the direction perpendicular to data line, be still arranged in sequence with data line 11a, 11b, 11c, 11d, 11e, 11f.Difference is, data line 11a, 11b, 11e are connected with source integrated circuit 21a, data line 11c, 11d, 11f are connected with source integrated circuit 21b, i.e. data line 11c, 11d of establishing active integrated circuit 21b to connect between data line 11b, 11e of source integrated circuit 21a connection, the data line 11e establishing active integrated circuit 21a to connect between data line 11d, 11f that source integrated circuit 21b connects.The data line not having other source integrated circuit to connect between data line 11a, 11b of source integrated circuit 21a connection simultaneously, the data line also not having other source integrated circuit to connect between data line 11c, 11d of source integrated circuit 21b connection.
In actual applications, when the number of source integrated circuit 21 is more, as four or five, source integrated circuit can be divided into groups, the data line that the source integrated circuit of same group connects is adjacent between two, and be provided with the data line connected with other source integrated circuit of group between a plurality of data lines that same source integrated circuit connects, the data line connected by same group of source integrated circuit is staggered.Also can not divide into groups, by the source integrated circuit of institute's active integrated circuit as same group, the data line that institute's active integrated circuit connects is staggered together.The number that certain the present invention is preferably applied to often organize source integrated circuit in the integrated circuit of source is the situation of two or three.
The data line that other source integrated circuit connects is provided with between a plurality of data lines that the embodiment of the present invention is connected by same source integrated circuit, the a plurality of data lines that same source integrated circuit is connected is spaced, the viewing area controlled due to the signal of adjacent data line transmission is adjacent, therefore a source integrated circuit breaks down only can cause on display screen and occurs being interrupted the black line arranged, user can determine the general contents shown by the display information between adjacent black line, single source integrated circuit is broken down less on the impact of user.
Embodiments provide a kind of array base palte, be particularly useful for Vehicular display device or airborne indicator, see Fig. 3, this array base palte comprises effective display area 10 and periphery circuit region 20, effective display area 10 is provided with many parallel data lines 11, and periphery circuit region 20 is provided with at least two source integrated circuit 21 and goes between 22 one to one with data line 11.
In the present embodiment, data line 11 is connected with a source integrated circuit 21 at least two source integrated circuit 21 by corresponding lead-in wire 22.The data line 11 that other source integrated circuit 21 connects is provided with between a plurality of data lines 11 that same source integrated circuit 21 connects.
Understandably, the data line that other source integrated circuit connects is provided with between a plurality of data lines that same source integrated circuit connects, the a plurality of data lines that same source integrated circuit is connected is spaced, the viewing area controlled due to the signal of adjacent data line transmission is adjacent, therefore a source integrated circuit breaks down only can cause on display screen and occurs being interrupted the black line arranged, user can determine the general contents shown by the display information between adjacent black line, single source integrated circuit is broken down less on the impact of user.
In actual applications, as shown in Figure 3, effective display area 10 is also provided with pixel cell 12 in arrayed and many parallel grid lines 13, data line 11 is provided with between the pixel cell 12 that every two row are adjacent, be provided with grid line 13 between the pixel cell 12 that every two row are adjacent, grid line 13 and data line 11 intersect and insulation mutually.Wherein, each pixel cell comprises Thin Film Transistor (TFT) (ThinFilmTransistor is called for short TFT) and pixel electrode.
In addition, periphery circuit region 20 is also provided with drive integrated circult 23, and drive integrated circult 23 is connected with each bar grid line 13 respectively.
In specific implementation, effective display area first forms grid and grid line, and grid line is connected with grid; Form insulation course again; Then be formed with active layer, insulated by insulation course between active layer and grid; Then form source electrode, drain electrode, pixel electrode, data line, source electrode is connected with active layer respectively with drain electrode, and grid, insulation course, source electrode, drain electrode and active layer form TFT, and pixel electrode is connected with drain electrode, and data line is connected with source electrode.
In a kind of implementation of the present embodiment, at least two source integrated circuit can be divided at least two groups, the number often organizing source integrated circuit in the integrated circuit of source is at least two, the data line difference that each group of source integrated circuit connects, and a plurality of data lines of same group of source integrated circuit connection is adjacent between two.
Easily know, the data line connected due to same group of source integrated circuit is adjacent, therefore the data line connected with other source integrated circuit of group is provided with between a plurality of data lines that same group of source integrated circuit connects, to realize being provided with between a plurality of data lines that same source integrated circuit connects the data line that other source integrated circuit connects.
As previously mentioned, when the number of source integrated circuit is more, source integrated circuit can be divided into groups.Preferably, one group can be divided into by every two source integrated circuit, if the source integrated circuit that after grouping, existence one is independent, then this source integrated circuit is added any one group, obtain an one group of source integrated circuit be made up of three source integrated circuit, or, again every three source integrated circuit are divided into one group, if the source integrated circuit that after grouping, existence one is independent again, then this source integrated circuit is split as together with any one group the two groups of source integrated circuit be made up of two source integrated circuit, if the source integrated circuit that after grouping, existence two is independent again, then these two source integrated circuit are directly divided into one group.Such as, the number of source integrated circuit is four, be then divided into two groups, and the number often organizing source integrated circuit in integrated circuit is in a steady stream two.And for example, the number of source integrated circuit is five, then be also divided into two groups, and in one group of source integrated circuit, the number of source integrated circuit is two, and in another group source integrated circuit, the number of source integrated circuit is three.
Particularly, the number often organizing source integrated circuit in the integrated circuit of source can be identical, also can be different, and the present invention is not restricted this.
Particularly, the arrangement mode often organizing the data line that each source integrated circuit connects in the integrated circuit of source can be identical, also can be different, invents and be not also restricted this.
Such as, see Fig. 4 a, along the direction perpendicular to data line, data line 11a, 11b, 11c, 11d, 11e, 11f, 11g, 11h, 11i, 11j, 11k, 11m, 11n, 11p, 11q are arranged in order.Source integrated circuit 21a connection data line 11a, 11c, source integrated circuit 21b connection data line 11b, 11d, source integrated circuit 21c connection data line 11e, 11f, 11h, source integrated circuit 21d connection data line 11g, 11i, source integrated circuit 21e connection data line 11j, 11m, source integrated circuit 21f connection data line 11k, 11p, source integrated circuit 21g connection data line 11n, 11q.Integrated circuit 21a, 21b are divided into one group in source, integrated circuit 21c, 21d are divided into another group in source, source integrated circuit 21e, 21f, 21g are divided into again one group (the source integrated circuit of a same group dotted line circle being lived in Fig. 4 a), the data line that source integrated circuit 21a, 21b connect is adjacent between two, the data line that source integrated circuit 21c, 21d connect is adjacent between two, and the data line that source integrated circuit 21e, 21f, 21g connect is adjacent between two.
Understandably, the source IC partition connected by adjacent data line is one group, the number often organizing source integrated circuit is at least two, when ensureing to be provided with the data line connected with other source integrated circuit of group between a plurality of data lines that same source integrated circuit connects, reduce the lead-in wire span of connection data line and source integrated circuit.
Alternatively, the data line connected with other source integrated circuit of group can be equipped with between every two data lines that same source integrated circuit connects, source integrated circuit 21a, 21b as shown in fig. 4 a, or source integrated circuit 21e, 21f, 21g.
Understandably, the data line connected with other source integrated circuit of group is equipped with between every two data lines of same group of source integrated circuit connection, every two data lines that same source integrated circuit is connected are and are spaced, the viewing area controlled due to the signal of adjacent data line transmission is adjacent, therefore the black line fineness degree that the display screen that source Fault of Integrated Circuits causes occurs reaches minimum, reduce further the impact on user.
Preferably, along the direction perpendicular to data line, often organize each source integrated circuit periodic change of the data line connection that source integrated circuit connects, source integrated circuit 21a, 21b as shown in fig. 4 a.
Understandably, along the direction perpendicular to data line, often organize each source integrated circuit periodic change of the data line connection that source integrated circuit connects, the a plurality of data lines that same source integrated circuit connects can be evenly distributed in all data lines of same group of source integrated circuit connection, thus make the source integrated circuit black line spacing that caused display screen occurs that breaks down reach maximum, reduce further the impact on user.
Alternatively, the number often organizing source integrated circuit in the integrated circuit of source can be two or three.
Understandably, in order to the lead-in wire preventing from connecting not homology integrated circuit intersects, the lead-in wire connecting not homology integrated circuit can be arranged on different layers.Because the lead-in wire only having same group of source integrated circuit to connect can intersect, therefore the number often organizing source integrated circuit in the integrated circuit of source is defined as two or three, lead-in wire can be made only to need layout two or three layer, reduce the complexity that lead-in wire is arranged.
Preferably, the number often organizing source integrated circuit in the integrated circuit of source can be two.
Understandably, the number often organizing source integrated circuit in the integrated circuit of source is defined as two, the complexity that lead-in wire is arranged can be reduced to greatest extent.
Alternatively, the lead-in wire often organizing a source integrated circuit connection in the integrated circuit of source can be arranged with layer with data line.
Understandably, lead-in wire and data line arrange with layer and the structure of array base palte entirety can be made more compact, and directly can realize the connection of lead-in wire and data line.
Preferably, the lead-in wire often organizing another source integrated circuit connection in the integrated circuit of source can be arranged with layer with grid line, and the lead-in wire arranged with layer with grid line is connected with corresponding data line by via hole.
Understandably, lead-in wire and grid line arrange with layer and the structure of array base palte entirety can be made more compact, and be provided with insulation course between grid line and data line, this insulation course directly can be utilized the lead-in wire arranged with layer with grid line and completely cut off with the lead-in wire that data line is arranged with layer.Simultaneously via hole can be set in a insulating layer, to realize the connection of lead-in wire and the corresponding data line arranged with layer with grid line.
Fig. 5 a does not have for institute's active integrated circuit the schematic diagram showing image during fault, now can know the information seeing all viewing areas: hour hands point to the position of 12, and minute hand points to the position of four, is now ten two: 20.
As stated in the Background Art, many adjacent data lines are divided into one group along the direction perpendicular to data line by existing array base palte, and the data line of same group is connected with same source integrated circuit, and the source integrated circuit of the different data line connection organized is different.To be provided with two source integrated circuit, the viewing area controlled due to the signal of adjacent data line transmission is adjacent, then the data line of a source integrated circuit connection controls left half edge regions of display screen, and the data line that another source integrated circuit connects controls the display screen right side half edge regions.When the source Fault of Integrated Circuits that the data line controlling right half edge regions connects, now can only know the information seeing left half edge regions, and the information of right half edge regions be can't see completely, as shown in Figure 5 b: hour hands point to the position of 12, minute hand be can't see, and cannot determine the moment now.
Two source integrated circuit equally, in the embodiment of the present invention, the data line of two source integrated circuit connections is alternately arranged, when a source Fault of Integrated Circuits, although the viewing area that the data line that this source integrated circuit connects controls also is to show information, but arrangement is interrupted in this region that cannot show information, the information inference of the region display between the region that can cannot show information from each goes out the region that cannot show information information to be expressed, as shown in Figure 5 c: indistinctly can see that hour hands point to the position of 12, minute hand points to the position of 20, it may be now ten two: 20.Therefore as apparent from Fig. 5 a-Fig. 5 c can, the embodiment of the present invention greatly reduces the impact of single source Fault of Integrated Circuits on user, and Consumer's Experience is good.
It should be noted that, when the number of the source integrated circuit that the lead-in wire intersected connects is greater than two, the lead-in wire that at least one source integrated circuit connects cannot be arranged with layer with existing line, and the lead-in wire that each source integrated circuit belonging to this situation connects can arrange one deck separately.Such as, the number of one group of source integrated circuit is three, the lead-in wire (hereinafter referred to ground floor lead-in wire) that one of them source integrated circuit connects is arranged with layer with grid line, insulation course (now can directly adopt the insulation course arranged between grid line and data line, hereinafter referred to ground floor insulation course) is provided with above ground floor lead-in wire; Then the lead-in wire (hereinafter referred to second layer lead-in wire) that another source integrated circuit connects is set on ground floor insulation course, second layer lead-in wire is arranged with layer with data line, and second layer lead-in wire is also provided with insulation course (hereinafter referred to second layer insulation course); The lead-in wire (going between hereinafter referred to third layer) be connected with another source integrated circuit is then set on second layer insulation course, third layer lead-in wire is also provided with insulation course (being called third layer insulation course).Easily know, the number of one group of source integrated circuit be four, five ... etc. situation can the rest may be inferred.Meanwhile, the non-lead-in wire arranged with layer with data line all can be connected with corresponding data line by via hole.
In actual applications, last layer insulating is for the protection of lead-in wire, and as above-mentioned third layer insulation course, other insulation course except last layer insulating is used for isolated adjacent two layers lead-in wire, as above-mentioned ground floor insulation course and second layer insulation course.
In the another kind of implementation of the present embodiment, the data line that other source integrated circuit connects between every two data lines that same source integrated circuit connects, can be equipped with.
Wherein, along the direction perpendicular to data line, the source integrated circuit that data line connects can cyclical variation.Such as, see Fig. 4 b, along the direction perpendicular to data line, data line 11a, 11b, 11c, 11d, 11e, 11f, 11g, 11h, 11i, 11j, 11k are arranged in order.Source integrated circuit 21a connection data line 11a, 11e, 11i, source integrated circuit 21b connection data line 11b, 11f, 11j, source integrated circuit 21c connection data line 11c, 11g, 11k, source integrated circuit 21d connection data line 11d, 11h.
Along the direction perpendicular to data line, the source integrated circuit that data line connects can arbitrarily change.And for example, see Fig. 4 c, source integrated circuit 21a connection data line 11a, 11f, 11i, source integrated circuit 21b connection data line 11b, 11e, 11k, source integrated circuit 21c connection data line 11c, 11g, 11j, source integrated circuit 21d connection data line 11d, 11h.
Understandably, the data line that other source integrated circuit connects is equipped with between every two data lines that same source integrated circuit connects, every two data lines that same source integrated circuit is connected are and are spaced, the viewing area controlled due to the signal of adjacent data line transmission is adjacent, therefore the black line fineness degree that the display screen that source Fault of Integrated Circuits causes occurs reaches minimum, reduce further the impact on user.
Alternatively, along the direction perpendicular to data line, each source integrated circuit periodic change that data line connects, as shown in Figure 4 b.
Understandably, along the direction perpendicular to data line, each source integrated circuit periodic change that data line connects, can a plurality of data lines that same source integrated circuit connects be evenly distributed in all data lines, thus make the source integrated circuit black line spacing that caused display screen occurs that breaks down reach maximum, reduce further the impact on user.
Alternatively, the lead-in wire that a source integrated circuit at least two source integrated circuit connects can be arranged with layer with data line.
Understandably, lead-in wire and data line arrange with layer and the structure of array base palte entirety can be made more compact, and directly can realize the connection of lead-in wire and data line.
Preferably, the lead-in wire that another source integrated circuit at least two source integrated circuit connects can be arranged with layer with grid line, and the lead-in wire arranged with layer with grid line is connected with corresponding data line by via hole.
Understandably, lead-in wire and grid line arrange with layer and the structure of array base palte entirety can be made more compact, and be provided with insulation course between grid line and data line, this insulation course directly can be utilized the lead-in wire arranged with layer with grid line and completely cut off with the lead-in wire that data line is arranged with layer.
In another implementation of the present embodiment, the data line that same source integrated circuit connects is divided at least two unit, each unit comprises a data line or at least two adjacent between two data lines, along the direction perpendicular to data line, each source integrated circuit periodic change that unit connects.
Such as, participate in Fig. 4 d, along the direction perpendicular to data line, data line 11a, 11b, 11c, 11d, 11e, 11f, 11g, 11h, 11i, 11j, 11k, 11m, 11n are arranged in order.Source integrated circuit 21a connection data line 11a, 11g, 11n, source integrated circuit 21b connection data line 11b, 11c, 11h, 11i, source integrated circuit 21c connection data line 11d, 11j, 11k, source integrated circuit 21d connection data line 11e, 11f, 11m.
Understandably, along the direction perpendicular to data line, each source integrated circuit periodic change that unit connects, can multiple unit that same source integrated circuit connects be evenly distributed in all data lines, thus make the source integrated circuit black line spacing that caused display screen occurs that breaks down reach maximum, reduce further the impact on user.
Alternatively, each unit can comprise a data line, the data line that source integrated circuit 21a as shown in figure 4d connects.
Understandably, each unit all only includes a data line, every two data lines that same source integrated circuit is connected are and are spaced, the viewing area controlled due to the signal of adjacent data line transmission is adjacent, therefore the black line fineness degree that the display screen that source Fault of Integrated Circuits causes occurs reaches minimum, reduce further the impact on user.
Embodiments provide a kind of display device, this display device comprises the array base palte that Fig. 1 or Fig. 3 provides.
The data line that other source integrated circuit connects is provided with between a plurality of data lines that the embodiment of the present invention is connected by same source integrated circuit, the a plurality of data lines that same source integrated circuit is connected is spaced, the viewing area controlled due to the signal of adjacent data line transmission is adjacent, therefore a source integrated circuit breaks down only can cause on display screen and occurs being interrupted the black line arranged, user can determine the general contents shown by the display information between adjacent black line, single source integrated circuit is broken down less on the impact of user.
In actual applications, this display device can be Vehicular display device or airborne indicator, because this display device comprises the array base palte that Fig. 1 or Fig. 3 provide, single source integrated circuit is broken down less on the impact of user, therefore to resist the robustness of accidental problem (as single source Fault of Integrated Circuits) better for this display device, display security is higher, is particularly suitable for requiring strict Vehicular display device or airborne indicator to the safety and reliability of display.
Embodiments provide a kind of method for making of array base palte, be applicable to the array base palte that construction drawing 1 or Fig. 3 provide, see Fig. 6, this method for making comprises:
Step S61: many parallel data lines are set in effective display area.
Step S62: at least two source integrated circuit are set in periphery circuit region and go between one to one with data line.
In the present embodiment, data line is connected with a source integrated circuit at least two source integrated circuit by corresponding lead-in wire; The data line that other source integrated circuit connects is provided with between a plurality of data lines that same source integrated circuit connects.
The data line that other source integrated circuit connects is provided with between a plurality of data lines that the embodiment of the present invention is connected by same source integrated circuit, the a plurality of data lines that same source integrated circuit is connected is spaced, the viewing area controlled due to the signal of adjacent data line transmission is adjacent, therefore a source integrated circuit breaks down only can cause on display screen and occurs being interrupted the black line arranged, user can determine the general contents shown by the display information between adjacent black line, single source integrated circuit is broken down less on the impact of user.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (13)
1. an array base palte, described array base palte comprises effective display area and periphery circuit region, described effective display area is provided with many parallel data lines, described periphery circuit region is provided with at least two source integrated circuit and goes between one to one with described data line, described data line is connected with a described source integrated circuit in described at least two source integrated circuit by corresponding described lead-in wire, it is characterized in that, between many described data lines that same described source integrated circuit connects, be provided with the described data line that source integrated circuit described in other connects.
2. array base palte according to claim 1, it is characterized in that, described at least two source integrated circuit are divided at least two groups, the number often organizing source integrated circuit in the integrated circuit of described source is at least two, the described data line difference that each group of described source integrated circuit connects, and many described data lines that source integrated circuit described in same group connects are adjacent between two.
3. array base palte according to claim 2, is characterized in that, along perpendicular to the direction of described data line, often organize that described data line that described source integrated circuit connects connects each described in source integrated circuit periodic change.
4. array base palte according to claim 2, is characterized in that, often organizes the number of source integrated circuit in the integrated circuit of described source for two or three.
5. array base palte according to claim 4, is characterized in that, the number often organizing source integrated circuit in the integrated circuit of described source is two.
6. array base palte according to claim 2, is characterized in that, described lead-in wire and the described data line of often organizing a described source integrated circuit connection in the integrated circuit of described source are arranged with layer.
7. array base palte according to claim 6, it is characterized in that, the described lead-in wire often organizing in the integrated circuit of described source that described in another, source integrated circuit connects and grid line are arranged with layer, and the described lead-in wire arranged with layer with described grid line is connected with corresponding described data line by via hole.
8. array base palte according to claim 1, it is characterized in that, the described data line that same described source integrated circuit connects is divided at least two unit, each described unit comprises a described data line or at least two adjacent between two described data lines, along the direction perpendicular to described data line, source integrated circuit periodic change described in each of described unit connection.
9. array base palte according to claim 8, is characterized in that, the described lead-in wire that a described source integrated circuit in described at least two source integrated circuit connects and described data line are arranged with layer.
10. array base palte according to claim 9, it is characterized in that, the described lead-in wire that source integrated circuit described in another in described at least two source integrated circuit connects and grid line are arranged with layer, and the described lead-in wire arranged with layer with described grid line is connected with corresponding described data line by via hole.
11. array base paltes according to claim 1, is characterized in that, are equipped with the described data line that source integrated circuit described in other connects between every two described data lines that same described source integrated circuit connects.
12. 1 kinds of display device, is characterized in that, described display device comprises the array base palte as described in any one of claim 1-11.
The method for making of 13. 1 kinds of array base paltes, is characterized in that, described method for making comprises:
Many parallel data lines are set in effective display area;
At least two source integrated circuit are set in periphery circuit region and go between one to one with described data line;
Wherein, described data line is connected with a described source integrated circuit in described at least two source integrated circuit by corresponding described lead-in wire; The described data line that source integrated circuit described in other connects is provided with between many described data lines that same described source integrated circuit connects.
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| CN105204250B (en) | 2019-03-01 |
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