CN105158559A - Method of converting power signals into zero initial phase sine signal sequence and system - Google Patents
Method of converting power signals into zero initial phase sine signal sequence and system Download PDFInfo
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Abstract
The invention discloses a method of converting power signals into a zero initial phase sine signal sequence and a system. The method comprises steps: an initial sampling sequence length and an initial sampling sequence are acquired; initial frequency measurement is carried out on the initial sampling sequence to obtain a reference frequency; according to a preset sampling frequency and the reference frequency, a unit cycle sequence length is acquired; according to a preset integer signal cycle number and the unit cycle sequence length, a preset sequence length is acquired; a positive sequence and an inverse sequence are acquired in the initial sampling sequence; subtraction between the positive sequence and the inverse sequence is carried out to obtain a zero initial phase sine function modulation sequence; the cosine function and the sine function of the reference frequency and the positive sequence are multiplied and then the inverse sequence is multiplied, digital trapping, vector integration, vector integral value conversion and phase conversion are carried out, an average initial phase of the positive sequence is acquired, and a zero initial phase sine signal output sequence is acquired according to the zero initial phase sine function modulation sequence. The sine parameter calculation accuracy, the anti-harmonic performance and the noise interference performance are improved.
Description
Technical field
The present invention relates to technical field of electric power, particularly relate to a kind of method and system electric power signal being converted to zero initial phase sinusoidal signal sequence.
Background technology
The frequency measurement, phase measurement, amplitude measurement etc. of electric system are the measurement of sine parameter in itself.Fourier transform is the basic skills realizing sine parameter measurement, is widely used in electric system.But along with the development of sine parameter measuring technique, Fourier transform Problems existing is more aobvious outstanding, and it is difficult to the requirement meeting the calculating of electric system offset of sinusoidal parameter pin-point accuracy further.
In the measurement of electric system sine parameter, there is many measuring methods, as zero hands over method, based on the mensuration of filtering, based on Wavelet Transform, based on the mensuration of neural network, the mensuration etc. based on DFT conversion.But the specified power frequency of operation of power networks, near 50Hz, belongs to the sinusoidal frequency that frequency is lower.Due to the complicacy that the limitation of actual signal treatment technology and signal are formed, above-mentioned measuring method offset of sinusoidal parameter measurement precision is low, anti-harmonic wave and noise poor.
Summary of the invention
Based on above-mentioned situation, the present invention proposes a kind of method and system electric power signal being converted to zero initial phase sinusoidal signal sequence, obtain zero initial phase sinusoidal signal sequence, improve accuracy and anti-harmonic wave, the noise of sine parameter calculating.
To achieve these goals, the embodiment of technical solution of the present invention is:
Electric power signal is converted to a method for zero initial phase sinusoidal signal sequence, comprises the following steps:
According to the lower limit of frequency power signal scope, default sample frequency and default integer signal period number, obtain the preliminary sample sequence length of described electric power signal;
According to described preliminary sample sequence length, described electric power signal is tentatively sampled, obtain the preliminary sample sequence of described electric power signal;
Frequency preliminary survey is carried out to described preliminary sample sequence, generates the first synchronizing frequency of described electric power signal, and according to described preliminary frequency setting the reference frequency of electric power signal;
According to described default sample frequency and described reference frequency, obtain the unit period sequence length of described electric power signal;
According to described default integer signal period number and described unit period sequence length, obtain the predetermined sequence length of described electric power signal;
From described preliminary sample sequence, the forward sequence of described electric power signal is obtained according to described predetermined sequence length;
Described forward sequence is oppositely exported, obtains the anti-pleat sequence of answering with described forward sequence pair;
Described forward sequence and described anti-pleat sequence are subtracted each other, obtains described electric power signal zero initial phase sine function modulation sequence;
Respectively the cosine function of described reference frequency is multiplied with described forward sequence with the sine function of described reference frequency, generates the first real sequence vector frequently and the first empty sequence vector frequently;
Respectively the cosine function of described reference frequency is multiplied with described anti-pleat sequence with the sine function of described reference frequency, generates the second real sequence vector frequently and the second empty sequence vector frequently;
Respectively digital notch is carried out to the described first real sequence vector frequently and the described first empty sequence vector frequently, generate the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Respectively integral operation is carried out to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently, generate the first real vector product score value frequently and the first empty vector product score value frequently;
Respectively digital notch is carried out to the described second real sequence vector frequently and the described second empty sequence vector frequently, generate the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Respectively integral operation is carried out to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently, generate the second real vector product score value frequently and the second empty vector product score value frequently;
According to the phase transition rule preset, the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
According to the sequence average initial phase transformation rule preset, described first phase and described second phase are converted to the average initial phase of described forward sequence;
According to the average initial phase of described forward sequence, the amplitude of described electric power signal zero initial phase sine function modulation sequence is reverted to the amplitude of described electric power signal, obtain zero initial phase sinusoidal signal output sequence of described electric power signal.
Electric power signal is converted to a system for zero initial phase sinusoidal signal sequence, comprises:
Sample sequence length modules, for the lower limit according to frequency power signal scope, presets sample frequency and default integer signal period number, obtains the preliminary sample sequence length of described electric power signal;
Preliminary sampling module, for tentatively sampling to described electric power signal according to described preliminary sample sequence length, obtains the preliminary sample sequence of described electric power signal;
Frequency preliminary survey module, for carrying out frequency preliminary survey to described preliminary sample sequence, generates the first synchronizing frequency of described electric power signal, and according to described preliminary frequency setting the reference frequency of electric power signal;
Unit period sequence length module, for according to described default sample frequency and described reference frequency, obtains the unit period sequence length of described electric power signal;
Predetermined sequence length modules, for according to described default integer signal period number and described unit period sequence length, obtains the predetermined sequence length of described electric power signal;
Forward block, for obtaining the forward sequence of described electric power signal from described preliminary sample sequence according to described predetermined sequence length;
Anti-pleat block, for described forward sequence oppositely being exported, obtains the anti-pleat sequence of answering with described forward sequence pair;
Sine function modulation sequence module, for described forward sequence and described anti-pleat sequence being subtracted each other, obtains described electric power signal zero initial phase sine function modulation sequence;
Primary vector sequence generating module, for being multiplied with described forward sequence with the sine function of described reference frequency by the cosine function of described reference frequency respectively, generates the first real sequence vector frequently and the first empty sequence vector frequently;
Secondary vector sequence generating module, for being multiplied with described anti-pleat sequence with the sine function of described reference frequency by the cosine function of described reference frequency respectively, generates the second real sequence vector frequently and the second empty sequence vector frequently;
Primary vector trap sequence generating module, for carrying out digital notch to the described first real sequence vector frequently and the described first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Primary vector integrated value generation module, for carrying out integral operation to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently;
Secondary vector trap sequence generating module, for carrying out digital notch to the described second real sequence vector frequently and the described second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Secondary vector integrated value generation module, for carrying out integral operation to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently;
Phase module, for regular according to the phase transition preset, described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
Average initial phase module, for according to the sequence average initial phase transformation rule preset, is converted to the average initial phase of described forward sequence by described first phase and described second phase;
Zero initial phase sinusoidal signal output sequence module, for the average initial phase according to described forward sequence, the amplitude of described electric power signal zero initial phase sine function modulation sequence is reverted to the amplitude of described electric power signal, obtain zero initial phase sinusoidal signal output sequence of described electric power signal.
Compared with prior art, beneficial effect of the present invention is: the present invention electric power signal is converted to zero initial phase sinusoidal signal sequence method and system, obtain preliminary sample sequence length, and electric power signal tentatively sampled, obtain preliminary sample sequence; Frequency preliminary survey is carried out to preliminary sample sequence, generates just synchronizing frequency, setting reference frequency; According to default sample frequency and reference frequency, obtain unit period sequence length; According to default integer signal period number and unit period sequence length, obtain predetermined sequence length; From preliminary sample sequence, obtain forward sequence, obtain anti-pleat sequence further; Forward sequence and anti-pleat sequence are subtracted each other, obtains zero initial phase sine function modulation sequence; Cosine function respectively with reference to frequency is multiplied with forward sequence with sine function, be multiplied with anti-pleat sequence respectively again, carry out digital notch, vectorial integration, the conversion of vector product score value, phase transition, obtain the average initial phase of forward sequence, the amplitude of zero initial phase sine function modulation sequence is reverted to the amplitude of electric power signal, obtain zero initial phase sinusoidal signal output sequence.Obtain sine function modulation sequence, solve the impact that burst initial phase changes greatly problem, sine function burst carries the larger burst all phase difference information of numerical value simultaneously, improves accuracy and anti-harmonic wave, the noise of sine parameter calculating.
Accompanying drawing explanation
Fig. 1 is the method flow diagram in an embodiment, electric power signal being converted to zero initial phase sinusoidal signal sequence;
Fig. 2 is forward sequence and anti-pleat sequence diagram in an embodiment;
Fig. 3 is the system architecture schematic diagram in an embodiment, electric power signal being converted to zero initial phase sinusoidal signal sequence.
Embodiment
In order to make the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, the present invention is described in further detail.
Although the step in the present invention arranges with label, and be not used in and limit the precedence of step, the order of step or the execution of certain step need based on other steps unless expressly stated, otherwise the relative rank of step is adjustable.
In an embodiment, electric power signal is converted to the method for zero initial phase sinusoidal signal sequence, as shown in Figure 1, comprises the following steps:
Step S101: according to the lower limit of frequency power signal scope, default sample frequency and default integer signal period number, obtain the preliminary sample sequence length of described electric power signal;
Step S102: according to described preliminary sample sequence length, described electric power signal is tentatively sampled, obtain the preliminary sample sequence of described electric power signal;
Step S103: carry out frequency preliminary survey to described preliminary sample sequence, generates the first synchronizing frequency of described electric power signal, and according to described preliminary frequency setting the reference frequency of electric power signal;
Step S104: according to described default sample frequency and described reference frequency, obtains the unit period sequence length of described electric power signal;
Step S105: according to described default integer signal period number and described unit period sequence length, obtain the predetermined sequence length of described electric power signal;
Step S106: the forward sequence obtaining described electric power signal according to described predetermined sequence length from described preliminary sample sequence;
Step S107: described forward sequence oppositely exported, obtains the anti-pleat sequence of answering with described forward sequence pair;
Step S108: described forward sequence and described anti-pleat sequence are subtracted each other, obtains described electric power signal zero initial phase sine function modulation sequence;
Step S109: be multiplied with described forward sequence with the sine function of described reference frequency by the cosine function of described reference frequency respectively, generates the first real sequence vector frequently and the first empty sequence vector frequently;
Step S110: be multiplied with described anti-pleat sequence with the sine function of described reference frequency by the cosine function of described reference frequency respectively, generates the second real sequence vector frequently and the second empty sequence vector frequently;
Step S111: carry out digital notch to the described first real sequence vector frequently and the described first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Step S112: carry out integral operation to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently;
Step S113: carry out digital notch to the described second real sequence vector frequently and the described second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Step S114: carry out integral operation to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently;
Step S115: according to the phase transition rule preset, described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
Step S116: according to the sequence average initial phase transformation rule preset, described first phase and described second phase are converted to the average initial phase of described forward sequence;
Step S117: according to the average initial phase of described forward sequence, reverts to the amplitude of described electric power signal, obtains zero initial phase sinusoidal signal output sequence of described electric power signal by the amplitude of described electric power signal zero initial phase sine function modulation sequence.
Known from the above description, the present invention obtains sine function modulation sequence, solve the impact that burst initial phase changes greatly problem, sine function burst carries the larger burst all phase difference information of numerical value simultaneously, improves accuracy and anti-harmonic wave, the noise of sine parameter calculating.
Wherein, for step S101, according to the lower limit of frequency power signal scope, default sample frequency and default integer signal period number, obtain the preliminary sample sequence length of described electric power signal;
Described electric power signal is a kind of first-harmonic composition is main sinusoidal signal.Sinusoidal signal is extensively made a comment or criticism string function signal and cosine function signal.
In one embodiment, power system frequency scope at 45Hz-55Hz, power taking force signal lower-frequency limit f
minfor 45Hz; Described default integer signal period number C is set according to actual needs
2 π, preferably, get C
2 πbe 11.
In one embodiment, obtaining described preliminary sample sequence length is formula (1):
In formula, N
startfor described preliminary sample sequence length, unit dimensionless; (int) round numbers is represented; C
2 πfor described default integer signal period number, unit dimensionless; f
minfor the lower limit of described frequency power signal scope, unit Hz; f
nfor described default sample frequency, unit Hz.
For step S102, according to described preliminary sample sequence length, described electric power signal is tentatively sampled, obtain the preliminary sample sequence of described electric power signal.
In one embodiment, described electric power signal is the sine function signal of single fundamental frequency, and the preliminary sample sequence obtaining described electric power signal is formula (2):
n=0,1,2,3,...,N
start-1
Wherein, X
startn () is described preliminary sample sequence; A is the amplitude of described electric power signal, unit v; ω is the frequency of described electric power signal, unit rad/s; T
nfor sampling interval, unit s; f
nfor described default sample frequency, unit Hz; N is the series of discrete number of described electric power signal, unit dimensionless;
for the initial phase of described electric power signal, unit rad; N
startfor described preliminary sample sequence length, unit dimensionless.
For step S103, by zero friendship method, based on filtering algorithm, based on Wavelet Transformation Algorithm, based on neural network algorithm, based on DFT conversion frequency algorithm or based on the frequency algorithm of phase differential, frequency preliminary survey is carried out to described preliminary sample sequence, generate the first synchronizing frequency of described electric power signal.
In one embodiment, generating described just synchronizing frequency is formula (3):
ω
o(3);
Wherein, ω
ofor described just synchronizing frequency, unit rad/s;
Preferably, described reference frequency equals described just synchronizing frequency is formula (4):
ω
s=ω
o(4);
Wherein, ω
sfor reference frequency, unit rad/s; ω
ofor first synchronizing frequency, unit rad/s.
For step S104, according to described default sample frequency and described reference frequency, obtain the unit period sequence length of described electric power signal;
In one embodiment, the unit period sequence length obtaining described electric power signal is formula (5):
In formula, N
2 πfor described unit period sequence length, unit dimensionless; (int) round numbers is represented; f
nfor described default sample frequency, unit Hz; f
sfor the reference frequency of Hz unit; ω
sfor the reference frequency of rad/s unit.
There is the error in 1 sampling interval in described unit period sequence length integer.
For step S105, according to described default integer signal period number and described unit period sequence length, obtain the predetermined sequence length of described electric power signal, require the corresponding integer signal period number of predetermined sequence length in principle;
In one embodiment, described predetermined sequence length is 11 times of described unit period sequence length, and obtaining described predetermined sequence length is formula (6):
N=(int)(C
2πN
2π)(6);
Wherein, N is described predetermined sequence length, unit dimensionless; (int) round numbers is represented; N
2 πfor described unit period sequence length, unit dimensionless; C
2 πfor described default integer signal period number, unit dimensionless; Owing to there is error, described predetermined sequence length comprises the error that described unit period sequence length integer exists.
For step S106, from described preliminary sample sequence, obtain the forward sequence of described electric power signal according to described predetermined sequence length;
In one embodiment, obtaining described forward sequence is formula (7):
n=0,1,2,3,...,N-1(7);
N≤N
start
Wherein, X
in () is forward sequence; X
startn () is preliminary sample sequence; A is signal amplitude, unit v; ω is signal frequency, unit rad/s; T
nfor sampling interval, unit s; N is series of discrete number, unit dimensionless;
for signal initial phase, unit rad; N is forward sequence length, unit dimensionless, and forward sequence length equals described predetermined sequence length; N
startfor preliminary sample sequence length, unit dimensionless.
The avatars of described forward sequence as shown in Figure 2.
For step S107, described forward sequence is oppositely exported, obtain the anti-pleat sequence of answering with described forward sequence pair;
In one embodiment, obtaining anti-pleat sequence is formula (8):
X
-i(-n)=X
i(N-n)=Asin(-ωT
nn+β)(8);
n=0,1,2,3,...,N-1
In formula, X
-i(-n) is anti-pleat sequence; β is anti-pleat sequence initial phase, unit rad.Pass is fastened, and anti-pleat sequence initial phase is the cut-off phase place of forward sequence, i.e. the cut-off phase place of described electric power signal; N is anti-pleat sequence length, unit dimensionless.Anti-pleat sequence length is identical with forward sequence length.
The avatars of described anti-pleat sequence as shown in Figure 2.
For step S108, described forward sequence and described anti-pleat sequence are subtracted each other, obtain described electric power signal zero initial phase sine function modulation sequence;
In one embodiment, the sine function modulation sequence obtaining zero initial phase is formula (9):
n=0,1,2,3,...,N-1
In formula, X
sinn () is the sine function modulation sequence of zero initial phase;
be the sine function modulation sequence amplitude of zero initial phase, unit v;
be the sine function modulation sequence initial phase of zero initial phase, unit rad;
for the forward sequence initial phase of rad/s unit; β is the anti-pleat sequence initial phase of rad/s unit.
Allow forward sequence initial phase
with the variation range of anti-pleat sequence initial phase β at 0 ~ ± 0.375 π rad.
Because the corresponding integer signal period number of described predetermined sequence length exists error, one of reason is the error that reference frequency error causes, and two of reason is integer errors of described predetermined sequence length.If described error is zero, then described sine function burst initial phase
be zero, on the contrary initial phase
near zero.Described initial phase
it is proportional relation between the error of the error compared with null value and described integer signal period number.
For step S109, respectively the cosine function of described reference frequency is multiplied with described forward sequence with the sine function of described reference frequency, generates the first real sequence vector frequently and the first empty sequence vector frequently;
In one embodiment, when not considering described mixing interfering frequency composition, obtaining mixing sequence is formula (10):
n=1,2,3,...,N-1
In formula, R
1n () is the first real sequence vector frequently; I
1n () is the first empty sequence vector frequently; N is the forward sequence length of dimensionless unit.
For step S110, respectively the cosine function of described reference frequency is multiplied with described anti-pleat sequence with the sine function of described reference frequency, generates the second real sequence vector frequently and the second empty sequence vector frequently;
In one embodiment, when not considering described mixing interfering frequency composition, obtaining mixing sequence is formula (11):
n=1,2,3,...,N-1
In formula, R
2n () is the second real sequence vector frequently; I
2n () is the second empty sequence vector frequently; N is the anti-pleat sequence length of dimensionless unit.
For step S111, respectively digital notch is carried out to the described first real sequence vector frequently and the described first empty sequence vector frequently, generate the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Mixing interfering frequency is comprised in described real sequence vector frequently and described empty sequence vector frequently.When in input signal also at flip-flop, subharmonic composition and subharmonic composition time, described mixing interfering frequency will be more complicated, and these mixing interfering frequencies have a strong impact on accuracy in computation.Although window function and integral operation itself have good attenuation to mixing interfering frequency, do not have specific aim, can not produce the inhibiting effect of the degree of depth to the mixing interfering frequency of described complexity, the pin-point accuracy that can not meet sine parameter calculates needs.
In order to suppress the impact of described mixing interfering frequency targetedly, adopt a kind of digital trap, ideally, the null Frequency point just in time corresponding described mixing interfering frequency point of digital trap, has inhibiting effect completely to described mixing interfering frequency.Preferably, digital notch specifically adopts arithmetic mean notch algorithm, is added, then gets its arithmetic mean and export as this trap value by several continuous discrete values.Digital notch needs to arrange digital notch parameter, and described digital notch parameter refers to the length N that several continuous discrete values are added
d.In digital notch Parameter N
dvalue is 1.5 times of signal unit periodic sequence length, can suppress the mixing interfering frequency that 1/3 subharmonic produces.And N
dvalue is 2 times of signal unit periodic sequence length, can to direct current, 1/2 gradation, 1 time, 2 times, 3 times, 4 times, the mixing interfering frequency that produces such as 5 subharmonic suppresses.Therefore, digital notch is made up of the digital trap of 2 kinds of parameters, considers the factors such as physical presence error, in order to the degree of depth suppresses the impact of mixing interfering frequency, the digital trap of often kind of parameter forms by the three stages of digital traps that parameter is identical, and totally six grades of arithmetic mean digital notch formed.
In one embodiment, six grades of arithmetic mean digital notch formulas can be formula (12):
To X (n) n=0,1,2,3 ..., N-1
To X
d(n) n=0,1,2,3 ..., N-3N
d1-3N
d2-1
Wherein, X (n) is digital notch list entries, sequence length N; X
dn () is digital notch output sequence, sequence length N-3N
d1-3N
d2; N
d1for notch parameter 1, namely discrete value is added quantity continuously; N
d2for notch parameter 2, namely discrete value is added quantity continuously.
In one embodiment, notch parameter N
d1value is 1.5 times of the unit period sequence length of described reference frequency, notch parameter N
d2value is 2 times of the unit period sequence length of described reference frequency, and six grades of arithmetic mean digital notch need use 10.5 times of signal unit periodic sequence length.
In one embodiment, under described mixing interfering frequency composition is suppressed prerequisite completely, the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence are frequently (13):
To R
1(n) I
1(n) n=0,1,2,3 ..., N-1
To R
d1(n) I
d1(n) n=0,1,2,3 ..., N-3N
d1-3N
d2-1
Wherein, R
d1n () is the described first real vectorial trap sequence frequently; I
d1n () is the described first empty vectorial trap sequence frequently; K (Ω) is for digital notch is in the dimensionless gain of frequency difference Ω; α (Ω) is for digital filtering is in the rad unit phase shift of frequency difference Ω.
For step S112, respectively integral operation is carried out to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently, generate the first real vector product score value frequently and the first empty vector product score value frequently;
In one embodiment, integral operation length is 0.5 times of described signal period sequence length;
In one embodiment, generate the first real vector product score value frequently and the first empty vector product score value frequently, be formula (14):
n=0,1,2,3,...,L1-1
L1=N-3N
D1-3N
D2
Wherein, R
1it is the first real vector product score value frequently; I
1it is the first empty vector product score value frequently; L1 is integral and calculating length 1, unit dimensionless, and L1 is 0.5 times of signal period sequence length.
For step S113, respectively digital notch is carried out to the described second real sequence vector frequently and the described second empty sequence vector frequently, generate the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
In one embodiment, under described mixing interfering frequency composition is suppressed prerequisite completely, the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence are frequently formula (15):
To R
2(n) I
2(n) n=0,1,2,3 ...., N-1
To R
d2(n) I
d2(n) n=0,1,2,3 ...., N-3N
d1-3N
d2-1
Wherein, R
d2n () is the described second real vectorial trap sequence frequently; I
d2n () is the described second empty vectorial trap sequence frequently; K (Ω) is for digital notch is in the dimensionless gain of frequency difference Ω; α (Ω) is for digital filtering is in the rad unit phase shift of frequency difference Ω.
For step S114, respectively integral operation is carried out to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently, generate the second real vector product score value frequently and the second empty vector product score value frequently;
In one embodiment, integral operation length is 0.5 times of described signal period sequence length;
In one embodiment, generate the second real vector product score value frequently and the second empty vector product score value frequently, be formula (16):
n=0,1,2,3,...,L2-1
L2=N-3N
D1-3N
D2
Wherein, R
2it is the second real vector product score value frequently; I
2it is the second empty vector product score value frequently; L2 is integral and calculating length 2, unit dimensionless, and L2 is 0.5 times of signal period sequence length.
For step S115, according to the phase transition rule preset, described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
In one embodiment, by following formula (17)-(18), the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase:
Wherein, PH
1for first phase, unit rad; R
1it is the first real vector product score value frequently; I
1be the first empty vector product score value frequently, PH
2for second phase, unit rad; R
2it is the second real vector product score value frequently; I
2it is the second empty vector product score value frequently.
In one embodiment, according to the phase transition rule preset, described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the step that the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase are comprised:
Obtain the first ratio of the described first real vector product score value frequently and the described first empty vector product score value frequently and the second ratio of the described second real vector product score value frequently and the described second empty vector product score value frequently;
Obtain the arctan function value of described first ratio, generate described first phase, obtain the arctan function value of described second ratio, generate described second phase.
For step S116, according to the sequence average initial phase transformation rule preset, described first phase and described second phase are converted to the average initial phase of described forward sequence;
In one embodiment, by following formula (19), described first phase and described second phase are converted to the average initial phase of described forward sequence:
Wherein, PH
0for the average initial phase of forward sequence, unit rad; PH
1for first phase, unit rad; PH
2for second phase, unit rad.
The average initial phase of described forward sequence is the mean value of described forward sequence initial phase and described anti-pleat sequence initial phase.
For step S117, according to the average initial phase of described forward sequence, the amplitude of described electric power signal zero initial phase sine function modulation sequence is reverted to the amplitude of described electric power signal, obtain zero initial phase sinusoidal signal output sequence of described electric power signal;
In one embodiment, by following formula (20), the amplitude of the sine function modulation sequence of described electric power signal zero initial phase is reverted to the amplitude of described electric power signal:
n=0,1,2,3,...,N-1
In formula, X
outn () is described zero initial phase sinusoidal signal output sequence, N is described forward sequence length, and described forward sequence length equals described predetermined sequence length.
In an embodiment, electric power signal is converted to the system of zero initial phase sinusoidal signal sequence, as shown in Figure 3, comprises:
Sample sequence length modules 301, for the lower limit according to frequency power signal scope, presets sample frequency and default integer signal period number, obtains the preliminary sample sequence length of described electric power signal;
Preliminary sampling module 302, for tentatively sampling to described electric power signal according to described preliminary sample sequence length, obtains the preliminary sample sequence of described electric power signal;
Frequency preliminary survey module 303, for carrying out frequency preliminary survey to described preliminary sample sequence, generates the first synchronizing frequency of described electric power signal, and according to described preliminary frequency setting the reference frequency of electric power signal;
Unit period sequence length module 304, for according to described default sample frequency and described reference frequency, obtains the unit period sequence length of described electric power signal;
Predetermined sequence length modules 305, for according to described default integer signal period number and described unit period sequence length, obtains the predetermined sequence length of described electric power signal;
Forward block 306, for obtaining the forward sequence of described electric power signal from described preliminary sample sequence according to described predetermined sequence length;
Anti-pleat block 307, for described forward sequence oppositely being exported, obtains the anti-pleat sequence of answering with described forward sequence pair;
Sine function modulation sequence module 308, for described forward sequence and described anti-pleat sequence being subtracted each other, obtains described electric power signal zero initial phase sine function modulation sequence;
Primary vector sequence generating module 309, for being multiplied with described forward sequence with the sine function of described reference frequency by the cosine function of described reference frequency respectively, generates the first real sequence vector frequently and the first empty sequence vector frequently;
Secondary vector sequence generating module 310, for being multiplied with described anti-pleat sequence with the sine function of described reference frequency by the cosine function of described reference frequency respectively, generates the second real sequence vector frequently and the second empty sequence vector frequently;
Primary vector trap sequence generating module 311, for carrying out digital notch to the described first real sequence vector frequently and the described first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Primary vector integrated value generation module 312, for carrying out integral operation to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently;
Secondary vector trap sequence generating module 313, for carrying out digital notch to the described second real sequence vector frequently and the described second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Secondary vector integrated value generation module 314, for carrying out integral operation to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently;
Phase module 315, for regular according to the phase transition preset, described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
Average initial phase module 316, for according to the sequence average initial phase transformation rule preset, is converted to the average initial phase of described forward sequence by described first phase and described second phase;
Zero initial phase sinusoidal signal output sequence module 317, for the average initial phase according to described forward sequence, the amplitude of described electric power signal zero initial phase sine function modulation sequence is reverted to the amplitude of described electric power signal, obtain zero initial phase sinusoidal signal output sequence of described electric power signal.
Based on the system of the present embodiment shown in Fig. 3, a concrete course of work can be as described below:
First sample sequence length modules 301 is according to the lower limit of frequency power signal scope, default sample frequency and default integer signal period number, obtains preliminary sample sequence length; Preliminary sampling module 302 is tentatively sampled to electric power signal according to preliminary sample sequence length, obtains preliminary sample sequence; Frequency preliminary survey module 303 carries out frequency preliminary survey to preliminary sample sequence, generates just synchronizing frequency, and according to preliminary frequency setting reference frequency; Unit period sequence length module 304, according to default sample frequency and reference frequency, obtains unit period sequence length; Predetermined sequence length modules 305, according to default integer signal period number and unit period sequence length, obtains predetermined sequence length; Forward block 306 obtains forward sequence according to predetermined sequence length from preliminary sample sequence; Forward sequence oppositely exports by anti-pleat block 307, obtains anti-pleat sequence; Forward sequence and anti-pleat sequence are subtracted each other by sine function modulation sequence module 308, obtain zero initial phase sine function modulation sequence; Primary vector sequence generating module 309 is multiplied with forward sequence with sine function with reference to the cosine function of frequency respectively, generates the first real sequence vector frequently and the first empty sequence vector frequently; Secondary vector sequence generating module 310 is multiplied with anti-pleat sequence with sine function with reference to the cosine function of frequency respectively, generates the second real sequence vector frequently and the second empty sequence vector frequently; Primary vector trap sequence generating module 311 carries out digital notch to the first real sequence vector frequently and the first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently; Primary vector integrated value generation module 312 carries out integral operation to the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently; Secondary vector trap sequence generating module 313 carries out digital notch to the second real sequence vector frequently and the second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently; Secondary vector integrated value generation module 314 carries out integral operation to the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently; First empty vector product score value frequently and the first real vector product score value frequently, according to the phase transition rule preset, are converted to first phase by phase module 315, and the second empty vector product score value frequently and the second real vector product score value are frequently converted to second phase; First phase and second phase, according to the sequence average initial phase transformation rule preset, are converted to the average initial phase of forward sequence by average initial phase module 316; The amplitude of zero initial phase sine function modulation sequence, according to the average initial phase of forward sequence, is reverted to the amplitude of electric power signal by zero initial phase sinusoidal signal output sequence module 317, obtains zero initial phase sinusoidal signal output sequence.
Known from the above description, the present invention improves accuracy and anti-harmonic wave, the noise of sine parameter calculating.
Wherein, described sample sequence length modules 301, according to the lower limit of frequency power signal scope, default sample frequency and default integer signal period number, obtains the preliminary sample sequence length of described electric power signal;
Described electric power signal is a kind of first-harmonic composition is main sinusoidal signal.Sinusoidal signal is extensively made a comment or criticism string function signal and cosine function signal.
In one embodiment, power system frequency scope at 45Hz-55Hz, power taking force signal lower-frequency limit f
minfor 45Hz; Described default integer signal period number C is set according to actual needs
2 π, preferably, get C
2 πbe 11.
In one embodiment, obtaining described preliminary sample sequence length is formula (1):
In formula, N
startfor described preliminary sample sequence length, unit dimensionless; (int) round numbers is represented; C
2 πfor described default integer signal period number, unit dimensionless; f
minfor the lower limit of described frequency power signal scope, unit Hz; f
nfor described default sample frequency, unit Hz.
Described preliminary sampling module 302 is tentatively sampled to described electric power signal according to described preliminary sample sequence length, obtains the preliminary sample sequence of described electric power signal.
In one embodiment, described electric power signal is the sine function signal of single fundamental frequency, and the preliminary sample sequence obtaining described electric power signal is formula (2):
n=0,1,2,3,...,N
start-1
Wherein, X
startn () is described preliminary sample sequence; A is the amplitude of described electric power signal, unit v; ω is the frequency of described electric power signal, unit rad/s; T
nfor sampling interval, unit s; f
nfor described default sample frequency, unit Hz; N is the series of discrete number of described electric power signal, unit dimensionless;
for the initial phase of described electric power signal, unit rad; N
startfor described preliminary sample sequence length, unit dimensionless.
Described frequency preliminary survey module 303 by zero friendship method, based on filtering algorithm, based on Wavelet Transformation Algorithm, based on neural network algorithm, based on DFT conversion frequency algorithm or based on the frequency algorithm of phase differential, frequency preliminary survey is carried out to described preliminary sample sequence, generate the first synchronizing frequency of described electric power signal.
In one embodiment, generating described just synchronizing frequency is formula (3):
ω
o(3);
Wherein, ω
ofor described just synchronizing frequency, unit rad/s;
Preferably, described reference frequency equals described just synchronizing frequency is formula (4):
ω
s=ω
o(4);
Wherein, ω
sfor reference frequency, unit rad/s; ω
ofor first synchronizing frequency, unit rad/s.
Described unit period sequence length module 304, according to described default sample frequency and described reference frequency, obtains the unit period sequence length of described electric power signal;
In one embodiment, the unit period sequence length obtaining described electric power signal is formula (5):
In formula, N
2 πfor described unit period sequence length, unit dimensionless; (int) round numbers is represented; f
nfor described default sample frequency, unit Hz; f
sfor the reference frequency of Hz unit; ω
sfor the reference frequency of rad/s unit.
There is the error in 1 sampling interval in described unit period sequence length integer.
Described predetermined sequence length modules 305, according to described default integer signal period number and described unit period sequence length, obtains the predetermined sequence length of described electric power signal, requires the corresponding integer signal period number of predetermined sequence length in principle;
In one embodiment, described predetermined sequence length is 11 times of described unit period sequence length, and obtaining described predetermined sequence length is formula (6):
N=(int)(C
2πN
2π)(6);
Wherein, N is described predetermined sequence length, unit dimensionless; (int) round numbers is represented; N
2 πfor described unit period sequence length, unit dimensionless; C
2 πfor described default integer signal period number, unit dimensionless; Owing to there is error, described predetermined sequence length comprises the error that described unit period sequence length integer exists.
Described forward block 306 obtains the forward sequence of described electric power signal from described preliminary sample sequence according to described predetermined sequence length;
In one embodiment, obtaining described forward sequence is formula (7):
n=0,1,2,3,...,N-1(7);
N≤N
start
Wherein, X
in () is forward sequence; X
startn () is preliminary sample sequence; A is signal amplitude, unit v; ω is signal frequency, unit rad/s; T
nfor sampling interval, unit s; N is series of discrete number, unit dimensionless;
for signal initial phase, unit rad; N is forward sequence length, unit dimensionless, and forward sequence length equals described predetermined sequence length; N
startfor preliminary sample sequence length, unit dimensionless.
The avatars of described forward sequence as shown in Figure 2.
Described forward sequence oppositely exports by described anti-pleat block 307, obtains the anti-pleat sequence of answering with described forward sequence pair;
In one embodiment, obtaining anti-pleat sequence is formula (8):
X
-i(-n)=X
i(N-n)=Asin(-ωT
nn+β)(8);
n=0,1,2,3,...,N-1
In formula, X
-i(-n) is anti-pleat sequence; β is anti-pleat sequence initial phase, unit rad.Pass is fastened, and anti-pleat sequence initial phase is the cut-off phase place of forward sequence, i.e. the cut-off phase place of described electric power signal; N is anti-pleat sequence length, unit dimensionless.Anti-pleat sequence length is identical with forward sequence length.
The avatars of described anti-pleat sequence as shown in Figure 2.
Described forward sequence and described anti-pleat sequence are subtracted each other by described sine function modulation sequence module 308, obtain described electric power signal zero initial phase sine function modulation sequence;
In one embodiment, the sine function modulation sequence obtaining zero initial phase is formula (9):
n=0,1,2,3,...,N-1
In formula, X
sinn () is the sine function modulation sequence of zero initial phase;
be the sine function modulation sequence amplitude of zero initial phase, unit v;
be the sine function modulation sequence initial phase of zero initial phase, unit rad;
for the forward sequence initial phase of rad/s unit; β is the anti-pleat sequence initial phase of rad/s unit.
Allow forward sequence initial phase
with the variation range of anti-pleat sequence initial phase β at 0 ~ ± 0.375 π rad.
Because the corresponding integer signal period number of described predetermined sequence length exists error, one of reason is the error that reference frequency error causes, and two of reason is integer errors of described predetermined sequence length.If described error is zero, then described sine function burst initial phase
be zero, on the contrary initial phase
near zero.Described initial phase
it is proportional relation between the error of the error compared with null value and described integer signal period number.
The cosine function of described reference frequency is multiplied with described forward sequence with the sine function of described reference frequency by described primary vector sequence generating module 309 respectively, generates the first real sequence vector frequently and the first empty sequence vector frequently;
In one embodiment, when not considering described mixing interfering frequency composition, obtaining mixing sequence is formula (10):
n=1,2,3,...,N-1
In formula, R
1n () is the first real sequence vector frequently; I
1n () is the first empty sequence vector frequently; N is the forward sequence length of dimensionless unit.
The cosine function of described reference frequency is multiplied with described anti-pleat sequence with the sine function of described reference frequency by described secondary vector sequence generating module 310 respectively, generates the second real sequence vector frequently and the second empty sequence vector frequently;
In one embodiment, when not considering described mixing interfering frequency composition, obtaining mixing sequence is formula (11):
n=1,2,3,...,N-1
In formula, R
2n () is the second real sequence vector frequently; I
2n () is the second empty sequence vector frequently; N is the anti-pleat sequence length of dimensionless unit.
Described primary vector trap sequence generating module 311 carries out digital notch to the described first real sequence vector frequently and the described first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Mixing interfering frequency is comprised in described real sequence vector frequently and described empty sequence vector frequently.When in input signal also at flip-flop, subharmonic composition and subharmonic composition time, described mixing interfering frequency will be more complicated, and these mixing interfering frequencies have a strong impact on accuracy in computation.Although window function and integral operation itself have good attenuation to mixing interfering frequency, do not have specific aim, can not produce the inhibiting effect of the degree of depth to the mixing interfering frequency of described complexity, the pin-point accuracy that can not meet sine parameter calculates needs.
In order to suppress the impact of described mixing interfering frequency targetedly, adopt a kind of digital trap, ideally, the null Frequency point just in time corresponding described mixing interfering frequency point of digital trap, has inhibiting effect completely to described mixing interfering frequency.Preferably, digital notch specifically adopts arithmetic mean notch algorithm, is added, then gets its arithmetic mean and export as this trap value by several continuous discrete values.Digital notch needs to arrange digital notch parameter, and described digital notch parameter refers to the length N that several continuous discrete values are added
d.In digital notch Parameter N
dvalue is 1.5 times of signal unit periodic sequence length, can suppress the mixing interfering frequency that 1/3 subharmonic produces.And N
dvalue is 2 times of signal unit periodic sequence length, can to direct current, 1/2 gradation, 1 time, 2 times, 3 times, 4 times, the mixing interfering frequency that produces such as 5 subharmonic suppresses.Therefore, digital notch is made up of the digital trap of 2 kinds of parameters, considers the factors such as physical presence error, in order to the degree of depth suppresses the impact of mixing interfering frequency, the digital trap of often kind of parameter forms by the three stages of digital traps that parameter is identical, and totally six grades of arithmetic mean digital notch formed.
In one embodiment, six grades of arithmetic mean digital notch formulas can be formula (12):
To X (n) n=0,1,2,3 ..., N-1
To X
d(n) n=0,1,2,3 ..., N-3N
d1-3N
d2-1
Wherein, X (n) is digital notch list entries, sequence length N; X
dn () is digital notch output sequence, sequence length N-3N
d1-3N
d2; N
d1for notch parameter 1, namely discrete value is added quantity continuously; N
d2for notch parameter 2, namely discrete value is added quantity continuously.
In one embodiment, notch parameter N
d1value is 1.5 times of the unit period sequence length of described reference frequency, notch parameter N
d2value is 2 times of the unit period sequence length of described reference frequency, and six grades of arithmetic mean digital notch need use 10.5 times of signal unit periodic sequence length.
In one embodiment, under described mixing interfering frequency composition is suppressed prerequisite completely, the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence are frequently (13):
To R
1(n) I
1(n) n=0,1,2,3 ..., N-1
To R
d1(n) I
d1(n) n=0,1,2,3 ..., N-3N
d1-3N
d2-1
Wherein, R
d1n () is the described first real vectorial trap sequence frequently; I
d1n () is the described first empty vectorial trap sequence frequently; K (Ω) is for digital notch is in the dimensionless gain of frequency difference Ω; α (Ω) is for digital filtering is in the rad unit phase shift of frequency difference Ω.
Described primary vector integrated value generation module 312 carries out integral operation to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently;
In one embodiment, integral operation length is 0.5 times of described signal period sequence length;
In one embodiment, generate the first real vector product score value frequently and the first empty vector product score value frequently, be formula (14):
n=0,1,2,3,...,L1-1
L1=N-3N
D1-3N
D2
Wherein, R
1it is the first real vector product score value frequently; I
1it is the first empty vector product score value frequently; L1 is integral and calculating length 1, unit dimensionless, and L1 is 0.5 times of signal period sequence length.
Described secondary vector trap sequence generating module 313 carries out digital notch to the described second real sequence vector frequently and the described second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
In one embodiment, under described mixing interfering frequency composition is suppressed prerequisite completely, the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence are frequently formula (15):
To R
2(n) I
2(n) n=0,1,2,3 ...., N-1
To R
d2(n) I
d2(n) n=0,1,2,3 ...., N-3N
d1-3N
d2-1
Wherein, R
d2n () is the described second real vectorial trap sequence frequently; I
d2n () is the described second empty vectorial trap sequence frequently; K (Ω) is for digital notch is in the dimensionless gain of frequency difference Ω; α (Ω) is for digital filtering is in the rad unit phase shift of frequency difference Ω.
Described secondary vector integrated value generation module 314 carries out integral operation to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently;
In one embodiment, integral operation length is 0.5 times of described signal period sequence length;
In one embodiment, generate the second real vector product score value frequently and the second empty vector product score value frequently, be formula (16):
n=0,1,2,3,...,L2-1
L2=N-3N
D1-3N
D2
Wherein, R
2it is the second real vector product score value frequently; I
2it is the second empty vector product score value frequently; L2 is integral and calculating length 2, unit dimensionless, and L2 is 0.5 times of signal period sequence length.
Described phase module 315 is according to the phase transition rule preset, described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
In one embodiment, by following formula (17)-(18), the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase:
Wherein, PH
1for first phase, unit rad; R
1it is the first real vector product score value frequently; I
1be the first empty vector product score value frequently, PH
2for second phase, unit rad; R
2it is the second real vector product score value frequently; I
2it is the second empty vector product score value frequently.
In one embodiment, according to the phase transition rule preset, described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the step that the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase are comprised:
Obtain the first ratio of the described first real vector product score value frequently and the described first empty vector product score value frequently and the second ratio of the described second real vector product score value frequently and the described second empty vector product score value frequently;
Obtain the arctan function value of described first ratio, generate described first phase, obtain the arctan function value of described second ratio, generate described second phase.
Described first phase and described second phase, according to the sequence average initial phase transformation rule preset, are converted to the average initial phase of described forward sequence by described average initial phase module 316;
In one embodiment, by following formula (19), described first phase and described second phase are converted to the average initial phase of described forward sequence:
Wherein, PH
0for the average initial phase of forward sequence, unit rad; PH
1for first phase, unit rad; PH
2for second phase, unit rad.
The average initial phase of described forward sequence is the mean value of described forward sequence initial phase and described anti-pleat sequence initial phase.
Described zero initial phase sinusoidal signal output sequence module 317 is according to the average initial phase of described forward sequence, the amplitude of described electric power signal zero initial phase sine function modulation sequence is reverted to the amplitude of described electric power signal, obtain zero initial phase sinusoidal signal output sequence of described electric power signal;
In one embodiment, by following formula (20), the amplitude of the sine function modulation sequence of described electric power signal zero initial phase is reverted to the amplitude of described electric power signal:
n=0,1,2,3,...,N-1
In formula, X
outn () is described zero initial phase sinusoidal signal output sequence, N is described forward sequence length, and described forward sequence length equals described predetermined sequence length.
Obtain sine function modulation sequence, solve the impact that burst initial phase changes greatly problem, sine function burst carries the larger burst all phase difference information of numerical value simultaneously, improves accuracy and anti-harmonic wave, the noise of sine parameter calculating.
Each technical characteristic of the above embodiment can combine arbitrarily, for making description succinct, the all possible combination of each technical characteristic in above-described embodiment is not all described, but, as long as the combination of these technical characteristics does not exist contradiction, be all considered to be the scope that this instructions is recorded.
The above embodiment only have expressed several embodiment of the present invention, and it describes comparatively concrete and detailed, but can not therefore be construed as limiting the scope of the patent.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (10)
1. electric power signal is converted to a method for zero initial phase sinusoidal signal sequence, it is characterized in that, comprise the following steps:
According to the lower limit of frequency power signal scope, default sample frequency and default integer signal period number, obtain the preliminary sample sequence length of described electric power signal;
According to described preliminary sample sequence length, described electric power signal is tentatively sampled, obtain the preliminary sample sequence of described electric power signal;
Frequency preliminary survey is carried out to described preliminary sample sequence, generates the first synchronizing frequency of described electric power signal, and according to described preliminary frequency setting the reference frequency of electric power signal;
According to described default sample frequency and described reference frequency, obtain the unit period sequence length of described electric power signal;
According to described default integer signal period number and described unit period sequence length, obtain the predetermined sequence length of described electric power signal;
From described preliminary sample sequence, the forward sequence of described electric power signal is obtained according to described predetermined sequence length;
Described forward sequence is oppositely exported, obtains the anti-pleat sequence of answering with described forward sequence pair;
Described forward sequence and described anti-pleat sequence are subtracted each other, obtains described electric power signal zero initial phase sine function modulation sequence;
Respectively the cosine function of described reference frequency is multiplied with described forward sequence with the sine function of described reference frequency, generates the first real sequence vector frequently and the first empty sequence vector frequently;
Respectively the cosine function of described reference frequency is multiplied with described anti-pleat sequence with the sine function of described reference frequency, generates the second real sequence vector frequently and the second empty sequence vector frequently;
Respectively digital notch is carried out to the described first real sequence vector frequently and the described first empty sequence vector frequently, generate the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Respectively integral operation is carried out to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently, generate the first real vector product score value frequently and the first empty vector product score value frequently;
Respectively digital notch is carried out to the described second real sequence vector frequently and the described second empty sequence vector frequently, generate the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Respectively integral operation is carried out to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently, generate the second real vector product score value frequently and the second empty vector product score value frequently;
According to the phase transition rule preset, the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
According to the sequence average initial phase transformation rule preset, described first phase and described second phase are converted to the average initial phase of described forward sequence;
According to the average initial phase of described forward sequence, the amplitude of described electric power signal zero initial phase sine function modulation sequence is reverted to the amplitude of described electric power signal, obtain zero initial phase sinusoidal signal output sequence of described electric power signal.
2. method electric power signal being converted to zero initial phase sinusoidal signal sequence according to claim 1, it is characterized in that, described electric power signal is the sine function signal of single fundamental frequency, according to expression formula
obtain described preliminary sample sequence X
start(n), wherein
n=0,1,2,3 ..., N
start-1, A is the amplitude of described electric power signal, and ω is the frequency of described electric power signal, and n is the series of discrete number of described electric power signal,
for the initial phase of described electric power signal, T
nfor sampling interval, f
nfor described default sample frequency, N
startfor described preliminary sample sequence length.
3. method electric power signal being converted to zero initial phase sinusoidal signal sequence according to claim 1, is characterized in that, according to expression formula N=(int) (C
2 πn
2 π) obtain described predetermined sequence length N, wherein (int) represents round numbers, C
2 πfor described default integer signal period number, N
2 πfor described unit period sequence length.
4. method electric power signal being converted to zero initial phase sinusoidal signal sequence according to claim 2, it is characterized in that, according to the phase transition rule preset, described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the step that the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase are comprised:
Obtain the first ratio of the described first real vector product score value frequently and the described first empty vector product score value frequently and the second ratio of the described second real vector product score value frequently and the described second empty vector product score value frequently;
Obtain the arctan function value of described first ratio, generate described first phase, obtain the arctan function value of described second ratio, generate described second phase.
5. method electric power signal being converted to zero initial phase sinusoidal signal sequence according to claim 2, is characterized in that, according to expression formula
obtain described zero initial phase sinusoidal signal output sequence X
out(n), wherein
x
sinn () is described electric power signal zero initial phase sine function modulation sequence, PH
0for the average initial phase of described forward sequence, A is the amplitude of described electric power signal,
for described forward sequence initial phase, β is described anti-pleat sequence initial phase, and ω is the frequency of described electric power signal,
n=0,1,2,3 ..., N-1, n are the series of discrete number of described electric power signal, T
nfor sampling interval, f
nfor described default sample frequency, N is described forward sequence length, and described forward sequence length equals described predetermined sequence length, PH
1for described first phase, PH
2for described second phase.
6. electric power signal is converted to a system for zero initial phase sinusoidal signal sequence, it is characterized in that, comprising:
Sample sequence length modules, for the lower limit according to frequency power signal scope, presets sample frequency and default integer signal period number, obtains the preliminary sample sequence length of described electric power signal;
Preliminary sampling module, for tentatively sampling to described electric power signal according to described preliminary sample sequence length, obtains the preliminary sample sequence of described electric power signal;
Frequency preliminary survey module, for carrying out frequency preliminary survey to described preliminary sample sequence, generates the first synchronizing frequency of described electric power signal, and according to described preliminary frequency setting the reference frequency of electric power signal;
Unit period sequence length module, for according to described default sample frequency and described reference frequency, obtains the unit period sequence length of described electric power signal;
Predetermined sequence length modules, for according to described default integer signal period number and described unit period sequence length, obtains the predetermined sequence length of described electric power signal;
Forward block, for obtaining the forward sequence of described electric power signal from described preliminary sample sequence according to described predetermined sequence length;
Anti-pleat block, for described forward sequence oppositely being exported, obtains the anti-pleat sequence of answering with described forward sequence pair;
Sine function modulation sequence module, for described forward sequence and described anti-pleat sequence being subtracted each other, obtains described electric power signal zero initial phase sine function modulation sequence;
Primary vector sequence generating module, for being multiplied with described forward sequence with the sine function of described reference frequency by the cosine function of described reference frequency respectively, generates the first real sequence vector frequently and the first empty sequence vector frequently;
Secondary vector sequence generating module, for being multiplied with described anti-pleat sequence with the sine function of described reference frequency by the cosine function of described reference frequency respectively, generates the second real sequence vector frequently and the second empty sequence vector frequently;
Primary vector trap sequence generating module, for carrying out digital notch to the described first real sequence vector frequently and the described first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Primary vector integrated value generation module, for carrying out integral operation to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently;
Secondary vector trap sequence generating module, for carrying out digital notch to the described second real sequence vector frequently and the described second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Secondary vector integrated value generation module, for carrying out integral operation to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently;
Phase module, for regular according to the phase transition preset, described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
Average initial phase module, for according to the sequence average initial phase transformation rule preset, is converted to the average initial phase of described forward sequence by described first phase and described second phase;
Zero initial phase sinusoidal signal output sequence module, for the average initial phase according to described forward sequence, the amplitude of described electric power signal zero initial phase sine function modulation sequence is reverted to the amplitude of described electric power signal, obtain zero initial phase sinusoidal signal output sequence of described electric power signal.
7. system electric power signal being converted to zero initial phase sinusoidal signal sequence according to claim 6, is characterized in that, described electric power signal is the sine function signal of single fundamental frequency, and described preliminary sampling module is according to expression formula
obtain described preliminary sample sequence X
start(n), wherein
n=0,1,2,3 ..., N
start-1, A is the amplitude of described electric power signal, and ω is the frequency of described electric power signal, and n is the series of discrete number of described electric power signal,
for the initial phase of described electric power signal, T
nfor sampling interval, f
nfor described default sample frequency, N
startfor described preliminary sample sequence length.
8. system electric power signal being converted to zero initial phase sinusoidal signal sequence according to claim 6, it is characterized in that, described predetermined sequence length modules is according to expression formula N=(int) (C
2 πn
2 π) obtain described predetermined sequence length N, wherein (int) represents round numbers, C
2 πfor described default integer signal period number, N
2 πfor described unit period sequence length.
9. system electric power signal being converted to zero initial phase sinusoidal signal sequence according to claim 7, it is characterized in that, described phase module obtains the first ratio of the described first real vector product score value frequently and the described first empty vector product score value frequently and the second ratio of the described second real vector product score value frequently and the described second empty vector product score value frequently; Obtain the arctan function value of described first ratio, generate described first phase, obtain the arctan function value of described second ratio, generate described second phase.
10. system electric power signal being converted to zero initial phase sinusoidal signal sequence according to claim 7, is characterized in that, described zero initial phase sinusoidal signal output sequence module is according to expression formula
obtain described zero initial phase sinusoidal signal output sequence X
out(n), wherein
x
sinn () is described electric power signal zero initial phase sine function modulation sequence, PH
0for the average initial phase of described forward sequence, A is the amplitude of described electric power signal,
for described forward sequence initial phase, β is described anti-pleat sequence initial phase, and ω is the frequency of described electric power signal,
n=0,1,2,3 ..., N-1, n are the series of discrete number of described electric power signal, T
nfor sampling interval, f
nfor described default sample frequency, N is described forward sequence length, and described forward sequence length equals described predetermined sequence length, PH
1for described first phase, PH
2for described second phase.
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