CN105140297A - Thin film transistor and preparation method thereof, array substrate, and display apparatus - Google Patents

Abstract

The invention relates to the field of display technology, in particular to a thin film transistor, a preparation method thereof, an array substrate and a display device. A thin film transistor, comprising a gate electrode, a source electrode, a drain electrode and a drain electrode lead, the source electrode is formed by connecting N first curved structures, and the drain electrode is formed by connecting N-1 second curved structures, the The source electrode and the drain electrode are arranged opposite each other, the drain electrode leads are connected to the drain electrode, and the number of the drain electrode leads is (1˜N−1). The thin film transistor adopts N curved structures connected as a whole as the drain electrode, so only (1 to N-1) drain electrode leads can be used to connect the drain electrode, reducing the number of drain electrode leads and lead grooves, reducing the The total width of the lead groove not only ensures a larger charging current, but also achieves the effect of reducing the light leakage of the TFT.

Description

Thin film transistor and its preparation method, array substrate and display device

technical field

The invention relates to the field of display technology, in particular to a thin film transistor, a preparation method thereof, an array substrate and a display device.

Background technique

An existing wide viewing angle display device is an Advanced Super Dimension Switching Technology (ADvanced SuperDimensionSwitch, referred to as: ADSDS) display device, the structure of which is to sequentially deposit a common electrode, a gate electrode, a gate insulating layer, an active layer, The source and drain electrodes, the second insulating layer, and the pixel electrode form a potential difference between the control pixel electrode and the common electrode to realize horizontal electric field driving, thereby realizing display.

In the existing array substrate structure, an active layer is provided between the source-drain electrodes and the gate. When the pixel size is relatively large, in order to meet the charging current requirements, it is necessary to use thin-film transistors (ThinFilmTransistor, TFT for short). The structure was improved, so a new TFT came into being. As shown in Figure 1, the source electrode 3 in the thin film transistor is designed to be composed of two curved structures similar to "U", and the drain electrode 4 is composed of It is composed of two parallel straight segments, and each straight segment is located in the opening area of a "U"-shaped curved structure. Each straight line segment of the drain electrode 4 is connected to a drain electrode lead 5 , and the drain electrode lead 5 is another straight line segment arranged coaxially with the straight line segment of the drain electrode 4 and wider than the straight line segment of the drain electrode 4 . Therefore, one ends of the two drain electrode leads 5 are respectively connected to a straight line segment of the drain electrode 4 , and the other ends are led out from the region of the gate electrode 2 .

The above TFT structure inevitably has the following problems in practical applications:

The structure of the drain electrode 4 is two straight line segments, and each straight line segment must be connected to a drain electrode lead 5 to be connected as a whole. The number of the drain electrode lead 5 is equal to the number of the straight line segments; correspondingly, in order to lead out all the drain electrode lead wires 5. A corresponding number of lead grooves need to be opened on the gate electrode 2 . However, the lead grooves will cause light leakage to some extent, because the size of the light leakage is positively correlated with the total width of the lead grooves opened on the gate electrode 2, therefore, with the increase of the number of lead grooves, it is inevitable Grounding will aggravate the light leakage phenomenon and affect the display effect.

It can be seen that it is an urgent technical problem to design a thin-film transistor with fewer drain electrode leads and lead grooves, so that the total width of the lead grooves is smaller and the light leakage is less.

Contents of the invention

The purpose of the present invention is to address the shortcomings of the above-mentioned prior art, and provide a thin film transistor and its preparation method, an array substrate and a display device, which can effectively reduce the light leakage of TFT.

The technical solution adopted to solve the technical problem of the present invention is that the thin film transistor includes a gate electrode, a source electrode, a drain electrode and a drain electrode lead, wherein the source electrode is formed by connecting N first curved structures, and the first curved The structure includes a first curved section and a first straight section and a second straight section respectively connected to two ends of the first curved section,

The first straight line segment/the second straight line segment of the first curved structure is connected to the second straight line segment/the first straight line segment of the adjacent first curved structure in an overlapping manner, forming the source electrode,

The drain electrode is formed by connecting N-1 second curved structures, and the second curved structure includes a second curved segment and a third straight segment and a fourth straight segment respectively connected to both ends of the second curved segment, so The drain electrode lead is connected to the second curve segment,

The part where the second straight line segment and the first straight line segment are connected in a coincident manner corresponds to the second curved line segment, and the third straight line segment and the fourth straight line segment correspond to the first curved line segment .

Preferably, the length of the first straight segment of the first first curved structure is greater than the length of the second straight segment, and the length of the second straight segment of the Nth first curved structure is is greater than the length of the first straight line segment, and the length of the other first straight line segment is equal to the length of the second straight line segment.

Preferably, the length of the third straight line segment is equal to the length of the fourth straight line segment.

Preferably, the number of drain electrode leads is M, where: 1≤M≤N-1.

Preferably, when M=N-1, the drain electrode lead is connected to the second curve segment in one-to-one correspondence; when 1<M<N-1, the drain electrode lead is connected to the second curve segment Segments are connected at intervals; when M=1, the drain electrode lead is connected to one of the second curve segments.

Preferably, N≥2, when N>2, the third straight segment/the fourth straight segment of the second curved structure and the fourth straight segment adjacent to the second curved structure /The third straight line segments are connected in an overlapping manner to form the drain electrode.

Preferably, it also includes a substrate, the gate electrode is located on the substrate, the source electrode and the drain electrode are arranged away from the substrate relative to the gate electrode, and the source electrode and the drain electrode are the same layer settings.

Preferably, a substrate is also included, the source electrode and the drain electrode are located on the substrate, the source electrode and the drain electrode are arranged on the same layer, and the gate electrode is opposite to the source electrode and the drain electrode away from the substrate.

An array substrate, including the above-mentioned thin film transistor.

A display device includes the above-mentioned array substrate.

A method for preparing a thin film transistor. The thin film transistor includes a gate electrode, a source electrode, a drain electrode, and a drain electrode lead, and the source electrode is formed by connecting N first curved structures, and the first curved structure includes a first curve segment and a first straight line segment and a second straight line segment respectively connected to both ends of the first curved line segment,

The first straight line segment/the second straight line segment of the first curved structure is connected to the second straight line segment/the first straight line segment of the adjacent first curved structure in an overlapping manner, forming the source electrode,

The drain electrode is formed by connecting N-1 second curved structures, and the second curved structure includes a second curved segment and a third straight segment and a fourth straight segment respectively connected to both ends of the second curved segment, so The drain electrode lead is connected to the second curve segment,

The part where the second straight line segment and the first straight line segment are connected in a coincident manner corresponds to the second curved line segment, and the third straight line segment and the fourth straight line segment correspond to the first curved line segment ;

The source electrode and the drain electrode are formed by using the same half-tone mask or gray-tone mask.

The technical effect of the present invention is: the thin film transistor adopts N curved structures connected into a whole as the drain electrode, so only (1-N-1) drain electrode leads can be used to connect the drain electrode, reducing the number of drain electrode leads and lead wires. The number of grooves reduces the total width of lead grooves, which not only ensures a larger charging current, but also achieves the effect of reducing light leakage of TFT.

Description of drawings

FIG. 1 is a schematic structural diagram of an existing thin film transistor;

2 is a schematic structural diagram when the number of drain electrode leads in the thin film transistor in Embodiment 1 of the present invention is 3;

Fig. 3 is a partially enlarged view including a first curved structure and a second curved structure in Fig. 2;

4 is a schematic structural diagram when the number of drain electrode leads in the thin film transistor in Embodiment 1 of the present invention is 2;

5 is a schematic structural diagram of a thin film transistor in Embodiment 2 of the present invention;

Wherein, reference sign is:

1-active layer; 2-gate electrode;

3-source electrode; 31-first curved structure; 311-first straight line segment; 312-first curved line segment; 313-second straight line segment;

4-drain electrode; 41-second curved structure; 411-third straight section; 412-second curved section; 413-fourth straight section;

5- Drain electrode lead.

Detailed ways

In order to enable those skilled in the art to better understand the technical solutions of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

Example 1:

This embodiment provides a thin film transistor, which adopts N (N>2) curved structures connected as a whole as the drain electrode, and then uses (1-N-1) drain electrode leads to connect with the drain electrode, which can effectively reduce the number of drain electrodes. The number of leads and lead grooves reduces the total width of the lead grooves, thereby reducing the influence of light leakage of the TFT.

The specific structure of the thin film transistor is shown in Fig. 2 and Fig. 3, including a gate electrode 2, a source electrode 3, a drain electrode 4 and a drain electrode lead 5, wherein the source electrode 3 is formed by connecting N first curved structures 31, and the first The curved structure 31 includes a first curved section 312 and a first straight section 311 and a second straight section 313 respectively connected to two ends of the first curved section 312 .

The second straight segment 313 of the first first curved structure 31 located on the leftmost side is connected to the first straight segment 311 of the adjacent second first curved structure 31 in a coincident manner, and the second first curved structure The second straight line segment 313 of 31 is connected with the first straight line segment 311 of the adjacent third first curved structure 31 in a coincident manner, and is connected in a loop until the N-1 (N>2) first curved structure The second straight line segment 313 of 31 is connected to the first straight line segment 311 of the Nth first curved structure 31 located on the far right in a coincident manner, thereby forming the source electrode 3 .

Similar to the structure of the source electrode 3, the drain electrode 4 is formed by connecting N-1 second curved structures 41. The second curved structure 41 includes a second curved segment 412 and a third straight segment connected to both ends of the second curved segment 412. 411 and the fourth straight line segment 413 .

The fourth straight segment 413 of the first second curved structure 41 on the leftmost side is connected to the third straight segment 411 of the second adjacent second curved structure 41 in a coincident manner, and the second second curved structure The fourth straight line segment 413 of 41 is connected with the third straight line segment 411 of the third adjacent second curved structure 41 in a coincident manner, and thus circularly connected until the fourth straight line segment 413 of the N-2 second curved structure 41 The segment 413 is connected to the third straight segment 411 of the N−1 th second curved structure 41 on the rightmost side in a coincident manner, so as to form the drain electrode 4 .

The source electrode 3 and the drain electrode 4 are arranged in pairs, and the part where the second straight line segment 313 and the first straight line segment 311 in the source electrode 3 are connected in an overlapping manner corresponds to the second curved line segment 412 in the drain electrode 4; the drain electrode 4 The third straight line segment 411 and the fourth straight line segment 413 in correspond to the first curved line segment 312 in the source electrode 3 .

In order to make the effect of matching the source electrode 3 and the drain electrode 4 better, preferably, the length of the first straight line segment 311 of the first leftmost first curved structure 31 in the source electrode 3 is longer than the length of the second The length of the straight line segment 313; the length of the second straight line segment 313 of the rightmost Nth first curved structure 31 is greater than the length of the first straight line segment 311, and the first straight line segment 311 and the other first curved structure 31 include The lengths of the second straight line segments 313 are equal. In this way, the shapes of the leftmost first curved structure 31 and the rightmost Nth first curved structure 31 in the source electrode 3 are similar to a "J" shape, and the shapes of other first curved structures 31 are similar to In the "U" shape, compared with arranging all the first curved structures 31 in the same "U" shape, the effect of arranging the source electrode 3 and the drain electrode 4 in opposition is better.

Correspondingly, in order to simplify the structure of the drain electrode 4 , preferably, the length of all the third straight line segments 411 in the drain electrode 4 is equal to the length of the fourth straight line segment 413 .

The orthographic projections of the source electrode 3 and the drain electrode 4 both fall within the area where the active layer 1 is located. In terms of specific structure, the structure of the drain electrode lead 5 is a straight line segment, and it is connected to the side of the second curve segment 412 of the drain electrode 4 that is away from the opening direction of the second curved structure 41, and the straight line segment serving as the drain electrode lead 5 has a smaller width. The straight line segments that are large and coincide with two adjacent first curved structures 31 are basically located on the same straight line. At the same time, the drain electrode lead 5 is led out through the lead groove on the gate electrode 2 . Because all the second curved structures 41 forming the drain electrode 4 are connected sequentially to form a whole, therefore, the value range of the number M of the drain electrode leads 5 can be 1≤M≤N-1, and the corresponding number of lead grooves equal to the number of drain electrode leads 5 .

When the number of drain electrode leads 5 is M=N-1, the drain electrode leads 5 are connected to all the second curved structures 41 of the drain electrode 4 in one-to-one correspondence; for example, as shown in FIG. 2, if N=4, then M=3, That is, the number of first curved structures 31 is four, the number of second curved structures 41 is three, and the number of drain electrode leads 5 and the number of lead grooves are both three. In this way, compared with the solution in the prior art, one lead groove is reduced in the structure of this thin film transistor, and the total width of the lead groove is correspondingly reduced, so that the light leakage of the TFT will also be reduced.

When the value of the number M of the drain electrode leads 5 is 1<M<N-1, the drain electrode leads 5 are connected to the second curve segment 412 in the drain electrode 4 at intervals; for example, as shown in FIG. 4, N=4, Then M=3, that is, the number of first curved structures 31 is 4, the number of second curved structures 41 is 3, the number of drain electrode leads 5 and the number of lead grooves are both 2, and the two drain electrode leads 5 are respectively It is connected to the leftmost and rightmost second curved structures 41 with a second curved structure 41 in between. In this way, compared with the solution in the prior art, two lead grooves are reduced in the structure of this thin film transistor, and the total width of the lead groove is correspondingly reduced, so that the light leakage of the TFT will also be reduced.

When the number of the drain electrode lead 5 is 1, the drain electrode lead 5 can be connected to any second bending structure 41, preferably, the drain electrode lead 5 is connected to the second bending structure 41 at the middle position. superior. The number of the first bending structure 31 and the number of the second bending structure 41 can be selected in various ways, which is not limited here. Correspondingly, only one lead wire groove needs to be provided. In this way, compared with the solutions in the prior art, N-2 lead grooves are reduced in the structure of this kind of thin film transistor, and the total width of the lead grooves is also greatly reduced accordingly, which not only ensures a larger charging current, but also The light leakage of TFT will also be greatly reduced.

Correspondingly, in the manufacturing method of the thin film transistor in this embodiment, for the source electrode formed by connecting N first curved structures and the drain electrode formed by connecting N-1 second curved structures, a half-tone mask can be used. A half tone mask (HTM for short) or a gray tone mask (GTM for short) forms the active layer and the source and drain electrode patterns. In this way, the orthographic projections of the source electrode 3 and the drain electrode 4 both fall within the area where the active layer 1 is located.

This embodiment also provides an array substrate using any one of the above thin film transistors, and the array substrate has better performance.

Example 2:

This embodiment provides a thin film transistor. The design concept of the thin film transistor is the same as that of the thin film transistor in embodiment 1. The only difference between the two is: as shown in FIG. 5 , the source electrode 3 of the thin film transistor Only two first curved structures 31 are included, and the drain electrode 4 only includes one second curved structure 41 . Correspondingly, the number of drain electrode leads 5 and lead grooves is one.

Other structures of the thin film transistor in this embodiment are the same as those in Embodiment 1, and will not be repeated here.

In this way, compared with the solution in the prior art, one lead groove is reduced in the structure of the thin film transistor in this embodiment, and the total width of the lead groove is correspondingly reduced, so that the light leakage of the TFT will also be reduced.

This embodiment also provides an array substrate using the thin film transistor described above, and the array substrate has better performance.

The thin film transistors in Embodiment 1 and Embodiment 2 achieve the effect of reducing the number of drain electrode leads and lead grooves by improving the shape and structure of the source electrode, drain electrode and gate electrode.

It is easy to understand that the above improvement scheme can be applied to the structure of the bottom-gate thin film transistor. In the structure of the bottom-gate thin film transistor, the gate electrode and the common electrode are arranged on the substrate, and the common electrode is separated from the gate electrode; the gate insulating layer is formed on the gate electrode and covers the entire substrate; the source electrode and the drain electrode are opposite to each other. The gate electrode is arranged away from the substrate, and the source electrode and the drain electrode are arranged on the same layer; the active layer and the source and drain electrodes are sequentially formed on the gate insulating layer. The structure of the source electrode and the drain electrode can adopt any one of the structure of the source electrode and the drain electrode in Embodiment 1 and Embodiment 2, which can reduce the number of drain electrode leads and lead grooves accordingly; The insulating layer is formed on the insulating layer through the mask plate of the insulating layer; the pixel electrode is formed on the insulating layer in a comb structure, and is connected to the drain electrode of the source and drain electrodes through the via hole.

The above improvement scheme can also be applied to the structure of the top-gate thin film transistor. In the structure of the top-gate thin film transistor, the source electrode and the drain electrode are arranged on the same layer on the substrate, and the gate electrode is arranged opposite to the source electrode and the drain electrode. It is arranged away from the substrate; correspondingly, the order of other layer structures is adjusted, which will not be repeated here.

Example 3:

This embodiment provides a display device, which includes any one of the array substrates in Embodiment 1 or Embodiment 2.

The display device may be any product or component with a display function such as a liquid crystal display panel, electronic paper, OLED panel, mobile phone, tablet computer, television, monitor, notebook computer, digital photo frame, navigator, etc.

In the thin film transistor of the present invention, N (N ≥ 2) curved structures are used as a whole to be connected as a drain electrode, and (1 to N-1) drain electrode leads are connected to the drain electrode, thereby reducing the drain electrode lead and The number of lead grooves and the reduction of the total width of the lead grooves not only ensure a large charging current, but also achieve the effect of reducing the light leakage of TFT; at the same time, it also provides support for the preparation of array substrates and display devices with less light leakage. guaranteed.

It can be understood that, the above embodiments are only exemplary embodiments adopted for illustrating the principle of the present invention, but the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also regarded as the protection scope of the present invention.

Claims (11)

1. a thin-film transistor, comprise gate electrode, source electrode, drain electrode and drain electrode lead-in wire, it is characterized in that, described source electrode is connected to form by N number of first warp architecture, described first warp architecture comprises the first curved section and is connected to the first straightway and second straightway at described first curved section two ends

Described first straightway/described second straightway of described first warp architecture is connected in the mode overlapped with described second straightway/described first straightway of adjacent described first warp architecture, forms described source electrode,

Described drain electrode is connected to form by N-1 the second warp architecture, described second warp architecture comprises the second curved section and is connected to the 3rd straightway and the 4th straightway at described second curved section two ends, described drain electrode lead-in wire is connected with described second curved section

Described second straightway correspond to described second curved section with described first straightway with the part that the mode overlapped is connected, and described 3rd straightway and described 4th straightway correspond to described first curved section.

2. thin-film transistor according to claim 1, it is characterized in that, the length of described first straightway of first described first warp architecture is greater than the length of described second straightway, the length of described second straightway of N number of described first warp architecture is greater than the length of described first straightway, and the first straightway described in other is equal with the length of described second straightway.

3. thin-film transistor according to claim 1, it is characterized in that, the length of described 3rd straightway equals the length of described 4th straightway.

4. thin-film transistor according to claim 1, is characterized in that, the quantity of described drain electrode lead-in wire is M, wherein: 1≤M≤N-1.

5. thin-film transistor according to claim 4, is characterized in that, as M=N-1, described drain electrode lead-in wire connects one to one with described second curved section; As 1 < M < N-1, described drain electrode lead-in wire and described second curved section interval are connected; As M=1, described drain electrode lead-in wire is connected on described second curved section.

6. according to the arbitrary described thin-film transistor of claim 1-5, it is characterized in that, N >=2, as N>2, described 3rd straightway/described 4th straightway of described second warp architecture is connected in the mode overlapped with described 4th straightway/described 3rd straightway of adjacent described second warp architecture, forms described drain electrode.

7. thin-film transistor according to claim 1, it is characterized in that, also comprise substrate, described gate electrode is positioned on described substrate, described source electrode and described drain electrode are arranged away from described substrate relative to described gate electrode, and described source electrode and described drain electrode are arranged with layer.

8. thin-film transistor according to claim 1, it is characterized in that, also comprise substrate, described source electrode and described drain electrode are positioned on described substrate, described source electrode and described drain electrode are arranged with layer, and described gate electrode is arranged away from described substrate relative to described source electrode and described drain electrode.

9. an array base palte, is characterized in that, comprises the arbitrary described thin-film transistor of claim 1 to 8.

10. a display unit, is characterized in that, comprises array base palte described in claim 9.

The preparation method of 11. 1 kinds of thin-film transistors, thin-film transistor comprises gate electrode, source electrode, drain electrode and drain electrode lead-in wire, it is characterized in that, described source electrode is connected to form by N number of first warp architecture, described first warp architecture comprises the first curved section and is connected to the first straightway and second straightway at described first curved section two ends

Described first straightway/described second straightway of described first warp architecture is connected in the mode overlapped with described second straightway/described first straightway of adjacent described first warp architecture, forms described source electrode,

Described drain electrode is connected to form by N-1 the second warp architecture, described second warp architecture comprises the second curved section and is connected to the 3rd straightway and the 4th straightway at described second curved section two ends, described drain electrode lead-in wire is connected with described second curved section

Described second straightway correspond to described second curved section with described first straightway with the part that the mode overlapped is connected, and described 3rd straightway and described 4th straightway correspond to described first curved section;

Described source electrode and described drain electrode adopt same intermediate tone mask plate or gray tone mask plate to be formed.