CN105070645A - Method of avoiding peeling defect source of wafer edge aluminum and device - Google Patents
Method of avoiding peeling defect source of wafer edge aluminum and device Download PDFInfo
- Publication number
- CN105070645A CN105070645A CN201510430121.4A CN201510430121A CN105070645A CN 105070645 A CN105070645 A CN 105070645A CN 201510430121 A CN201510430121 A CN 201510430121A CN 105070645 A CN105070645 A CN 105070645A
- Authority
- CN
- China
- Prior art keywords
- aluminium
- wafer
- crystal
- deposition
- crystal edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02021—Edge treatment, chamfering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02019—Chemical etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
The invention discloses a method of avoiding a peeling defect source of wafer edge aluminum and a device. A masking cover is arranged in a technological cavity, masking protection is carried out on a middle region on the surface of a wafer deposited with an aluminum thin film, a physical vapor deposition method is used for depositing an aluminum thin film etching blocking layer at the wafer edge, the wafer edge aluminum thin film can be prevented from being etched to generate a peeling source later, the peeling defect source is eliminated fundamentally, a guarantee is provided for online defect removal, and yield guarantee is provided for mass wafer generation.
Description
Technical field
The present invention relates to the defect Sources controlling method in integrated circuit fabrication process field, more specifically, relate to a kind of utilize crystal edge Physical Vapor Deposition Films to avoid aluminium scaling defects source method and device.
Background technology
The defect one of crystal round fringes is to being a difficult point in the work of integrated circuit powder injection molding.
Refer to Fig. 1, Fig. 1 is the distribution map of wafer crystal edge scaling defects.As shown in Figure 1, crystal edge scaling defects (diagram stain shape) is mainly distributed in the edge of wafer.
Refer to Fig. 2 a, legend that Fig. 2 b, Fig. 2 a is crystal edge scaling defects, Fig. 2 b is crystal edge scaling defects source striograph under an electron microscope.Scaling defects after back segment aluminium etching technics can cause large alumina particles as shown in Figure 2 a to peel off, and forms crystal edge scaling defects source pattern as shown in Figure 2 b.This alumina particles scaling defects will produce extreme influence to yield.
Refer to Fig. 3 a ~ Fig. 3 c, Fig. 3 a be aluminium film at the post-depositional form schematic diagram of crystal column surface, Fig. 3 b is schematic diagram when carrying out wafer aluminium film etching, and Fig. 3 c forms the schematic diagram in scaling defects source at crystal edge after wafer aluminium film etch cleaner.The Crack cause in crystal edge aluminium film separation defect source is described by Fig. 3 a ~ Fig. 3 c (for half side figure).As shown in Figure 3 a, aluminium film 2 can cover the most marginal position of wafer 1 (Wafer) in deposition process; When wafer aluminium film etching as shown in Figure 3 b, plasma (as shown by arrow indication) can be subject to the impact of crystal round fringes bending pattern, the aluminium film 2 of this marginal position can partly be etched totally after aluminium etching technics, and etch sordid phenomenon in wafer 1 lower edge margin by there is a large amount of aluminium films 2, as shown in Figure 3 c.
The aluminium thin film residue of crystal round fringes position is subject to the impact of etching technics, will become very coarse and easily peel off, but the method being difficult to again application cleaning is completely removed totally.
Therefore, need to control this crystal edge aluminium scaling defects source, and propose a kind of optimization method and device.
Summary of the invention
The object of the invention is to the above-mentioned defect overcoming prior art existence, provide a kind of method and the device of avoiding crystal edge aluminium scaling defects source, in order to control, for Yield lmproved is made contributions crystal edge aluminium scaling defects source.
For achieving the above object, technical scheme of the present invention is as follows:
Avoid the method in crystal edge aluminium scaling defects source, comprise the following steps:
Step S01: provide a surface deposition to have the wafer of aluminium film, and a thin film deposition processes chamber is provided;
Step S02: described wafer is put into described process cavity, and masking protection is carried out to the zone line of described crystal column surface, expose the fringe region of described wafer;
Step S03: carry out thin film deposition processes, to deposit an aluminium film etching barrier layer at the fringe region of described wafer;
Step S04: carry out aluminium etching technics, utilizes described aluminium film etching barrier layer to stop the aluminium film in described crystal round fringes region to be etched, to avoid the generation in crystal edge aluminium scaling defects source.
Preferably, the method that the described zone line to crystal column surface carries out masking protection comprises: the described crystal column surface in described thin film deposition processes chamber arranges one and shelters cover, is deposited to avoid described aluminium film etch stopper the wafer zone line sheltered.
Preferably, by sheltering the size of cover described in adjustment, the range of deposition of described aluminium film etching barrier layer in described crystal round fringes region can be adjusted.
Preferably, the shape of cover is sheltered described in for circular or circular arc.
Preferably, in step S03, by physical gas-phase deposition, at the fringe region deposition of aluminum film etching barrier layer of described wafer.
Preferably, the film type of described physical vapour deposition (PVD) is the nitride of titanium, oxide or silicide.
A kind of device avoiding crystal edge aluminium scaling defects source, described device comprises a thin film deposition processes chamber, be provided with one above wafer placement platform in described process cavity and shelter cover, for the zone line of the described crystal column surface depositing aluminium film is carried out masking protection, and expose the fringe region of described wafer, with when described wafer carries out thin film deposition processes, an aluminium film etching barrier layer is deposited around described cover of sheltering at its fringe region, and utilize described aluminium film etching barrier layer to stop the aluminium film in follow-up described crystal round fringes region to be etched, to avoid the generation in crystal edge aluminium scaling defects source.
Preferably, described process cavity is Physical Vapor Deposition Films technological reaction chamber.
Preferably, described in, to shelter the size of cover adjustable, in order to adjust the range of deposition of described aluminium film etching barrier layer in described crystal round fringes region.
Preferably, the shape of cover is sheltered described in for circular or circular arc.
As can be seen from technique scheme; the present invention is by carrying out masking protection to the zone line of crystal column surface; and Applied Physics CVD (Chemical Vapor Deposition) method is at crystal round fringes deposition of aluminum film etching barrier layer; thus avoid follow-up crystal edge aluminium film and be etched and produce and peel off source; can fundamentally eliminate scaling defects source; provide safeguard for removing in line defect, and provide yield guarantee for wafer in enormous quantities generates.
Accompanying drawing explanation
Fig. 1 is the distribution map of wafer crystal edge scaling defects;
Fig. 2 a is the legend of crystal edge scaling defects;
Fig. 2 b is crystal edge scaling defects source striograph under an electron microscope;
Fig. 3 a is that aluminium film is at the post-depositional form schematic diagram of crystal column surface;
Fig. 3 b is schematic diagram when carrying out wafer aluminium film etching;
Fig. 3 c is the schematic diagram forming scaling defects source after wafer aluminium film etch cleaner at crystal edge;
Fig. 4 is a kind of method flow diagram avoiding crystal edge aluminium scaling defects source of the present invention;
Fig. 5 a is crystal edge membrane structure schematic diagram after conventional aluminium thin film deposition;
Fig. 5 b is the crystal edge membrane structure schematic diagram of crystal edge deposition of aluminum film etch stopper layer film after rear road aluminium etching;
Fig. 6 is a kind of apparatus structure schematic diagram avoiding crystal edge aluminium scaling defects source of a preferred embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.
It should be noted that, in following embodiment, when describing embodiments of the present invention in detail, in order to clearly represent structure of the present invention so that explanation, special to the structure in accompanying drawing not according to general scale, and carried out partial enlargement, distortion and simplify processes, therefore, should avoid being understood in this, as limitation of the invention.
In following the specific embodiment of the present invention, refer to Fig. 4, Fig. 4 is a kind of method flow diagram avoiding crystal edge aluminium scaling defects source of the present invention.As shown in Figure 4, a kind of method avoiding crystal edge aluminium scaling defects source of the present invention, comprises the following steps:
As shown in frame 01, step S01: provide a surface deposition to have the wafer of aluminium film, and a thin film deposition processes chamber is provided.
Refer to Fig. 5 a, Fig. 5 a is crystal edge membrane structure schematic diagram after conventional aluminium thin film deposition (for half side figure).As shown in Figure 5 a, have one deck aluminium film 2 at the surface deposition of wafer 1 (Wafer), aluminium film 2 can cover the most marginal position of wafer 1 in deposition process.Thin film deposition processes chamber can adopt conventional thin film deposition processes chamber, and its concrete structure will be described in detail follow-up.
As shown in frame 02, step S02: described wafer is put into described process cavity, and masking protection is carried out to the zone line of described crystal column surface, expose the fringe region of described wafer.
As an optional execution mode; the method that the described zone line to crystal column surface carries out masking protection can comprise: the described crystal column surface in described thin film deposition processes chamber arranges one and shelters cover, is deposited to avoid described aluminium film etch stopper the wafer zone line sheltered.Preferably, according to technique needs, by sheltering the size of cover described in adjustment, the range of deposition of described aluminium film etching barrier layer in described crystal round fringes region can be adjusted.Further, the shape of sheltering cover described in can be designed as circle or circular arc.The described concrete structure position covering on thin film deposition processes chamber of sheltering will be described in detail follow-up
As shown in frame 03, step S03: carry out thin film deposition processes, to deposit an aluminium film etching barrier layer at the fringe region of described wafer.
As an optional execution mode, by physical gas-phase deposition, deposit one deck aluminium film etching barrier layer at the fringe region of described wafer.Because the zone line of wafer is masked, therefore, this aluminium film etching barrier layer will deposit around masked region, and form a circle aluminium film etching barrier layer in crystal round fringes region, to be got up by the aluminium plastic film covering in the crystal round fringes region below it.Preferably, the film type of described physical vapour deposition (PVD) can be the nitride of titanium, oxide or silicide.
As shown in frame 04, step S04: carry out aluminium etching technics, utilizes described aluminium film etching barrier layer to stop the aluminium film in described crystal round fringes region to be etched, to avoid the generation in crystal edge aluminium scaling defects source.
Refer to Fig. 5 b, Fig. 5 b is the crystal edge membrane structure schematic diagram of crystal edge deposition of aluminum film etch stopper layer film after rear road aluminium etching.As shown in Figure 5 b, rear road aluminium etching technics processing procedure is proceeded to the wafer 1 depositing aluminium film etching barrier layer 3.Because the aluminium film 2 in crystal round fringes region covers one deck etching barrier layer 3, when thus after carrying out, road aluminium etches, this etching barrier layer 3 serves protective action to the aluminium film 2 below it, thus prevents the aluminium film 2 in crystal round fringes region to be etched.As can be seen from Fig. 5 b, after road aluminium etches later, the aluminium film of wafer 1 zone line has been etched removal, and the aluminium film 2 of wafer 1 fringe region and the etching barrier layer 3 covered on it still exist in good condition, thus avoids the generation in crystal edge aluminium scaling defects source.
When adopting said method, present invention utilizes and a kind ofly avoid the device in crystal edge aluminium scaling defects source to carry out.Refer to Fig. 6, Fig. 6 is a kind of apparatus structure schematic diagram avoiding crystal edge aluminium scaling defects source of a preferred embodiment of the present invention.As shown in Figure 6, a kind of device avoiding crystal edge aluminium scaling defects source of the present invention, comprises a thin film deposition processes chamber 5, and described process cavity 5 utilizes the common process chamber enforcement can carrying out separately thin film deposition to wafer.Such as, described process cavity 5 is a vacuum chamber, and be provided with negative electrode 7 (raw material) and cathode shield 6 above in process cavity 5, negative electrode 7 is communicated to high voltage source 12; Immediately below negative electrode 7, be provided with wafer placement platform, wafer placement platform is provided with heater 10 and positive pole 4, and wafer 1 is placed on above heater 10; The exhaust outlet 9 being switched to vacuum pump is provided with, to discharge reacting gas below process cavity; Process cavity is also connected to Ar inlet 8, the argon gas needed during in order to input technique.
Please continue to refer to Fig. 6.Be provided with one above the wafer placement platform of the present invention in process cavity 5 and shelter cover 11, for the zone line on wafer 1 surface depositing aluminium film is carried out masking protection, and expose the fringe region of described wafer 1.Like this, when described wafer 1 carries out thin film deposition processes, an aluminium film etching barrier layer can be deposited around described cover 11 of sheltering at its fringe region, and utilize described aluminium film etching barrier layer to stop the aluminium film in follow-up described crystal round fringes region to be etched, to avoid the generation in crystal edge aluminium scaling defects source.Its method can be understood with reference to a kind of aforesaid method in crystal edge aluminium scaling defects source of avoiding of the present invention.
As an optional execution mode; described process cavity 5 can be Physical Vapor Deposition Films technological reaction chamber; and shelter cover by increasing in the Physical Vapor Deposition Films technological reaction chamber of routine, protect wafer zone line film not by the impact of crystal edge thin film deposition.Preferably, described in, to shelter the size of cover 11 adjustable, in order to adjust the range of deposition of described aluminium film etching barrier layer in described crystal round fringes region.Further, the shape of sheltering cover 11 described in can be circle or circular arc.
The avoid method in crystal edge aluminium scaling defects source and the device of the invention described above can be applicable to the manufacturing process of such as 55nm logical product, apply method of the present invention and carry out the thin film deposition of aluminium film etching barrier layer, follow-up crystal edge aluminium film can be avoided to be etched and to produce peeling off source, for Yield lmproved provides safeguard.
In sum; the present invention is by carrying out masking protection to the zone line of crystal column surface; and Applied Physics CVD (Chemical Vapor Deposition) method is at crystal round fringes deposition of aluminum film etching barrier layer; thus avoid follow-up crystal edge aluminium film and be etched and produce and peel off source; can fundamentally eliminate scaling defects source; providing safeguard for removing in line defect, providing yield guarantee for wafer in enormous quantities generates.
Above-describedly be only the preferred embodiments of the present invention; described embodiment is also not used to limit scope of patent protection of the present invention; therefore the equivalent structure that every utilization specification of the present invention and accompanying drawing content are done changes, and in like manner all should be included in protection scope of the present invention.
Claims (10)
1. avoid the method in crystal edge aluminium scaling defects source, it is characterized in that, comprise the following steps:
Step S01: provide a surface deposition to have the wafer of aluminium film, and a thin film deposition processes chamber is provided;
Step S02: described wafer is put into described process cavity, and masking protection is carried out to the zone line of described crystal column surface, expose the fringe region of described wafer;
Step S03: carry out thin film deposition processes, to deposit an aluminium film etching barrier layer at the fringe region of described wafer;
Step S04: carry out aluminium etching technics, utilizes described aluminium film etching barrier layer to stop the aluminium film in described crystal round fringes region to be etched, to avoid the generation in crystal edge aluminium scaling defects source.
2. the method avoiding crystal edge aluminium scaling defects source according to claim 1; it is characterized in that; the method that the described zone line to crystal column surface carries out masking protection comprises: the described crystal column surface in described thin film deposition processes chamber arranges one and shelters cover, is deposited to avoid described aluminium film etch stopper the wafer zone line sheltered.
3. the method avoiding crystal edge aluminium scaling defects source according to claim 2, is characterized in that, by sheltering the size of cover described in adjustment, can adjust the range of deposition of described aluminium film etching barrier layer in described crystal round fringes region.
4. the method avoiding crystal edge aluminium scaling defects source according to Claims 2 or 3, is characterized in that, described in shelter cover shape be circular or circular arc.
5. the method avoiding crystal edge aluminium scaling defects source according to claim 1, is characterized in that, in step S03, by physical gas-phase deposition, at the fringe region deposition of aluminum film etching barrier layer of described wafer.
6. the method avoiding crystal edge aluminium scaling defects source according to claim 5, is characterized in that, the film type of described physical vapour deposition (PVD) is the nitride of titanium, oxide or silicide.
7. avoid the device in crystal edge aluminium scaling defects source for one kind, it is characterized in that, described device comprises a thin film deposition processes chamber, be provided with one above wafer placement platform in described process cavity and shelter cover, for the zone line of the described crystal column surface depositing aluminium film is carried out masking protection, and expose the fringe region of described wafer, with when described wafer carries out thin film deposition processes, an aluminium film etching barrier layer is deposited around described cover of sheltering at its fringe region, and utilize described aluminium film etching barrier layer to stop the aluminium film in follow-up described crystal round fringes region to be etched, to avoid the generation in crystal edge aluminium scaling defects source.
8. the device avoiding crystal edge aluminium scaling defects source according to claim 7, is characterized in that, described process cavity is Physical Vapor Deposition Films technological reaction chamber.
9. the device avoiding crystal edge aluminium scaling defects source according to claim 7, is characterized in that, described in shelter the size of cover adjustable, in order to adjust the range of deposition of described aluminium film etching barrier layer in described crystal round fringes region.
10. the device avoiding crystal edge aluminium scaling defects source according to claim 7 or 9, is characterized in that, described in shelter cover shape be circular or circular arc.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510430121.4A CN105070645A (en) | 2015-07-21 | 2015-07-21 | Method of avoiding peeling defect source of wafer edge aluminum and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510430121.4A CN105070645A (en) | 2015-07-21 | 2015-07-21 | Method of avoiding peeling defect source of wafer edge aluminum and device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105070645A true CN105070645A (en) | 2015-11-18 |
Family
ID=54499983
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510430121.4A Pending CN105070645A (en) | 2015-07-21 | 2015-07-21 | Method of avoiding peeling defect source of wafer edge aluminum and device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105070645A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107367910A (en) * | 2017-08-28 | 2017-11-21 | 睿力集成电路有限公司 | Photoetching offset plate figure method, the preparation method of semiconductor structure and semiconductor equipment |
| CN109913880A (en) * | 2017-12-13 | 2019-06-21 | 南京机器人研究院有限公司 | A kind of weldment method for protecting surface |
| CN110634729A (en) * | 2019-09-12 | 2019-12-31 | 上海华力集成电路制造有限公司 | Method for preventing surface film of incomplete exposure unit on edge of wafer from being stripped |
| CN113808922A (en) * | 2021-09-14 | 2021-12-17 | 苏州汉天下电子有限公司 | Pattern etching method of wafer, thin film resonator assembly and preparation method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1231505A (en) * | 1998-04-08 | 1999-10-13 | 日本电气株式会社 | Method and apparatus for making semiconductor device |
| JP2002100596A (en) * | 2000-09-25 | 2002-04-05 | Mitsubishi Materials Silicon Corp | Edge protecting device for silicon wafer |
| CN102361008A (en) * | 2011-10-28 | 2012-02-22 | 上海华力微电子有限公司 | Method for controlling defects of wafer edge |
-
2015
- 2015-07-21 CN CN201510430121.4A patent/CN105070645A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1231505A (en) * | 1998-04-08 | 1999-10-13 | 日本电气株式会社 | Method and apparatus for making semiconductor device |
| JP2002100596A (en) * | 2000-09-25 | 2002-04-05 | Mitsubishi Materials Silicon Corp | Edge protecting device for silicon wafer |
| CN102361008A (en) * | 2011-10-28 | 2012-02-22 | 上海华力微电子有限公司 | Method for controlling defects of wafer edge |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107367910A (en) * | 2017-08-28 | 2017-11-21 | 睿力集成电路有限公司 | Photoetching offset plate figure method, the preparation method of semiconductor structure and semiconductor equipment |
| CN109913880A (en) * | 2017-12-13 | 2019-06-21 | 南京机器人研究院有限公司 | A kind of weldment method for protecting surface |
| CN110634729A (en) * | 2019-09-12 | 2019-12-31 | 上海华力集成电路制造有限公司 | Method for preventing surface film of incomplete exposure unit on edge of wafer from being stripped |
| CN110634729B (en) * | 2019-09-12 | 2021-08-10 | 上海华力集成电路制造有限公司 | Method for preventing surface film of incomplete exposure unit on edge of wafer from being stripped |
| CN113808922A (en) * | 2021-09-14 | 2021-12-17 | 苏州汉天下电子有限公司 | Pattern etching method of wafer, thin film resonator assembly and preparation method |
| CN113808922B (en) * | 2021-09-14 | 2024-03-19 | 苏州汉天下电子有限公司 | Pattern etching method of wafer, thin film resonator component and preparation method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9051655B2 (en) | Boron ionization for aluminum oxide etch enhancement | |
| CN105070645A (en) | Method of avoiding peeling defect source of wafer edge aluminum and device | |
| CN101504915B (en) | Plasma etching method and plasma etching apparatus | |
| US20060130758A1 (en) | Methods and arrangement for the reduction of byproduct deposition in a plasma processing system | |
| US20110011534A1 (en) | Apparatus for adjusting an edge ring potential during substrate processing | |
| JP2008526026A5 (en) | ||
| JPH0670273B2 (en) | Method and apparatus for removing deposits from the backside and edges of semiconductor wafers | |
| US10622193B2 (en) | Plasma etching apparatus | |
| WO2007038514A2 (en) | Apparatus and method for substrate edge etching | |
| KR101858324B1 (en) | Plasma etching method | |
| KR102461750B1 (en) | Method of processing target object | |
| US20190198321A1 (en) | Film forming method | |
| US11367610B2 (en) | Film forming and process container cleaning method | |
| US20160035569A1 (en) | Physical vapor deposition of low-stress nitrogen-doped tungsten films | |
| CN103962353A (en) | Cavity cleaning method of plasma etching device | |
| KR100838917B1 (en) | Plasma Etching Method With Pattern Mask | |
| US10991594B2 (en) | Method for area-selective etching of silicon nitride layers for the manufacture of microelectronic workpieces | |
| US20110089434A1 (en) | Display panel and rework method of gate insulating layer of thin film transistor | |
| CN111146081B (en) | Method for treating object to be treated and plasma treatment apparatus | |
| US20190333779A1 (en) | Method and apparatus for surface planarization of object using light source of specific wavelength and reactive gas | |
| US9721766B2 (en) | Method for processing target object | |
| JP2628795B2 (en) | How to clean shields in physical vapor deposition chambers | |
| CN105047535A (en) | Method for preventing peeling defect of wafer edges | |
| WO2020101793A3 (en) | Device and method for plasma treatment of electronic materials | |
| JP2002009048A (en) | Focus ring for plasma processor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20151118 |
|
| WD01 | Invention patent application deemed withdrawn after publication |